From: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Brian Norris <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Huang Shijie
<shijie.huang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>,
marex-ynQEQJNshbs@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH v2 03/10] mtd: spi-nor: add DDR quad read support
Date: Wed, 30 Jul 2014 11:46:07 +0100 [thread overview]
Message-ID: <20140730104607.GQ17528@sirena.org.uk> (raw)
In-Reply-To: <20140730074500.GF11952@brian-ubuntu>
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On Wed, Jul 30, 2014 at 12:45:00AM -0700, Brian Norris wrote:
> On Wed, Jul 30, 2014 at 02:44:13PM +0800, Huang Shijie wrote:
> > On Tue, Jul 29, 2014 at 10:08:43PM -0700, Brian Norris wrote:
> > > On Mon, Apr 28, 2014 at 11:53:40AM +0800, Huang Shijie wrote:
> > > > This patch adds the DDR quad read support by the following:
> > > Are DDR modes in the scope of drivers/spi/ at all, so that we could
> > > someday wire it up through m25p80.c? Or is 'DDR' such a distortion of
> > > the meaning of 'SPI' such that it will be restricted only to SPI NOR
> > > dedicated controllers?
> > IMHO, the DDR modes can _NOT_ be handled by the driver/spi/*.
> I agree to some extent, but I wanted to confirm with the SPI guys that
> DDR is truly unique to SPI NOR. (I know it doesn't currently support
> it.)
I don't know what DDR is in this context, sorry. I'm guessing you're
right since it sounds like something to do with extra clocks and this is
probably not something used by generic SPI devices at present (if it
ends up being widely implemented by sufficiently generic controllers
that might change but the trend seems to be to flash specific
controllers).
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WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: Brian Norris <computersforpeace@gmail.com>
Cc: marex@denx.de, devicetree@vger.kernel.org,
linux-doc@vger.kernel.org, linux-spi@vger.kernel.org,
Huang Shijie <b32955@freescale.com>,
linux-mtd@lists.infradead.org,
Huang Shijie <shijie.huang@intel.com>,
dwmw2@infradead.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 03/10] mtd: spi-nor: add DDR quad read support
Date: Wed, 30 Jul 2014 11:46:07 +0100 [thread overview]
Message-ID: <20140730104607.GQ17528@sirena.org.uk> (raw)
In-Reply-To: <20140730074500.GF11952@brian-ubuntu>
[-- Attachment #1: Type: text/plain, Size: 1160 bytes --]
On Wed, Jul 30, 2014 at 12:45:00AM -0700, Brian Norris wrote:
> On Wed, Jul 30, 2014 at 02:44:13PM +0800, Huang Shijie wrote:
> > On Tue, Jul 29, 2014 at 10:08:43PM -0700, Brian Norris wrote:
> > > On Mon, Apr 28, 2014 at 11:53:40AM +0800, Huang Shijie wrote:
> > > > This patch adds the DDR quad read support by the following:
> > > Are DDR modes in the scope of drivers/spi/ at all, so that we could
> > > someday wire it up through m25p80.c? Or is 'DDR' such a distortion of
> > > the meaning of 'SPI' such that it will be restricted only to SPI NOR
> > > dedicated controllers?
> > IMHO, the DDR modes can _NOT_ be handled by the driver/spi/*.
> I agree to some extent, but I wanted to confirm with the SPI guys that
> DDR is truly unique to SPI NOR. (I know it doesn't currently support
> it.)
I don't know what DDR is in this context, sorry. I'm guessing you're
right since it sounds like something to do with extra clocks and this is
probably not something used by generic SPI devices at present (if it
ends up being widely implemented by sufficiently generic controllers
that might change but the trend seems to be to flash specific
controllers).
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WARNING: multiple messages have this Message-ID (diff)
From: broonie@kernel.org (Mark Brown)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 03/10] mtd: spi-nor: add DDR quad read support
Date: Wed, 30 Jul 2014 11:46:07 +0100 [thread overview]
Message-ID: <20140730104607.GQ17528@sirena.org.uk> (raw)
In-Reply-To: <20140730074500.GF11952@brian-ubuntu>
On Wed, Jul 30, 2014 at 12:45:00AM -0700, Brian Norris wrote:
> On Wed, Jul 30, 2014 at 02:44:13PM +0800, Huang Shijie wrote:
> > On Tue, Jul 29, 2014 at 10:08:43PM -0700, Brian Norris wrote:
> > > On Mon, Apr 28, 2014 at 11:53:40AM +0800, Huang Shijie wrote:
> > > > This patch adds the DDR quad read support by the following:
> > > Are DDR modes in the scope of drivers/spi/ at all, so that we could
> > > someday wire it up through m25p80.c? Or is 'DDR' such a distortion of
> > > the meaning of 'SPI' such that it will be restricted only to SPI NOR
> > > dedicated controllers?
> > IMHO, the DDR modes can _NOT_ be handled by the driver/spi/*.
> I agree to some extent, but I wanted to confirm with the SPI guys that
> DDR is truly unique to SPI NOR. (I know it doesn't currently support
> it.)
I don't know what DDR is in this context, sorry. I'm guessing you're
right since it sounds like something to do with extra clocks and this is
probably not something used by generic SPI devices at present (if it
ends up being widely implemented by sufficiently generic controllers
that might change but the trend seems to be to flash specific
controllers).
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next prev parent reply other threads:[~2014-07-30 10:46 UTC|newest]
Thread overview: 95+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-28 3:53 [PATCH v2 00/10] mtd: spi-nor: Add the DDR quad read support Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` [PATCH v2 03/10] mtd: spi-nor: add " Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 20:23 ` Marek Vasut
2014-04-28 20:23 ` Marek Vasut
2014-04-28 20:23 ` Marek Vasut
2014-07-30 5:08 ` Brian Norris
2014-07-30 5:08 ` Brian Norris
2014-07-30 5:08 ` Brian Norris
2014-07-30 6:44 ` Huang Shijie
2014-07-30 6:44 ` Huang Shijie
2014-07-30 6:44 ` Huang Shijie
2014-07-30 7:45 ` Brian Norris
2014-07-30 7:45 ` Brian Norris
2014-07-30 7:45 ` Brian Norris
2014-07-30 10:46 ` Mark Brown [this message]
2014-07-30 10:46 ` Mark Brown
2014-07-30 10:46 ` Mark Brown
2014-08-02 2:06 ` Brian Norris
2014-08-02 2:06 ` Brian Norris
2014-08-02 2:06 ` Brian Norris
2014-08-02 9:09 ` Geert Uytterhoeven
2014-08-02 9:09 ` Geert Uytterhoeven
2014-08-02 9:09 ` Geert Uytterhoeven
[not found] ` <CAMuHMdWxzKG1TTUVgYqfRP0Prp85HPwVxH7NQp7S-pNeLfFqjA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-08-04 14:25 ` Mark Brown
2014-08-04 14:25 ` Mark Brown
2014-08-04 14:25 ` Mark Brown
2015-07-22 18:15 ` Zhi Li
2015-07-22 18:15 ` Zhi Li
2015-07-22 18:18 ` Zhi Li
2015-07-22 18:18 ` Zhi Li
2014-07-30 15:23 ` Huang Shijie
2014-07-30 15:23 ` Huang Shijie
2014-07-30 15:23 ` Huang Shijie
[not found] ` <1398657227-20721-1-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-04-28 3:53 ` [PATCH v2 01/10] mtd: spi-nor: fix the wrong dummy value Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
[not found] ` <1398657227-20721-2-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-04-28 20:22 ` Marek Vasut
2014-04-28 20:22 ` Marek Vasut
2014-04-28 20:22 ` Marek Vasut
2014-11-05 8:27 ` Brian Norris
2014-11-05 8:27 ` Brian Norris
2014-11-05 8:27 ` Brian Norris
2014-04-28 3:53 ` [PATCH v2 02/10] mtd: spi-nor: add a new field for spi_nor{} Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
[not found] ` <1398657227-20721-3-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-04-28 20:23 ` Marek Vasut
2014-04-28 20:23 ` Marek Vasut
2014-04-28 20:23 ` Marek Vasut
[not found] ` <201404282223.26174.marex-ynQEQJNshbs@public.gmane.org>
2014-04-29 5:18 ` Huang Shijie
2014-04-29 5:18 ` Huang Shijie
2014-04-29 5:18 ` Huang Shijie
2014-04-29 5:18 ` Huang Shijie
2014-04-29 6:54 ` Marek Vasut
2014-04-29 6:54 ` Marek Vasut
2014-04-29 6:54 ` Marek Vasut
2014-04-29 6:05 ` Huang Shijie
2014-04-29 6:05 ` Huang Shijie
2014-04-29 6:05 ` Huang Shijie
2014-04-29 6:05 ` Huang Shijie
2014-04-28 3:53 ` [PATCH v2 04/10] Documentation: mtd: add a new document for SPI NOR flash Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` [PATCH v2 05/10] Documentation: fsl-quadspi: update the document Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` [PATCH v2 06/10] mtd: fsl-quadspi: use the information stored in spi-nor{} Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` [PATCH v2 07/10] mtd: fsl-quadspi: add the DDR quad read support for Spansion NOR Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` [PATCH v2 08/10] mtd: spi-nor: add more read transfer flags for n25q256a Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` [PATCH v2 09/10] mtd: spi-nor: add DDR quad read support for Micron Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` [PATCH v2 10/10] mtd: fsl-quadspi: " Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
2014-04-28 3:53 ` Huang Shijie
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