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From: Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
To: dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org
Cc: computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	marex-ynQEQJNshbs@public.gmane.org,
	linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Subject: [PATCH v2 10/10] mtd: fsl-quadspi: add DDR quad read support for Micron
Date: Mon, 28 Apr 2014 11:53:47 +0800	[thread overview]
Message-ID: <1398657227-20721-11-git-send-email-b32955@freescale.com> (raw)
In-Reply-To: <1398657227-20721-1-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>

Add DDR quad read opcode and LUT sequence for Micron N25Q256A.

The performace :
    =================================================
    mtd_speedtest: MTD device: 1
    mtd_speedtest: not NAND flash, assume page size is 512 bytes.
    mtd_speedtest: MTD device size 33554432, eraseblock size 65536,
                   page size 512, count of eraseblocks 512, pages per eraseblock 128, OOB size 0
    mtd_speedtest: testing eraseblock write speed
    mtd_speedtest: eraseblock write speed is 2426 KiB/s
    mtd_speedtest: testing eraseblock read speed
    mtd_speedtest: eraseblock read speed is 32157 KiB/s
    mtd_speedtest: testing page write speed
    mtd_speedtest: page write speed is 2362 KiB/s
    mtd_speedtest: testing page read speed
    mtd_speedtest: page read speed is 17741 KiB/s
    mtd_speedtest: testing 2 page write speed
    mtd_speedtest: 2 page write speed is 2384 KiB/s
    mtd_speedtest: testing 2 page read speed
    mtd_speedtest: 2 page read speed is 24058 KiB/s
    mtd_speedtest: Testing erase speed
    mtd_speedtest: erase speed is 1927529 KiB/s
    mtd_speedtest: Testing 2x multi-block erase speed
    mtd_speedtest: 2x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 4x multi-block erase speed
    mtd_speedtest: 4x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 8x multi-block erase speed
    mtd_speedtest: 8x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 16x multi-block erase speed
    mtd_speedtest: 16x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 32x multi-block erase speed
    mtd_speedtest: 32x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 64x multi-block erase speed
    mtd_speedtest: 64x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: finished
    =================================================

Signed-off-by: Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 drivers/mtd/spi-nor/fsl-quadspi.c |   13 +++++++++++++
 1 files changed, 13 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c
index a5dbc62..08944cb 100644
--- a/drivers/mtd/spi-nor/fsl-quadspi.c
+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
@@ -325,6 +325,18 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q)
 			writel(LUT0(READ_DDR, PAD4, rxfifo)
 				| LUT1(JMP_ON_CS, PAD1, 0),
 				base + QUADSPI_LUT(lut_base + 2));
+		} else if (op == SPINOR_OP_READ_1_1_4_D) {
+			/* read mode : 1-1-4, such as Micron N25Q256A. */
+			writel(LUT0(CMD, PAD1, op)
+				| LUT1(ADDR_DDR, PAD1, addrlen),
+				base + QUADSPI_LUT(lut_base));
+
+			writel(LUT0(DUMMY, PAD1, dm)
+				| LUT1(READ_DDR, PAD4, rxfifo),
+				base + QUADSPI_LUT(lut_base + 1));
+
+			writel(LUT0(JMP_ON_CS, PAD1, 0),
+				base + QUADSPI_LUT(lut_base + 2));
 		} else {
 			dev_err(nor->dev, "Unsupported opcode : 0x%.2x\n", op);
 		}
@@ -389,6 +401,7 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q)
 static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd)
 {
 	switch (cmd) {
+	case SPINOR_OP_READ_1_1_4_D:
 	case SPINOR_OP_READ_1_4_4_D:
 	case SPINOR_OP_READ4_1_4_4_D:
 	case SPINOR_OP_READ4_1_1_4:
-- 
1.7.2.rc3

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WARNING: multiple messages have this Message-ID (diff)
From: Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
To: <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
Cc: <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	<marex-ynQEQJNshbs@public.gmane.org>,
	<linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	<linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	<linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Subject: [PATCH v2 10/10] mtd: fsl-quadspi: add DDR quad read support for Micron
Date: Mon, 28 Apr 2014 11:53:47 +0800	[thread overview]
Message-ID: <1398657227-20721-11-git-send-email-b32955@freescale.com> (raw)
In-Reply-To: <1398657227-20721-1-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>

Add DDR quad read opcode and LUT sequence for Micron N25Q256A.

The performace :
    =================================================
    mtd_speedtest: MTD device: 1
    mtd_speedtest: not NAND flash, assume page size is 512 bytes.
    mtd_speedtest: MTD device size 33554432, eraseblock size 65536,
                   page size 512, count of eraseblocks 512, pages per eraseblock 128, OOB size 0
    mtd_speedtest: testing eraseblock write speed
    mtd_speedtest: eraseblock write speed is 2426 KiB/s
    mtd_speedtest: testing eraseblock read speed
    mtd_speedtest: eraseblock read speed is 32157 KiB/s
    mtd_speedtest: testing page write speed
    mtd_speedtest: page write speed is 2362 KiB/s
    mtd_speedtest: testing page read speed
    mtd_speedtest: page read speed is 17741 KiB/s
    mtd_speedtest: testing 2 page write speed
    mtd_speedtest: 2 page write speed is 2384 KiB/s
    mtd_speedtest: testing 2 page read speed
    mtd_speedtest: 2 page read speed is 24058 KiB/s
    mtd_speedtest: Testing erase speed
    mtd_speedtest: erase speed is 1927529 KiB/s
    mtd_speedtest: Testing 2x multi-block erase speed
    mtd_speedtest: 2x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 4x multi-block erase speed
    mtd_speedtest: 4x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 8x multi-block erase speed
    mtd_speedtest: 8x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 16x multi-block erase speed
    mtd_speedtest: 16x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 32x multi-block erase speed
    mtd_speedtest: 32x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 64x multi-block erase speed
    mtd_speedtest: 64x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: finished
    =================================================

Signed-off-by: Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 drivers/mtd/spi-nor/fsl-quadspi.c |   13 +++++++++++++
 1 files changed, 13 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c
index a5dbc62..08944cb 100644
--- a/drivers/mtd/spi-nor/fsl-quadspi.c
+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
@@ -325,6 +325,18 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q)
 			writel(LUT0(READ_DDR, PAD4, rxfifo)
 				| LUT1(JMP_ON_CS, PAD1, 0),
 				base + QUADSPI_LUT(lut_base + 2));
+		} else if (op == SPINOR_OP_READ_1_1_4_D) {
+			/* read mode : 1-1-4, such as Micron N25Q256A. */
+			writel(LUT0(CMD, PAD1, op)
+				| LUT1(ADDR_DDR, PAD1, addrlen),
+				base + QUADSPI_LUT(lut_base));
+
+			writel(LUT0(DUMMY, PAD1, dm)
+				| LUT1(READ_DDR, PAD4, rxfifo),
+				base + QUADSPI_LUT(lut_base + 1));
+
+			writel(LUT0(JMP_ON_CS, PAD1, 0),
+				base + QUADSPI_LUT(lut_base + 2));
 		} else {
 			dev_err(nor->dev, "Unsupported opcode : 0x%.2x\n", op);
 		}
@@ -389,6 +401,7 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q)
 static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd)
 {
 	switch (cmd) {
+	case SPINOR_OP_READ_1_1_4_D:
 	case SPINOR_OP_READ_1_4_4_D:
 	case SPINOR_OP_READ4_1_4_4_D:
 	case SPINOR_OP_READ4_1_1_4:
-- 
1.7.2.rc3

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

WARNING: multiple messages have this Message-ID (diff)
From: Huang Shijie <b32955@freescale.com>
To: <dwmw2@infradead.org>
Cc: marex@denx.de, devicetree@vger.kernel.org,
	linux-doc@vger.kernel.org, linux-spi@vger.kernel.org,
	Huang Shijie <b32955@freescale.com>,
	linux-mtd@lists.infradead.org, computersforpeace@gmail.com,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 10/10] mtd: fsl-quadspi: add DDR quad read support for Micron
Date: Mon, 28 Apr 2014 11:53:47 +0800	[thread overview]
Message-ID: <1398657227-20721-11-git-send-email-b32955@freescale.com> (raw)
In-Reply-To: <1398657227-20721-1-git-send-email-b32955@freescale.com>

Add DDR quad read opcode and LUT sequence for Micron N25Q256A.

The performace :
    =================================================
    mtd_speedtest: MTD device: 1
    mtd_speedtest: not NAND flash, assume page size is 512 bytes.
    mtd_speedtest: MTD device size 33554432, eraseblock size 65536,
                   page size 512, count of eraseblocks 512, pages per eraseblock 128, OOB size 0
    mtd_speedtest: testing eraseblock write speed
    mtd_speedtest: eraseblock write speed is 2426 KiB/s
    mtd_speedtest: testing eraseblock read speed
    mtd_speedtest: eraseblock read speed is 32157 KiB/s
    mtd_speedtest: testing page write speed
    mtd_speedtest: page write speed is 2362 KiB/s
    mtd_speedtest: testing page read speed
    mtd_speedtest: page read speed is 17741 KiB/s
    mtd_speedtest: testing 2 page write speed
    mtd_speedtest: 2 page write speed is 2384 KiB/s
    mtd_speedtest: testing 2 page read speed
    mtd_speedtest: 2 page read speed is 24058 KiB/s
    mtd_speedtest: Testing erase speed
    mtd_speedtest: erase speed is 1927529 KiB/s
    mtd_speedtest: Testing 2x multi-block erase speed
    mtd_speedtest: 2x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 4x multi-block erase speed
    mtd_speedtest: 4x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 8x multi-block erase speed
    mtd_speedtest: 8x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 16x multi-block erase speed
    mtd_speedtest: 16x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 32x multi-block erase speed
    mtd_speedtest: 32x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 64x multi-block erase speed
    mtd_speedtest: 64x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: finished
    =================================================

Signed-off-by: Huang Shijie <b32955@freescale.com>
---
 drivers/mtd/spi-nor/fsl-quadspi.c |   13 +++++++++++++
 1 files changed, 13 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c
index a5dbc62..08944cb 100644
--- a/drivers/mtd/spi-nor/fsl-quadspi.c
+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
@@ -325,6 +325,18 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q)
 			writel(LUT0(READ_DDR, PAD4, rxfifo)
 				| LUT1(JMP_ON_CS, PAD1, 0),
 				base + QUADSPI_LUT(lut_base + 2));
+		} else if (op == SPINOR_OP_READ_1_1_4_D) {
+			/* read mode : 1-1-4, such as Micron N25Q256A. */
+			writel(LUT0(CMD, PAD1, op)
+				| LUT1(ADDR_DDR, PAD1, addrlen),
+				base + QUADSPI_LUT(lut_base));
+
+			writel(LUT0(DUMMY, PAD1, dm)
+				| LUT1(READ_DDR, PAD4, rxfifo),
+				base + QUADSPI_LUT(lut_base + 1));
+
+			writel(LUT0(JMP_ON_CS, PAD1, 0),
+				base + QUADSPI_LUT(lut_base + 2));
 		} else {
 			dev_err(nor->dev, "Unsupported opcode : 0x%.2x\n", op);
 		}
@@ -389,6 +401,7 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q)
 static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd)
 {
 	switch (cmd) {
+	case SPINOR_OP_READ_1_1_4_D:
 	case SPINOR_OP_READ_1_4_4_D:
 	case SPINOR_OP_READ4_1_4_4_D:
 	case SPINOR_OP_READ4_1_1_4:
-- 
1.7.2.rc3

WARNING: multiple messages have this Message-ID (diff)
From: b32955@freescale.com (Huang Shijie)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 10/10] mtd: fsl-quadspi: add DDR quad read support for Micron
Date: Mon, 28 Apr 2014 11:53:47 +0800	[thread overview]
Message-ID: <1398657227-20721-11-git-send-email-b32955@freescale.com> (raw)
In-Reply-To: <1398657227-20721-1-git-send-email-b32955@freescale.com>

Add DDR quad read opcode and LUT sequence for Micron N25Q256A.

The performace :
    =================================================
    mtd_speedtest: MTD device: 1
    mtd_speedtest: not NAND flash, assume page size is 512 bytes.
    mtd_speedtest: MTD device size 33554432, eraseblock size 65536,
                   page size 512, count of eraseblocks 512, pages per eraseblock 128, OOB size 0
    mtd_speedtest: testing eraseblock write speed
    mtd_speedtest: eraseblock write speed is 2426 KiB/s
    mtd_speedtest: testing eraseblock read speed
    mtd_speedtest: eraseblock read speed is 32157 KiB/s
    mtd_speedtest: testing page write speed
    mtd_speedtest: page write speed is 2362 KiB/s
    mtd_speedtest: testing page read speed
    mtd_speedtest: page read speed is 17741 KiB/s
    mtd_speedtest: testing 2 page write speed
    mtd_speedtest: 2 page write speed is 2384 KiB/s
    mtd_speedtest: testing 2 page read speed
    mtd_speedtest: 2 page read speed is 24058 KiB/s
    mtd_speedtest: Testing erase speed
    mtd_speedtest: erase speed is 1927529 KiB/s
    mtd_speedtest: Testing 2x multi-block erase speed
    mtd_speedtest: 2x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 4x multi-block erase speed
    mtd_speedtest: 4x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 8x multi-block erase speed
    mtd_speedtest: 8x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 16x multi-block erase speed
    mtd_speedtest: 16x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 32x multi-block erase speed
    mtd_speedtest: 32x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 64x multi-block erase speed
    mtd_speedtest: 64x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: finished
    =================================================

Signed-off-by: Huang Shijie <b32955@freescale.com>
---
 drivers/mtd/spi-nor/fsl-quadspi.c |   13 +++++++++++++
 1 files changed, 13 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c
index a5dbc62..08944cb 100644
--- a/drivers/mtd/spi-nor/fsl-quadspi.c
+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
@@ -325,6 +325,18 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q)
 			writel(LUT0(READ_DDR, PAD4, rxfifo)
 				| LUT1(JMP_ON_CS, PAD1, 0),
 				base + QUADSPI_LUT(lut_base + 2));
+		} else if (op == SPINOR_OP_READ_1_1_4_D) {
+			/* read mode : 1-1-4, such as Micron N25Q256A. */
+			writel(LUT0(CMD, PAD1, op)
+				| LUT1(ADDR_DDR, PAD1, addrlen),
+				base + QUADSPI_LUT(lut_base));
+
+			writel(LUT0(DUMMY, PAD1, dm)
+				| LUT1(READ_DDR, PAD4, rxfifo),
+				base + QUADSPI_LUT(lut_base + 1));
+
+			writel(LUT0(JMP_ON_CS, PAD1, 0),
+				base + QUADSPI_LUT(lut_base + 2));
 		} else {
 			dev_err(nor->dev, "Unsupported opcode : 0x%.2x\n", op);
 		}
@@ -389,6 +401,7 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q)
 static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd)
 {
 	switch (cmd) {
+	case SPINOR_OP_READ_1_1_4_D:
 	case SPINOR_OP_READ_1_4_4_D:
 	case SPINOR_OP_READ4_1_4_4_D:
 	case SPINOR_OP_READ4_1_1_4:
-- 
1.7.2.rc3

  parent reply	other threads:[~2014-04-28  3:53 UTC|newest]

Thread overview: 95+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-28  3:53 [PATCH v2 00/10] mtd: spi-nor: Add the DDR quad read support Huang Shijie
2014-04-28  3:53 ` Huang Shijie
2014-04-28  3:53 ` Huang Shijie
2014-04-28  3:53 ` Huang Shijie
2014-04-28  3:53 ` [PATCH v2 03/10] mtd: spi-nor: add " Huang Shijie
2014-04-28  3:53   ` Huang Shijie
2014-04-28  3:53   ` Huang Shijie
2014-04-28  3:53   ` Huang Shijie
2014-04-28 20:23   ` Marek Vasut
2014-04-28 20:23     ` Marek Vasut
2014-04-28 20:23     ` Marek Vasut
2014-07-30  5:08   ` Brian Norris
2014-07-30  5:08     ` Brian Norris
2014-07-30  5:08     ` Brian Norris
2014-07-30  6:44     ` Huang Shijie
2014-07-30  6:44       ` Huang Shijie
2014-07-30  6:44       ` Huang Shijie
2014-07-30  7:45       ` Brian Norris
2014-07-30  7:45         ` Brian Norris
2014-07-30  7:45         ` Brian Norris
2014-07-30 10:46         ` Mark Brown
2014-07-30 10:46           ` Mark Brown
2014-07-30 10:46           ` Mark Brown
2014-08-02  2:06           ` Brian Norris
2014-08-02  2:06             ` Brian Norris
2014-08-02  2:06             ` Brian Norris
2014-08-02  9:09             ` Geert Uytterhoeven
2014-08-02  9:09               ` Geert Uytterhoeven
2014-08-02  9:09               ` Geert Uytterhoeven
     [not found]               ` <CAMuHMdWxzKG1TTUVgYqfRP0Prp85HPwVxH7NQp7S-pNeLfFqjA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-08-04 14:25                 ` Mark Brown
2014-08-04 14:25                   ` Mark Brown
2014-08-04 14:25                   ` Mark Brown
2015-07-22 18:15                   ` Zhi Li
2015-07-22 18:15                     ` Zhi Li
2015-07-22 18:18                     ` Zhi Li
2015-07-22 18:18                       ` Zhi Li
2014-07-30 15:23         ` Huang Shijie
2014-07-30 15:23           ` Huang Shijie
2014-07-30 15:23           ` Huang Shijie
     [not found] ` <1398657227-20721-1-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-04-28  3:53   ` [PATCH v2 01/10] mtd: spi-nor: fix the wrong dummy value Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
     [not found]     ` <1398657227-20721-2-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-04-28 20:22       ` Marek Vasut
2014-04-28 20:22         ` Marek Vasut
2014-04-28 20:22         ` Marek Vasut
2014-11-05  8:27       ` Brian Norris
2014-11-05  8:27         ` Brian Norris
2014-11-05  8:27         ` Brian Norris
2014-04-28  3:53   ` [PATCH v2 02/10] mtd: spi-nor: add a new field for spi_nor{} Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
     [not found]     ` <1398657227-20721-3-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-04-28 20:23       ` Marek Vasut
2014-04-28 20:23         ` Marek Vasut
2014-04-28 20:23         ` Marek Vasut
     [not found]         ` <201404282223.26174.marex-ynQEQJNshbs@public.gmane.org>
2014-04-29  5:18           ` Huang Shijie
2014-04-29  5:18             ` Huang Shijie
2014-04-29  5:18             ` Huang Shijie
2014-04-29  5:18             ` Huang Shijie
2014-04-29  6:54             ` Marek Vasut
2014-04-29  6:54               ` Marek Vasut
2014-04-29  6:54               ` Marek Vasut
2014-04-29  6:05               ` Huang Shijie
2014-04-29  6:05                 ` Huang Shijie
2014-04-29  6:05                 ` Huang Shijie
2014-04-29  6:05                 ` Huang Shijie
2014-04-28  3:53   ` [PATCH v2 04/10] Documentation: mtd: add a new document for SPI NOR flash Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53   ` [PATCH v2 05/10] Documentation: fsl-quadspi: update the document Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53   ` [PATCH v2 06/10] mtd: fsl-quadspi: use the information stored in spi-nor{} Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53   ` [PATCH v2 07/10] mtd: fsl-quadspi: add the DDR quad read support for Spansion NOR Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53   ` [PATCH v2 08/10] mtd: spi-nor: add more read transfer flags for n25q256a Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53   ` [PATCH v2 09/10] mtd: spi-nor: add DDR quad read support for Micron Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53   ` Huang Shijie [this message]
2014-04-28  3:53     ` [PATCH v2 10/10] mtd: fsl-quadspi: " Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie

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