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From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: "Heiko Stübner" <heiko@sntech.de>
Cc: Conor Dooley <conor@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	 Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>,
	 Rob Herring <robh+dt@kernel.org>,
	 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	 Conor Dooley <conor.dooley@microchip.com>,
	Guo Ren <guoren@kernel.org>,  Jisheng Zhang <jszhang@kernel.org>,
	Atish Patra <atishp@rivosinc.com>,
	 Anup Patel <apatel@ventanamicro.com>,
	Andrew Jones <ajones@ventanamicro.com>,
	 Nathan Chancellor <nathan@kernel.org>,
	Philipp Tomsich <philipp.tomsich@vrull.eu>,
	devicetree@vger.kernel.org,  linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	 linux-renesas-soc@vger.kernel.org,
	Biju Das <biju.das.jz@bp.renesas.com>,
	 Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v4 1/7] riscv: asm: alternative-macros: Introduce ALTERNATIVE_3() macro
Date: Fri, 25 Nov 2022 10:02:21 +0000	[thread overview]
Message-ID: <CA+V-a8sT8VxpeM=eBgmDeojOka-LDmvP4JkhVfEDKi3D3VOsmw@mail.gmail.com> (raw)
In-Reply-To: <4801607.MHq7AAxBmi@diego>

Hi Heiko,

On Thu, Nov 24, 2022 at 7:58 PM Heiko Stübner <heiko@sntech.de> wrote:
>
> Am Donnerstag, 24. November 2022, 20:52:33 CET schrieb Conor Dooley:
> > On Thu, Nov 24, 2022 at 05:22:01PM +0000, Prabhakar wrote:
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > >
> > > Introduce ALTERNATIVE_3() macro.
> >
> > Bit perfunctory I think! There's a lovely comment down below that would
> > make for a better commit message if you were to yoink it.
> > Content looks about what I'd expect to see though.
>
> Also both the comment on the original ALTERNATIVE_2 and the new ALTERNATIVE_3
> should probably be merged into a single comment explaining this once for all
> ALTERNATIVE_x variants.
>
> Especially with the dma stuff, I'm pretty sure we'll get at least an ALTERNATIVE_4
> if not even more ;-) . So we defnitly don't want to repeat this multiple times.
>
Do agree. How about the below?

/*
 * Similar to what ALTERNATIVE_2() macro does but with an additional
 * vendor content.
 */

So the other ALTERNATIVE_2+() macros will keep on building on it.

Cheers,
Prabhakar

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  parent reply	other threads:[~2022-11-25 10:25 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-24 17:22 [PATCH v4 0/7] AX45MP: Add support to non-coherent DMA Prabhakar
2022-11-24 17:22 ` [PATCH v4 1/7] riscv: asm: alternative-macros: Introduce ALTERNATIVE_3() macro Prabhakar
2022-11-24 18:06   ` Heiko Stübner
2022-11-24 19:52   ` Conor Dooley
2022-11-24 19:58     ` Heiko Stübner
2022-11-24 20:05       ` Conor Dooley
2022-11-24 20:08         ` Conor Dooley
2022-11-24 20:44           ` Heiko Stübner
2022-11-25 11:44         ` Andrew Jones
2022-11-25 10:02       ` Lad, Prabhakar [this message]
2022-11-25 10:20         ` Heiko Stübner
2022-11-25 10:36           ` Lad, Prabhakar
2022-11-24 17:22 ` [PATCH v4 2/7] riscv: asm: vendorid_list: Add Andes Technology to the vendors list Prabhakar
2022-11-24 18:06   ` Heiko Stübner
2022-11-24 20:09   ` Conor Dooley
2022-11-24 17:22 ` [PATCH v4 3/7] riscv: errata: Add Andes alternative ports Prabhakar
2022-11-24 18:24   ` Heiko Stübner
2022-11-24 19:14     ` Lad, Prabhakar
2022-11-24 20:21   ` Conor Dooley
2022-11-25 10:08     ` Lad, Prabhakar
2022-11-24 17:22 ` [PATCH DO NOT REVIEW v4 4/7] riscv: errata: andes: Fix auipc-jalr addresses in patched alternatives Prabhakar
2022-11-25  1:08   ` Guo Ren
2022-11-25 10:10     ` Lad, Prabhakar
2022-11-24 17:22 ` [PATCH v4 5/7] riscv: mm: dma-noncoherent: Pass direction and operation to ALT_CMO_OP() Prabhakar
2022-11-24 18:29   ` Heiko Stübner
2022-11-24 19:18     ` Lad, Prabhakar
2022-11-25 18:49       ` Samuel Holland
2022-11-25 20:53         ` Lad, Prabhakar
2022-11-24 17:22 ` [PATCH v4 6/7] dt-bindings: cache: r9a07g043f-l2-cache: Add DT binding documentation for L2 cache controller Prabhakar
2022-11-25  8:16   ` Krzysztof Kozlowski
2022-11-25 10:34     ` Lad, Prabhakar
2022-11-25 11:17       ` Geert Uytterhoeven
2022-11-25 11:45         ` Lad, Prabhakar
2022-11-25 12:12       ` Krzysztof Kozlowski
2022-11-25 12:25         ` Conor Dooley
2022-11-25 12:51           ` Lad, Prabhakar
2022-11-25 13:24             ` Conor Dooley
2022-11-25 15:55           ` Krzysztof Kozlowski
2022-11-25 16:50             ` Conor Dooley
2022-11-25 18:18         ` Lad, Prabhakar
2022-11-24 17:22 ` [PATCH v4 7/7] soc: renesas: Add L2 cache management for RZ/Five SoC Prabhakar
2022-11-24 18:30   ` Heiko Stübner
2022-11-24 19:56     ` Lad, Prabhakar
2022-11-24 20:47       ` Heiko Stübner
2022-11-24 21:31   ` Conor Dooley
2022-11-24 21:34     ` Conor Dooley
2022-11-25 10:50     ` Lad, Prabhakar
2022-11-25 12:16       ` Conor Dooley
2022-11-25 19:43   ` Samuel Holland
2022-11-26 21:09     ` Lad, Prabhakar
2022-11-27  9:55       ` Geert Uytterhoeven
2022-11-28 12:08         ` Lad, Prabhakar
2022-11-29  5:48           ` Samuel Holland
2022-11-29  5:58       ` Samuel Holland
2022-12-01 11:30         ` Lad, Prabhakar
2022-11-24 19:41 ` [PATCH v4 0/7] AX45MP: Add support to non-coherent DMA Conor Dooley
2022-11-24 19:52   ` Lad, Prabhakar
2022-11-24 19:59     ` Conor Dooley
2022-11-25  9:04 ` Geert Uytterhoeven
2022-11-25 10:51   ` Lad, Prabhakar
2022-12-01 23:36 ` Conor Dooley
2022-12-02  9:38   ` Lad, Prabhakar

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