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* [PATCH] remoteproc: qcom_q6v5_mss: Monitor MSS_STATUS for boot completion
@ 2020-07-16 12:05 21% Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-16 12:05 UTC (permalink / raw)
  To: bjorn.andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, Sibi Sankar

On secure devices there exists a race condition which could lock the MSS
CONFIG AHB bus thus preventing access to BOOT_STATUS register during SSR.
Switch to polling the MSS_STATUS register with an additional 10 us delay
to reliably track boot completion.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 drivers/remoteproc/qcom_q6v5_mss.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
index a9ba5f38a58ed..13c6d5a72a831 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -113,8 +113,6 @@
 #define QDSP6SS_SLEEP                   0x3C
 #define QDSP6SS_BOOT_CORE_START         0x400
 #define QDSP6SS_BOOT_CMD                0x404
-#define QDSP6SS_BOOT_STATUS		0x408
-#define BOOT_STATUS_TIMEOUT_US		200
 #define BOOT_FSM_TIMEOUT                10000
 
 struct reg_info {
@@ -580,13 +578,15 @@ static int q6v5proc_reset(struct q6v5 *qproc)
 		/* De-assert the Q6 stop core signal */
 		writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START);
 
+		/* Wait for 10 us for any staggering logic to settle */
+		usleep_range(10, 20);
+
 		/* Trigger the boot FSM to start the Q6 out-of-reset sequence */
 		writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD);
 
-		/* Poll the QDSP6SS_BOOT_STATUS for FSM completion */
-		ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_BOOT_STATUS,
-					 val, (val & BIT(0)) != 0, 1,
-					 BOOT_STATUS_TIMEOUT_US);
+		/* Poll the MSS_STATUS for FSM completion */
+		ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS,
+					 val, (val & BIT(0)) != 0, 10, BOOT_FSM_TIMEOUT);
 		if (ret) {
 			dev_err(qproc->dev, "Boot FSM failed to complete.\n");
 			/* Reset the modem so that boot FSM is in reset state */
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 21%]

* [PATCH 0/3] Add modem debug features
@ 2020-07-16 12:36 15% Sibi Sankar
  2020-07-16 12:36 21% ` [PATCH 1/3] remoteproc: qcom_q6v5_mss: Add modem debug policy support Sibi Sankar
                   ` (2 more replies)
  0 siblings, 3 replies; 200+ results
From: Sibi Sankar @ 2020-07-16 12:36 UTC (permalink / raw)
  To: bjorn.andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, Sibi Sankar

The series adds support for the following modem debug features:
 * Modem debug policy which enables coredumps/live debug on secure devices
 * MBA text logs extraction on SC7180 SoCs

Sibi Sankar (3):
  remoteproc: qcom_q6v5_mss: Add modem debug policy support
  remoteproc: qcom_q6v5_mss: Add MBA log extraction support
  remoteproc: qcom_q6v5_mss: Update MBA log info

 drivers/remoteproc/qcom_q6v5_mss.c | 59 +++++++++++++++++++++++++++---
 1 file changed, 53 insertions(+), 6 deletions(-)

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 15%]

* [PATCH 1/3] remoteproc: qcom_q6v5_mss: Add modem debug policy support
  2020-07-16 12:36 15% [PATCH 0/3] Add modem debug features Sibi Sankar
@ 2020-07-16 12:36 21% ` Sibi Sankar
  2020-07-17  4:41  0%   ` Bjorn Andersson
  2020-07-16 12:36 18% ` [PATCH 2/3] remoteproc: qcom_q6v5_mss: Add MBA log extraction support Sibi Sankar
  2020-07-16 12:36 22% ` [PATCH 3/3] remoteproc: qcom_q6v5_mss: Update MBA log info Sibi Sankar
  2 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-07-16 12:36 UTC (permalink / raw)
  To: bjorn.andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, Sibi Sankar

Add modem debug policy support which will enable coredumps and live
debug support when the msadp firmware is present on secure devices.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 drivers/remoteproc/qcom_q6v5_mss.c | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
index 13c6d5a72a831..95e21ed607cb9 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -187,6 +187,7 @@ struct q6v5 {
 	phys_addr_t mba_phys;
 	void *mba_region;
 	size_t mba_size;
+	size_t dp_size;
 
 	phys_addr_t mpss_phys;
 	phys_addr_t mpss_reloc;
@@ -406,6 +407,13 @@ static int q6v5_xfer_mem_ownership(struct q6v5 *qproc, int *current_perm,
 static int q6v5_load(struct rproc *rproc, const struct firmware *fw)
 {
 	struct q6v5 *qproc = rproc->priv;
+	const struct firmware *dp_fw;
+
+	if (!request_firmware(&dp_fw, "msadp", qproc->dev) && fw->size <= SZ_1M) {
+		memcpy(qproc->mba_region + SZ_1M, dp_fw->data, dp_fw->size);
+		qproc->dp_size = dp_fw->size;
+		release_firmware(dp_fw);
+	}
 
 	memcpy(qproc->mba_region, fw->data, fw->size);
 
@@ -896,6 +904,10 @@ static int q6v5_mba_load(struct q6v5 *qproc)
 	}
 
 	writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG);
+	if (qproc->dp_size) {
+		writel(qproc->mba_phys + SZ_1M, qproc->rmb_base + RMB_PMI_CODE_START_REG);
+		writel(qproc->dp_size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG);
+	}
 
 	ret = q6v5proc_reset(qproc);
 	if (ret)
@@ -1258,7 +1270,8 @@ static int q6v5_start(struct rproc *rproc)
 	if (ret)
 		return ret;
 
-	dev_info(qproc->dev, "MBA booted, loading mpss\n");
+	dev_info(qproc->dev, "MBA booted, debug policy %s, loading mpss\n",
+		 qproc->dp_size ? "enabled" : "disabled");
 
 	ret = q6v5_mpss_load(qproc);
 	if (ret)
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 21%]

* [PATCH 2/3] remoteproc: qcom_q6v5_mss: Add MBA log extraction support
  2020-07-16 12:36 15% [PATCH 0/3] Add modem debug features Sibi Sankar
  2020-07-16 12:36 21% ` [PATCH 1/3] remoteproc: qcom_q6v5_mss: Add modem debug policy support Sibi Sankar
@ 2020-07-16 12:36 18% ` Sibi Sankar
  2020-07-16 13:43  0%   ` Manivannan Sadhasivam
  2020-07-17  4:57  0%   ` Bjorn Andersson
  2020-07-16 12:36 22% ` [PATCH 3/3] remoteproc: qcom_q6v5_mss: Update MBA log info Sibi Sankar
  2 siblings, 2 replies; 200+ results
From: Sibi Sankar @ 2020-07-16 12:36 UTC (permalink / raw)
  To: bjorn.andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, Sibi Sankar

On SC7180 the MBA firmware stores the bootup text logs in a 4K segment
at the beginning of the MBA region. Add support to extract the logs
which will be useful to debug mba boot/authentication issues.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 drivers/remoteproc/qcom_q6v5_mss.c | 41 ++++++++++++++++++++++++++----
 1 file changed, 36 insertions(+), 5 deletions(-)

diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
index 95e21ed607cb9..4ddf084b2c6fc 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -9,6 +9,7 @@
 
 #include <linux/clk.h>
 #include <linux/delay.h>
+#include <linux/devcoredump.h>
 #include <linux/dma-mapping.h>
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
@@ -37,6 +38,8 @@
 
 #define MPSS_CRASH_REASON_SMEM		421
 
+#define MBA_LOG_SIZE			SZ_4K
+
 /* RMB Status Register Values */
 #define RMB_PBL_SUCCESS			0x1
 
@@ -139,6 +142,7 @@ struct rproc_hexagon_res {
 	int version;
 	bool need_mem_protection;
 	bool has_alt_reset;
+	bool has_mba_logs;
 	bool has_spare_reg;
 };
 
@@ -200,6 +204,7 @@ struct q6v5 {
 	struct qcom_sysmon *sysmon;
 	bool need_mem_protection;
 	bool has_alt_reset;
+	bool has_mba_logs;
 	bool has_spare_reg;
 	int mpss_perm;
 	int mba_perm;
@@ -518,6 +523,19 @@ static int q6v5_rmb_mba_wait(struct q6v5 *qproc, u32 status, int ms)
 	return val;
 }
 
+static void q6v5_dump_mba_logs(struct q6v5 *qproc)
+{
+	struct rproc *rproc = qproc->rproc;
+	void *data;
+
+	data = vmalloc(MBA_LOG_SIZE);
+	if (!data)
+		return;
+
+	memcpy(data, qproc->mba_region, MBA_LOG_SIZE);
+	dev_coredumpv(&rproc->dev, data, MBA_LOG_SIZE, GFP_KERNEL);
+}
+
 static int q6v5proc_reset(struct q6v5 *qproc)
 {
 	u32 val;
@@ -838,6 +856,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
 {
 	int ret;
 	int xfermemop_ret;
+	bool mba_load_err = false;
 
 	qcom_q6v5_prepare(&qproc->q6v5);
 
@@ -931,7 +950,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
 	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
 	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
 	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc);
-
+	mba_load_err = true;
 reclaim_mba:
 	xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true,
 						false, qproc->mba_phys,
@@ -939,6 +958,8 @@ static int q6v5_mba_load(struct q6v5 *qproc)
 	if (xfermemop_ret) {
 		dev_err(qproc->dev,
 			"Failed to reclaim mba buffer, system may become unstable\n");
+	} else if (qproc->has_mba_logs & mba_load_err) {
+		q6v5_dump_mba_logs(qproc);
 	}
 
 disable_active_clks:
@@ -968,7 +989,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
 	return ret;
 }
 
-static void q6v5_mba_reclaim(struct q6v5 *qproc)
+static void q6v5_mba_reclaim(struct q6v5 *qproc, bool err_path)
 {
 	int ret;
 	u32 val;
@@ -1006,6 +1027,9 @@ static void q6v5_mba_reclaim(struct q6v5 *qproc)
 				      qproc->mba_size);
 	WARN_ON(ret);
 
+	if (qproc->has_mba_logs && err_path && !ret)
+		q6v5_dump_mba_logs(qproc);
+
 	ret = qcom_q6v5_unprepare(&qproc->q6v5);
 	if (ret) {
 		q6v5_pds_disable(qproc, qproc->proxy_pds,
@@ -1255,7 +1279,7 @@ static void qcom_q6v5_dump_segment(struct rproc *rproc,
 						false, true,
 						qproc->mpss_phys,
 						qproc->mpss_size);
-			q6v5_mba_reclaim(qproc);
+			q6v5_mba_reclaim(qproc, false);
 		}
 	}
 }
@@ -1297,7 +1321,7 @@ static int q6v5_start(struct rproc *rproc)
 	return 0;
 
 reclaim_mpss:
-	q6v5_mba_reclaim(qproc);
+	q6v5_mba_reclaim(qproc, true);
 
 	return ret;
 }
@@ -1313,7 +1337,7 @@ static int q6v5_stop(struct rproc *rproc)
 	if (ret == -ETIMEDOUT)
 		dev_err(qproc->dev, "timed out on wait\n");
 
-	q6v5_mba_reclaim(qproc);
+	q6v5_mba_reclaim(qproc, false);
 
 	return 0;
 }
@@ -1717,6 +1741,7 @@ static int q6v5_probe(struct platform_device *pdev)
 
 	qproc->version = desc->version;
 	qproc->need_mem_protection = desc->need_mem_protection;
+	qproc->has_mba_logs = desc->has_mba_logs;
 
 	ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM,
 			     qcom_msa_handover);
@@ -1808,6 +1833,7 @@ static const struct rproc_hexagon_res sc7180_mss = {
 	},
 	.need_mem_protection = true,
 	.has_alt_reset = false,
+	.has_mba_logs = true,
 	.has_spare_reg = true,
 	.version = MSS_SC7180,
 };
@@ -1843,6 +1869,7 @@ static const struct rproc_hexagon_res sdm845_mss = {
 	},
 	.need_mem_protection = true,
 	.has_alt_reset = true,
+	.has_mba_logs = true,
 	.has_spare_reg = false,
 	.version = MSS_SDM845,
 };
@@ -1870,6 +1897,7 @@ static const struct rproc_hexagon_res msm8998_mss = {
 	},
 	.need_mem_protection = true,
 	.has_alt_reset = false,
+	.has_mba_logs = false,
 	.has_spare_reg = false,
 	.version = MSS_MSM8998,
 };
@@ -1900,6 +1928,7 @@ static const struct rproc_hexagon_res msm8996_mss = {
 	},
 	.need_mem_protection = true,
 	.has_alt_reset = false,
+	.has_mba_logs = false,
 	.has_spare_reg = false,
 	.version = MSS_MSM8996,
 };
@@ -1933,6 +1962,7 @@ static const struct rproc_hexagon_res msm8916_mss = {
 	},
 	.need_mem_protection = false,
 	.has_alt_reset = false,
+	.has_mba_logs = false,
 	.has_spare_reg = false,
 	.version = MSS_MSM8916,
 };
@@ -1974,6 +2004,7 @@ static const struct rproc_hexagon_res msm8974_mss = {
 	},
 	.need_mem_protection = false,
 	.has_alt_reset = false,
+	.has_mba_logs = false,
 	.has_spare_reg = false,
 	.version = MSS_MSM8974,
 };
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 18%]

* [PATCH 3/3] remoteproc: qcom_q6v5_mss: Update MBA log info
  2020-07-16 12:36 15% [PATCH 0/3] Add modem debug features Sibi Sankar
  2020-07-16 12:36 21% ` [PATCH 1/3] remoteproc: qcom_q6v5_mss: Add modem debug policy support Sibi Sankar
  2020-07-16 12:36 18% ` [PATCH 2/3] remoteproc: qcom_q6v5_mss: Add MBA log extraction support Sibi Sankar
@ 2020-07-16 12:36 22% ` Sibi Sankar
  2020-07-17  4:59  0%   ` Bjorn Andersson
  2 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-07-16 12:36 UTC (permalink / raw)
  To: bjorn.andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, Sibi Sankar

Update MBA text logs location/size in IMEM to aid tools extract
them after ramdump collection.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 drivers/remoteproc/qcom_q6v5_mss.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
index 4ddf084b2c6fc..539594ab955f1 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -932,6 +932,9 @@ static int q6v5_mba_load(struct q6v5 *qproc)
 	if (ret)
 		goto reclaim_mba;
 
+	if (qproc->has_mba_logs)
+		qcom_pil_info_store("mba", qproc->mba_phys, MBA_LOG_SIZE);
+
 	ret = q6v5_rmb_mba_wait(qproc, 0, 5000);
 	if (ret == -ETIMEDOUT) {
 		dev_err(qproc->dev, "MBA boot timed out\n");
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 22%]

* Re: [PATCH 2/3] remoteproc: qcom_q6v5_mss: Add MBA log extraction support
  2020-07-16 12:36 18% ` [PATCH 2/3] remoteproc: qcom_q6v5_mss: Add MBA log extraction support Sibi Sankar
@ 2020-07-16 13:43  0%   ` Manivannan Sadhasivam
  2020-07-16 14:58  6%     ` Sibi Sankar
  2020-07-17  4:57  0%   ` Bjorn Andersson
  1 sibling, 1 reply; 200+ results
From: Manivannan Sadhasivam @ 2020-07-16 13:43 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: bjorn.andersson, agross, linux-arm-msm, linux-remoteproc,
	linux-kernel, evgreen, ohad

Hi Sibi,

On Thu, Jul 16, 2020 at 06:06:29PM +0530, Sibi Sankar wrote:
> On SC7180 the MBA firmware stores the bootup text logs in a 4K segment
> at the beginning of the MBA region. Add support to extract the logs
> which will be useful to debug mba boot/authentication issues.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> ---
>  drivers/remoteproc/qcom_q6v5_mss.c | 41 ++++++++++++++++++++++++++----
>  1 file changed, 36 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> index 95e21ed607cb9..4ddf084b2c6fc 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> @@ -9,6 +9,7 @@
>  
>  #include <linux/clk.h>
>  #include <linux/delay.h>
> +#include <linux/devcoredump.h>
>  #include <linux/dma-mapping.h>
>  #include <linux/interrupt.h>
>  #include <linux/kernel.h>
> @@ -37,6 +38,8 @@
>  
>  #define MPSS_CRASH_REASON_SMEM		421
>  
> +#define MBA_LOG_SIZE			SZ_4K
> +
>  /* RMB Status Register Values */
>  #define RMB_PBL_SUCCESS			0x1
>  
> @@ -139,6 +142,7 @@ struct rproc_hexagon_res {
>  	int version;
>  	bool need_mem_protection;
>  	bool has_alt_reset;
> +	bool has_mba_logs;
>  	bool has_spare_reg;
>  };
>  
> @@ -200,6 +204,7 @@ struct q6v5 {
>  	struct qcom_sysmon *sysmon;
>  	bool need_mem_protection;
>  	bool has_alt_reset;
> +	bool has_mba_logs;
>  	bool has_spare_reg;
>  	int mpss_perm;
>  	int mba_perm;
> @@ -518,6 +523,19 @@ static int q6v5_rmb_mba_wait(struct q6v5 *qproc, u32 status, int ms)
>  	return val;
>  }
>  
> +static void q6v5_dump_mba_logs(struct q6v5 *qproc)
> +{
> +	struct rproc *rproc = qproc->rproc;
> +	void *data;
> +
> +	data = vmalloc(MBA_LOG_SIZE);

Is there any specific reason to use vmalloc for the size of 4K?

Thanks,
Mani

> +	if (!data)
> +		return;
> +
> +	memcpy(data, qproc->mba_region, MBA_LOG_SIZE);
> +	dev_coredumpv(&rproc->dev, data, MBA_LOG_SIZE, GFP_KERNEL);
> +}
> +
>  static int q6v5proc_reset(struct q6v5 *qproc)
>  {
>  	u32 val;
> @@ -838,6 +856,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>  {
>  	int ret;
>  	int xfermemop_ret;
> +	bool mba_load_err = false;
>  
>  	qcom_q6v5_prepare(&qproc->q6v5);
>  
> @@ -931,7 +950,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc);
> -
> +	mba_load_err = true;
>  reclaim_mba:
>  	xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true,
>  						false, qproc->mba_phys,
> @@ -939,6 +958,8 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>  	if (xfermemop_ret) {
>  		dev_err(qproc->dev,
>  			"Failed to reclaim mba buffer, system may become unstable\n");
> +	} else if (qproc->has_mba_logs & mba_load_err) {
> +		q6v5_dump_mba_logs(qproc);
>  	}
>  
>  disable_active_clks:
> @@ -968,7 +989,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>  	return ret;
>  }
>  
> -static void q6v5_mba_reclaim(struct q6v5 *qproc)
> +static void q6v5_mba_reclaim(struct q6v5 *qproc, bool err_path)
>  {
>  	int ret;
>  	u32 val;
> @@ -1006,6 +1027,9 @@ static void q6v5_mba_reclaim(struct q6v5 *qproc)
>  				      qproc->mba_size);
>  	WARN_ON(ret);
>  
> +	if (qproc->has_mba_logs && err_path && !ret)
> +		q6v5_dump_mba_logs(qproc);
> +
>  	ret = qcom_q6v5_unprepare(&qproc->q6v5);
>  	if (ret) {
>  		q6v5_pds_disable(qproc, qproc->proxy_pds,
> @@ -1255,7 +1279,7 @@ static void qcom_q6v5_dump_segment(struct rproc *rproc,
>  						false, true,
>  						qproc->mpss_phys,
>  						qproc->mpss_size);
> -			q6v5_mba_reclaim(qproc);
> +			q6v5_mba_reclaim(qproc, false);
>  		}
>  	}
>  }
> @@ -1297,7 +1321,7 @@ static int q6v5_start(struct rproc *rproc)
>  	return 0;
>  
>  reclaim_mpss:
> -	q6v5_mba_reclaim(qproc);
> +	q6v5_mba_reclaim(qproc, true);
>  
>  	return ret;
>  }
> @@ -1313,7 +1337,7 @@ static int q6v5_stop(struct rproc *rproc)
>  	if (ret == -ETIMEDOUT)
>  		dev_err(qproc->dev, "timed out on wait\n");
>  
> -	q6v5_mba_reclaim(qproc);
> +	q6v5_mba_reclaim(qproc, false);
>  
>  	return 0;
>  }
> @@ -1717,6 +1741,7 @@ static int q6v5_probe(struct platform_device *pdev)
>  
>  	qproc->version = desc->version;
>  	qproc->need_mem_protection = desc->need_mem_protection;
> +	qproc->has_mba_logs = desc->has_mba_logs;
>  
>  	ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM,
>  			     qcom_msa_handover);
> @@ -1808,6 +1833,7 @@ static const struct rproc_hexagon_res sc7180_mss = {
>  	},
>  	.need_mem_protection = true,
>  	.has_alt_reset = false,
> +	.has_mba_logs = true,
>  	.has_spare_reg = true,
>  	.version = MSS_SC7180,
>  };
> @@ -1843,6 +1869,7 @@ static const struct rproc_hexagon_res sdm845_mss = {
>  	},
>  	.need_mem_protection = true,
>  	.has_alt_reset = true,
> +	.has_mba_logs = true,
>  	.has_spare_reg = false,
>  	.version = MSS_SDM845,
>  };
> @@ -1870,6 +1897,7 @@ static const struct rproc_hexagon_res msm8998_mss = {
>  	},
>  	.need_mem_protection = true,
>  	.has_alt_reset = false,
> +	.has_mba_logs = false,
>  	.has_spare_reg = false,
>  	.version = MSS_MSM8998,
>  };
> @@ -1900,6 +1928,7 @@ static const struct rproc_hexagon_res msm8996_mss = {
>  	},
>  	.need_mem_protection = true,
>  	.has_alt_reset = false,
> +	.has_mba_logs = false,
>  	.has_spare_reg = false,
>  	.version = MSS_MSM8996,
>  };
> @@ -1933,6 +1962,7 @@ static const struct rproc_hexagon_res msm8916_mss = {
>  	},
>  	.need_mem_protection = false,
>  	.has_alt_reset = false,
> +	.has_mba_logs = false,
>  	.has_spare_reg = false,
>  	.version = MSS_MSM8916,
>  };
> @@ -1974,6 +2004,7 @@ static const struct rproc_hexagon_res msm8974_mss = {
>  	},
>  	.need_mem_protection = false,
>  	.has_alt_reset = false,
> +	.has_mba_logs = false,
>  	.has_spare_reg = false,
>  	.version = MSS_MSM8974,
>  };
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* Re: [PATCH 2/3] remoteproc: qcom_q6v5_mss: Add MBA log extraction support
  2020-07-16 13:43  0%   ` Manivannan Sadhasivam
@ 2020-07-16 14:58  6%     ` Sibi Sankar
  2020-07-17 14:38  0%       ` Manivannan Sadhasivam
  0 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-07-16 14:58 UTC (permalink / raw)
  To: Manivannan Sadhasivam
  Cc: bjorn.andersson, agross, linux-arm-msm, linux-remoteproc,
	linux-kernel, evgreen, ohad, linux-arm-msm-owner

On 2020-07-16 19:13, Manivannan Sadhasivam wrote:
> Hi Sibi,
> 
> On Thu, Jul 16, 2020 at 06:06:29PM +0530, Sibi Sankar wrote:
>> On SC7180 the MBA firmware stores the bootup text logs in a 4K segment
>> at the beginning of the MBA region. Add support to extract the logs
>> which will be useful to debug mba boot/authentication issues.
>> 
>> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
>> ---
>>  drivers/remoteproc/qcom_q6v5_mss.c | 41 
>> ++++++++++++++++++++++++++----
>>  1 file changed, 36 insertions(+), 5 deletions(-)
>> 
>> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c 
>> b/drivers/remoteproc/qcom_q6v5_mss.c
>> index 95e21ed607cb9..4ddf084b2c6fc 100644
>> --- a/drivers/remoteproc/qcom_q6v5_mss.c
>> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
>> @@ -9,6 +9,7 @@
>> 
>>  #include <linux/clk.h>
>>  #include <linux/delay.h>
>> +#include <linux/devcoredump.h>
>>  #include <linux/dma-mapping.h>
>>  #include <linux/interrupt.h>
>>  #include <linux/kernel.h>
>> @@ -37,6 +38,8 @@
>> 
>>  #define MPSS_CRASH_REASON_SMEM		421
>> 
>> +#define MBA_LOG_SIZE			SZ_4K
>> +
>>  /* RMB Status Register Values */
>>  #define RMB_PBL_SUCCESS			0x1
>> 
>> @@ -139,6 +142,7 @@ struct rproc_hexagon_res {
>>  	int version;
>>  	bool need_mem_protection;
>>  	bool has_alt_reset;
>> +	bool has_mba_logs;
>>  	bool has_spare_reg;
>>  };
>> 
>> @@ -200,6 +204,7 @@ struct q6v5 {
>>  	struct qcom_sysmon *sysmon;
>>  	bool need_mem_protection;
>>  	bool has_alt_reset;
>> +	bool has_mba_logs;
>>  	bool has_spare_reg;
>>  	int mpss_perm;
>>  	int mba_perm;
>> @@ -518,6 +523,19 @@ static int q6v5_rmb_mba_wait(struct q6v5 *qproc, 
>> u32 status, int ms)
>>  	return val;
>>  }
>> 
>> +static void q6v5_dump_mba_logs(struct q6v5 *qproc)
>> +{
>> +	struct rproc *rproc = qproc->rproc;
>> +	void *data;
>> +
>> +	data = vmalloc(MBA_LOG_SIZE);
> 
> Is there any specific reason to use vmalloc for the size of 4K?

data is passed onto dev_coredumpv
which takes ownership of the memory
and would eventually do a vfree of the
data.

> 
> Thanks,
> Mani
> 
>> +	if (!data)
>> +		return;
>> +
>> +	memcpy(data, qproc->mba_region, MBA_LOG_SIZE);
>> +	dev_coredumpv(&rproc->dev, data, MBA_LOG_SIZE, GFP_KERNEL);
>> +}
>> +
>>  static int q6v5proc_reset(struct q6v5 *qproc)
>>  {
>>  	u32 val;
>> @@ -838,6 +856,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>>  {
>>  	int ret;
>>  	int xfermemop_ret;
>> +	bool mba_load_err = false;
>> 
>>  	qcom_q6v5_prepare(&qproc->q6v5);
>> 
>> @@ -931,7 +950,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
>>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
>>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc);
>> -
>> +	mba_load_err = true;
>>  reclaim_mba:
>>  	xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, 
>> true,
>>  						false, qproc->mba_phys,
>> @@ -939,6 +958,8 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>>  	if (xfermemop_ret) {
>>  		dev_err(qproc->dev,
>>  			"Failed to reclaim mba buffer, system may become unstable\n");
>> +	} else if (qproc->has_mba_logs & mba_load_err) {
>> +		q6v5_dump_mba_logs(qproc);
>>  	}
>> 
>>  disable_active_clks:
>> @@ -968,7 +989,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>>  	return ret;
>>  }
>> 
>> -static void q6v5_mba_reclaim(struct q6v5 *qproc)
>> +static void q6v5_mba_reclaim(struct q6v5 *qproc, bool err_path)
>>  {
>>  	int ret;
>>  	u32 val;
>> @@ -1006,6 +1027,9 @@ static void q6v5_mba_reclaim(struct q6v5 *qproc)
>>  				      qproc->mba_size);
>>  	WARN_ON(ret);
>> 
>> +	if (qproc->has_mba_logs && err_path && !ret)
>> +		q6v5_dump_mba_logs(qproc);
>> +
>>  	ret = qcom_q6v5_unprepare(&qproc->q6v5);
>>  	if (ret) {
>>  		q6v5_pds_disable(qproc, qproc->proxy_pds,
>> @@ -1255,7 +1279,7 @@ static void qcom_q6v5_dump_segment(struct rproc 
>> *rproc,
>>  						false, true,
>>  						qproc->mpss_phys,
>>  						qproc->mpss_size);
>> -			q6v5_mba_reclaim(qproc);
>> +			q6v5_mba_reclaim(qproc, false);
>>  		}
>>  	}
>>  }
>> @@ -1297,7 +1321,7 @@ static int q6v5_start(struct rproc *rproc)
>>  	return 0;
>> 
>>  reclaim_mpss:
>> -	q6v5_mba_reclaim(qproc);
>> +	q6v5_mba_reclaim(qproc, true);
>> 
>>  	return ret;
>>  }
>> @@ -1313,7 +1337,7 @@ static int q6v5_stop(struct rproc *rproc)
>>  	if (ret == -ETIMEDOUT)
>>  		dev_err(qproc->dev, "timed out on wait\n");
>> 
>> -	q6v5_mba_reclaim(qproc);
>> +	q6v5_mba_reclaim(qproc, false);
>> 
>>  	return 0;
>>  }
>> @@ -1717,6 +1741,7 @@ static int q6v5_probe(struct platform_device 
>> *pdev)
>> 
>>  	qproc->version = desc->version;
>>  	qproc->need_mem_protection = desc->need_mem_protection;
>> +	qproc->has_mba_logs = desc->has_mba_logs;
>> 
>>  	ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, 
>> MPSS_CRASH_REASON_SMEM,
>>  			     qcom_msa_handover);
>> @@ -1808,6 +1833,7 @@ static const struct rproc_hexagon_res sc7180_mss 
>> = {
>>  	},
>>  	.need_mem_protection = true,
>>  	.has_alt_reset = false,
>> +	.has_mba_logs = true,
>>  	.has_spare_reg = true,
>>  	.version = MSS_SC7180,
>>  };
>> @@ -1843,6 +1869,7 @@ static const struct rproc_hexagon_res sdm845_mss 
>> = {
>>  	},
>>  	.need_mem_protection = true,
>>  	.has_alt_reset = true,
>> +	.has_mba_logs = true,
>>  	.has_spare_reg = false,
>>  	.version = MSS_SDM845,
>>  };
>> @@ -1870,6 +1897,7 @@ static const struct rproc_hexagon_res 
>> msm8998_mss = {
>>  	},
>>  	.need_mem_protection = true,
>>  	.has_alt_reset = false,
>> +	.has_mba_logs = false,
>>  	.has_spare_reg = false,
>>  	.version = MSS_MSM8998,
>>  };
>> @@ -1900,6 +1928,7 @@ static const struct rproc_hexagon_res 
>> msm8996_mss = {
>>  	},
>>  	.need_mem_protection = true,
>>  	.has_alt_reset = false,
>> +	.has_mba_logs = false,
>>  	.has_spare_reg = false,
>>  	.version = MSS_MSM8996,
>>  };
>> @@ -1933,6 +1962,7 @@ static const struct rproc_hexagon_res 
>> msm8916_mss = {
>>  	},
>>  	.need_mem_protection = false,
>>  	.has_alt_reset = false,
>> +	.has_mba_logs = false,
>>  	.has_spare_reg = false,
>>  	.version = MSS_MSM8916,
>>  };
>> @@ -1974,6 +2004,7 @@ static const struct rproc_hexagon_res 
>> msm8974_mss = {
>>  	},
>>  	.need_mem_protection = false,
>>  	.has_alt_reset = false,
>> +	.has_mba_logs = false,
>>  	.has_spare_reg = false,
>>  	.version = MSS_MSM8974,
>>  };
>> --
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora 
>> Forum,
>> a Linux Foundation Collaborative Project
>> 

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* Re: [PATCH v1 2/4] remoteproc: qcom_q6v5_mss: Replace mask based tracking with size
  @ 2020-07-16 18:24  0%       ` rishabhb
  0 siblings, 0 replies; 200+ results
From: rishabhb @ 2020-07-16 18:24 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: Mathieu Poirier, linux-remoteproc, linux-kernel, bjorn.andersson,
	tsoni, psodagud, sidgup, linux-kernel-owner,
	linux-remoteproc-owner

On 2020-07-16 01:10, Sibi Sankar wrote:
> On 2020-07-14 22:48, Mathieu Poirier wrote:
>> On Thu, Jul 09, 2020 at 01:31:54PM -0700, Rishabh Bhatnagar wrote:
>>> From: Sibi Sankar <sibis@codeaurora.org>
>>> 
>>> In order to land inline coredump support for mss, the dump_segment
>>> function would need to support granularities less than the segment
>>> size. This is achieved by replacing mask based tracking with size.
>>> 
>>> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
>>> Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
>>> ---
>>>  drivers/remoteproc/qcom_q6v5_mss.c | 15 +++++++--------
>>>  1 file changed, 7 insertions(+), 8 deletions(-)
>>> 
>>> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c 
>>> b/drivers/remoteproc/qcom_q6v5_mss.c
>>> index feb70283b..c6ce032 100644
>>> --- a/drivers/remoteproc/qcom_q6v5_mss.c
>>> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
>>> @@ -181,8 +181,8 @@ struct q6v5 {
>>>  	bool running;
>>> 
>>>  	bool dump_mba_loaded;
>>> -	unsigned long dump_segment_mask;
>>> -	unsigned long dump_complete_mask;
>>> +	size_t current_dump_size;
>>> +	size_t total_dump_size;
>>> 
>>>  	phys_addr_t mba_phys;
>>>  	void *mba_region;
>>> @@ -1203,7 +1203,6 @@ static void qcom_q6v5_dump_segment(struct rproc 
>>> *rproc,
>>>  {
>>>  	int ret = 0;
>>>  	struct q6v5 *qproc = rproc->priv;
>>> -	unsigned long mask = BIT((unsigned long)segment->priv);
>>>  	int offset = segment->da - qproc->mpss_reloc;
>>>  	void *ptr = NULL;
>>> 
>>> @@ -1229,10 +1228,10 @@ static void qcom_q6v5_dump_segment(struct 
>>> rproc *rproc,
>>>  		memset(dest, 0xff, segment->size);
>>>  	}
>>> 
>>> -	qproc->dump_segment_mask |= mask;
>>> +	qproc->current_dump_size += segment->size;
>>> 
>>>  	/* Reclaim mba after copying segments */
>>> -	if (qproc->dump_segment_mask == qproc->dump_complete_mask) {
>>> +	if (qproc->current_dump_size == qproc->total_dump_size) {
>>>  		if (qproc->dump_mba_loaded) {
>>>  			/* Try to reset ownership back to Q6 */
>>>  			q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm,
>>> @@ -1274,7 +1273,7 @@ static int q6v5_start(struct rproc *rproc)
>>>  			"Failed to reclaim mba buffer system may become unstable\n");
>>> 
>>>  	/* Reset Dump Segment Mask */
>>> -	qproc->dump_segment_mask = 0;
>>> +	qproc->current_dump_size = 0;
>>>  	qproc->running = true;
>>> 
>>>  	return 0;
>>> @@ -1323,7 +1322,7 @@ static int 
>>> qcom_q6v5_register_dump_segments(struct rproc *rproc,
>>> 
>>>  	ehdr = (struct elf32_hdr *)fw->data;
>>>  	phdrs = (struct elf32_phdr *)(ehdr + 1);
>>> -	qproc->dump_complete_mask = 0;
>>> +	qproc->total_dump_size = 0;
>>> 
>>>  	for (i = 0; i < ehdr->e_phnum; i++) {
>>>  		phdr = &phdrs[i];
>>> @@ -1338,7 +1337,7 @@ static int 
>>> qcom_q6v5_register_dump_segments(struct rproc *rproc,
>>>  		if (ret)
>>>  			break;
>> 
>> There is also no longer a need to carry the 'i' in:
>> 
>>                 ret = rproc_coredump_add_custom_segment(rproc, 
>> phdr->p_paddr,
>>                                                         phdr->p_memsz,
>>                                                         
>> qcom_q6v5_dump_segment,
>>                                                         (void *)i);
> 
> I assume Rishabh will re-spin the
> series today and this will be taken
> care as well.
> 
Hi Sibi,
I'll respin and add the fixes.
Thanks
>>> 
>>> -		qproc->dump_complete_mask |= BIT(i);
>>> +		qproc->total_dump_size += phdr->p_memsz;
>>>  	}
>>> 
>>>  	release_firmware(fw);
>>> --
>>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora 
>>> Forum,
>>> a Linux Foundation Collaborative Project
>>> 

^ permalink raw reply	[relevance 0%]

* Re: [PATCH v7 3/4] remoteproc: Add inline coredump functionality
  @ 2020-07-16 18:25  0%     ` rishabhb
  0 siblings, 0 replies; 200+ results
From: rishabhb @ 2020-07-16 18:25 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: linux-remoteproc, linux-kernel, bjorn.andersson, mathieu.poirier,
	tsoni, psodagud, sidgup, linux-kernel-owner

On 2020-07-16 01:25, Sibi Sankar wrote:
> On 2020-07-10 02:01, Rishabh Bhatnagar wrote:
>> The current coredump implementation uses vmalloc area to copy
>> all the segments. But this might put strain on low memory targets
>> as the firmware size sometimes is in tens of MBs. The situation
>> becomes worse if there are multiple remote processors undergoing
>> recovery at the same time. This patch adds inline coredump
>> functionality that avoids extra memory usage. This requires
>> recovery to be halted until data is read by userspace and free
>> function is called. Also modify the qcom_q6v5_mss driver to include
>> size and offset in the segment dump function.
>> 
>> Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
>> Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
>> ---
>>  drivers/remoteproc/qcom_q6v5_mss.c       |  11 ++-
>>  drivers/remoteproc/remoteproc_coredump.c | 160 
>> +++++++++++++++++++++++++++----
>>  include/linux/remoteproc.h               |  21 +++-
>>  3 files changed, 166 insertions(+), 26 deletions(-)
>> 
>> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
>> b/drivers/remoteproc/qcom_q6v5_mss.c
>> index c6ce032..79df354 100644
>> --- a/drivers/remoteproc/qcom_q6v5_mss.c
>> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
>> @@ -1199,11 +1199,12 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
>> 
>>  static void qcom_q6v5_dump_segment(struct rproc *rproc,
>>  				   struct rproc_dump_segment *segment,
>> -				   void *dest)
>> +				   void *dest, size_t cp_offset, size_t size)
>>  {
>>  	int ret = 0;
>>  	struct q6v5 *qproc = rproc->priv;
>>  	int offset = segment->da - qproc->mpss_reloc;
>> +	size_t cp_size = size ? size : segment->size;
>>  	void *ptr = NULL;
>> 
>>  	/* Unlock mba before copying segments */
>> @@ -1219,16 +1220,16 @@ static void qcom_q6v5_dump_segment(struct 
>> rproc *rproc,
>>  	}
>> 
>>  	if (!ret)
>> -		ptr = ioremap_wc(qproc->mpss_phys + offset, segment->size);
>> +		ptr = ioremap_wc(qproc->mpss_phys + offset + cp_offset, cp_size);
>> 
>>  	if (ptr) {
>> -		memcpy(dest, ptr, segment->size);
>> +		memcpy(dest, ptr, cp_size);
>>  		iounmap(ptr);
>>  	} else {
>> -		memset(dest, 0xff, segment->size);
>> +		memset(dest, 0xff, cp_size);
>>  	}
>> 
>> -	qproc->current_dump_size += segment->size;
>> +	qproc->current_dump_size += cp_size;
>> 
>>  	/* Reclaim mba after copying segments */
>>  	if (qproc->current_dump_size == qproc->total_dump_size) {
>> diff --git a/drivers/remoteproc/remoteproc_coredump.c
>> b/drivers/remoteproc/remoteproc_coredump.c
>> index ded0244..646886f 100644
>> --- a/drivers/remoteproc/remoteproc_coredump.c
>> +++ b/drivers/remoteproc/remoteproc_coredump.c
>> @@ -5,6 +5,7 @@
>>   * Copyright (c) 2020, The Linux Foundation. All rights reserved.
>>   */
>> 
>> +#include <linux/completion.h>
>>  #include <linux/devcoredump.h>
>>  #include <linux/device.h>
>>  #include <linux/kernel.h>
>> @@ -12,6 +13,12 @@
>>  #include "remoteproc_internal.h"
>>  #include "remoteproc_elf_helpers.h"
>> 
>> +struct rproc_coredump_state {
>> +	struct rproc *rproc;
>> +	void *header;
>> +	struct completion dump_done;
>> +};
>> +
>>  /**
>>   * rproc_coredump_cleanup() - clean up dump_segments list
>>   * @rproc: the remote processor handle
>> @@ -72,7 +79,8 @@ int rproc_coredump_add_custom_segment(struct rproc 
>> *rproc,
>>  				      dma_addr_t da, size_t size,
>>  				      void (*dumpfn)(struct rproc *rproc,
>>  						     struct rproc_dump_segment *segment,
>> -						     void *dest),
>> +						     void *dest, size_t offset,
>> +						     size_t size),
>>  				      void *priv)
>>  {
>>  	struct rproc_dump_segment *segment;
>> @@ -114,12 +122,110 @@ int rproc_coredump_set_elf_info(struct rproc
>> *rproc, u8 class, u16 machine)
>>  }
>>  EXPORT_SYMBOL(rproc_coredump_set_elf_info);
>> 
>> +static void rproc_coredump_free(void *data)
>> +{
>> +	struct rproc_coredump_state *dump_state = data;
>> +
>> +	complete(&dump_state->dump_done);
>> +	vfree(dump_state->header);
> 
> Rishabh,
> 
> I observed a system hang when I trigger
> recovery of a number of remoteproc
> simultaneously (after a number of iterations
> consistently). This goes away if I free the
> header and  then issue the dump completion
> and that does seem to be the right thing to
> do.
> 
Makes sense i'll switch it in the next patchset.
>> +}
>> +
>> +static void *rproc_coredump_find_segment(loff_t user_offset,
>> +					 struct list_head *segments,
>> +					 size_t *data_left)
>> +{
>> +	struct rproc_dump_segment *segment;
>> +
>> +	list_for_each_entry(segment, segments, node) {
>> +		if (user_offset < segment->size) {
>> +			*data_left = segment->size - user_offset;
>> +			return segment;
>> +		}
>> +		user_offset -= segment->size;
>> +	}
>> +
>> +	*data_left = 0;
>> +	return NULL;
>> +}
>> +
>> +static void rproc_copy_segment(struct rproc *rproc, void *dest,
>> +			       struct rproc_dump_segment *segment,
>> +			       size_t offset, size_t size)
>> +{
>> +	void *ptr;
>> +
>> +	if (segment->dump) {
>> +		segment->dump(rproc, segment, dest, offset, size);
>> +	} else {
>> +		ptr = rproc_da_to_va(rproc, segment->da + offset, size);
>> +		if (!ptr) {
>> +			dev_err(&rproc->dev,
>> +				"invalid copy request for segment %pad with offset %zu and size 
>> %zu)\n",
>> +				&segment->da, offset, size);
>> +			memset(dest, 0xff, size);
>> +		} else {
>> +			memcpy(dest, ptr, size);
>> +		}
>> +	}
>> +}
>> +
>> +static ssize_t rproc_coredump_read(char *buffer, loff_t offset, 
>> size_t count,
>> +				   void *data, size_t header_sz)
>> +{
>> +	size_t seg_data, bytes_left = count;
>> +	ssize_t copy_sz;
>> +	struct rproc_dump_segment *seg;
>> +	struct rproc_coredump_state *dump_state = data;
>> +	struct rproc *rproc = dump_state->rproc;
>> +	void *elfcore = dump_state->header;
>> +
>> +	/* Copy the vmalloc'ed header first. */
>> +	if (offset < header_sz) {
>> +		copy_sz = memory_read_from_buffer(buffer, count, &offset,
>> +						  elfcore, header_sz);
>> +
>> +		return copy_sz;
>> +	}
>> +
>> +	/*
>> +	 * Find out the segment memory chunk to be copied based on offset.
>> +	 * Keep copying data until count bytes are read.
>> +	 */
>> +	while (bytes_left) {
>> +		seg = rproc_coredump_find_segment(offset - header_sz,
>> +						  &rproc->dump_segments,
>> +						  &seg_data);
>> +		/* EOF check */
>> +		if (!seg) {
>> +			dev_info(&rproc->dev, "Ramdump done, %lld bytes read",
>> +				 offset);
>> +			break;
>> +		}
>> +
>> +		copy_sz = min_t(size_t, bytes_left, seg_data);
>> +
>> +		rproc_copy_segment(rproc, buffer, seg, seg->size - seg_data,
>> +				   copy_sz);
>> +
>> +		offset += copy_sz;
>> +		buffer += copy_sz;
>> +		bytes_left -= copy_sz;
>> +	}
>> +
>> +	return count - bytes_left;
>> +}
>> +
>>  /**
>>   * rproc_coredump() - perform coredump
>>   * @rproc:	rproc handle
>>   *
>>   * This function will generate an ELF header for the registered 
>> segments
>> - * and create a devcoredump device associated with rproc.
>> + * and create a devcoredump device associated with rproc. Based on 
>> the
>> + * coredump configuration this function will directly copy the 
>> segments
>> + * from device memory to userspace or copy segments from device 
>> memory to
>> + * a separate buffer, which can then be read by userspace.
>> + * The first approach avoids using extra vmalloc memory. But it will 
>> stall
>> + * recovery flow until dump is read by userspace.
>>   */
>>  void rproc_coredump(struct rproc *rproc)
>>  {
>> @@ -129,11 +235,13 @@ void rproc_coredump(struct rproc *rproc)
>>  	size_t data_size;
>>  	size_t offset;
>>  	void *data;
>> -	void *ptr;
>>  	u8 class = rproc->elf_class;
>>  	int phnum = 0;
>> +	struct rproc_coredump_state dump_state;
>> +	enum rproc_dump_mechanism dump_conf = rproc->dump_conf;
>> 
>> -	if (list_empty(&rproc->dump_segments))
>> +	if (list_empty(&rproc->dump_segments) ||
>> +	    dump_conf == RPROC_COREDUMP_DISABLED)
>>  		return;
>> 
>>  	if (class == ELFCLASSNONE) {
>> @@ -143,7 +251,14 @@ void rproc_coredump(struct rproc *rproc)
>> 
>>  	data_size = elf_size_of_hdr(class);
>>  	list_for_each_entry(segment, &rproc->dump_segments, node) {
>> -		data_size += elf_size_of_phdr(class) + segment->size;
>> +		/*
>> +		 * For default configuration buffer includes headers & segments.
>> +		 * For inline dump buffer just includes headers as segments are
>> +		 * directly read from device memory.
>> +		 */
>> +		data_size += elf_size_of_phdr(class);
>> +		if (dump_conf == RPROC_COREDUMP_DEFAULT)
>> +			data_size += segment->size;
>> 
>>  		phnum++;
>>  	}
>> @@ -182,23 +297,30 @@ void rproc_coredump(struct rproc *rproc)
>>  		elf_phdr_set_p_flags(class, phdr, PF_R | PF_W | PF_X);
>>  		elf_phdr_set_p_align(class, phdr, 0);
>> 
>> -		if (segment->dump) {
>> -			segment->dump(rproc, segment, data + offset);
>> -		} else {
>> -			ptr = rproc_da_to_va(rproc, segment->da, segment->size);
>> -			if (!ptr) {
>> -				dev_err(&rproc->dev,
>> -					"invalid coredump segment (%pad, %zu)\n",
>> -					&segment->da, segment->size);
>> -				memset(data + offset, 0xff, segment->size);
>> -			} else {
>> -				memcpy(data + offset, ptr, segment->size);
>> -			}
>> -		}
>> +		if (dump_conf == RPROC_COREDUMP_DEFAULT)
>> +			rproc_copy_segment(rproc, data + offset, segment, 0,
>> +					   segment->size);
>> 
>>  		offset += elf_phdr_get_p_filesz(class, phdr);
>>  		phdr += elf_size_of_phdr(class);
>>  	}
>> 
>> -	dev_coredumpv(&rproc->dev, data, data_size, GFP_KERNEL);
>> +	if (dump_conf == RPROC_COREDUMP_DEFAULT) {
>> +		dev_coredumpv(&rproc->dev, data, data_size, GFP_KERNEL);
>> +		return;
>> +	}
>> +
>> +	/* Initialize the dump state struct to be used by 
>> rproc_coredump_read */
>> +	dump_state.rproc = rproc;
>> +	dump_state.header = data;
>> +	init_completion(&dump_state.dump_done);
>> +
>> +	dev_coredumpm(&rproc->dev, NULL, &dump_state, data_size, GFP_KERNEL,
>> +		      rproc_coredump_read, rproc_coredump_free);
>> +
>> +	/*
>> +	 * Wait until the dump is read and free is called. Data is freed
>> +	 * by devcoredump framework automatically after 5 minutes.
>> +	 */
>> +	wait_for_completion(&dump_state.dump_done);
>>  }
>> diff --git a/include/linux/remoteproc.h b/include/linux/remoteproc.h
>> index e7b7bab..38d037d 100644
>> --- a/include/linux/remoteproc.h
>> +++ b/include/linux/remoteproc.h
>> @@ -435,6 +435,20 @@ enum rproc_crash_type {
>>  };
>> 
>>  /**
>> + * enum rproc_dump_mechanism - Coredump options for core
>> + * @RPROC_COREDUMP_DEFAULT:	Copy dump to separate buffer and carry on 
>> with
>> +				recovery
>> + * @RPROC_COREDUMP_INLINE:	Read segments directly from device memory. 
>> Stall
>> +				recovery until all segments are read
>> + * @RPROC_COREDUMP_DISABLED:	Don't perform any dump
>> + */
>> +enum rproc_dump_mechanism {
>> +	RPROC_COREDUMP_DEFAULT,
>> +	RPROC_COREDUMP_INLINE,
>> +	RPROC_COREDUMP_DISABLED,
>> +};
>> +
>> +/**
>>   * struct rproc_dump_segment - segment info from ELF header
>>   * @node:	list node related to the rproc segment list
>>   * @da:		device address of the segment
>> @@ -451,7 +465,7 @@ struct rproc_dump_segment {
>> 
>>  	void *priv;
>>  	void (*dump)(struct rproc *rproc, struct rproc_dump_segment 
>> *segment,
>> -		     void *dest);
>> +		     void *dest, size_t offset, size_t size);
>>  	loff_t offset;
>>  };
>> 
>> @@ -466,6 +480,7 @@ struct rproc_dump_segment {
>>   * @dev: virtual device for refcounting and common remoteproc 
>> behavior
>>   * @power: refcount of users who need this rproc powered up
>>   * @state: state of the device
>> + * @dump_conf: Currently selected coredump configuration
>>   * @lock: lock which protects concurrent manipulations of the rproc
>>   * @dbg_dir: debugfs directory of this rproc device
>>   * @traces: list of trace buffers
>> @@ -499,6 +514,7 @@ struct rproc {
>>  	struct device dev;
>>  	atomic_t power;
>>  	unsigned int state;
>> +	enum rproc_dump_mechanism dump_conf;
>>  	struct mutex lock;
>>  	struct dentry *dbg_dir;
>>  	struct list_head traces;
>> @@ -630,7 +646,8 @@ int rproc_coredump_add_custom_segment(struct rproc 
>> *rproc,
>>  				      dma_addr_t da, size_t size,
>>  				      void (*dumpfn)(struct rproc *rproc,
>>  						     struct rproc_dump_segment *segment,
>> -						     void *dest),
>> +						     void *dest, size_t offset,
>> +						     size_t size),
>>  				      void *priv);
>>  int rproc_coredump_set_elf_info(struct rproc *rproc, u8 class, u16 
>> machine);

^ permalink raw reply	[relevance 0%]

* [PATCH] arm64: dts: qcom: sc7180: Move the fixed-perm property to SoC dtsi
@ 2020-07-16 19:17 22% Sibi Sankar
  2020-07-16 22:37  6% ` Doug Anderson
  2020-07-16 23:40  0% ` Bjorn Andersson
  0 siblings, 2 replies; 200+ results
From: Sibi Sankar @ 2020-07-16 19:17 UTC (permalink / raw)
  To: bjorn.andersson
  Cc: agross, linux-arm-msm, devicetree, linux-kernel, evgreen,
	dianders, pillair, robh+dt, Sibi Sankar

All the platforms using SC7180 SoC are expected to have the wlan firmware
memory statically mapped by the Trusted Firmware. Hence move back the
qcom,msa-fixed-perm property to the SoC dtsi.

Fixes: 7d484566087c0 ("arm64: dts: qcom: sc7180: Add missing properties for Wifi node")
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sc7180-idp.dts | 1 -
 arch/arm64/boot/dts/qcom/sc7180.dtsi    | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts
index 860fc4658b8b1..26cc4913d3ddc 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts
+++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts
@@ -392,7 +392,6 @@ video-firmware {
 
 &wifi {
 	status = "okay";
-	qcom,msa-fixed-perm;
 	vdd-0.8-cx-mx-supply = <&vreg_l9a_0p6>;
 	vdd-1.8-xo-supply = <&vreg_l1c_1p8>;
 	vdd-1.3-rfa-supply = <&vreg_l2c_1p3>;
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 126e2fce26c1a..a91d3f074625e 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -3233,6 +3233,7 @@ wifi: wifi@18800000 {
 				<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH /* CE10 */>,
 				<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH /* CE11 */>;
 			memory-region = <&wlan_mem>;
+			qcom,msa-fixed-perm;
 			status = "disabled";
 		};
 	};
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 22%]

* [PATCH v8 4/5] remoteproc: Add inline coredump functionality
                     ` (2 preceding siblings ...)
  @ 2020-07-16 22:20  5% ` Rishabh Bhatnagar
  2020-07-17  5:13  0%   ` Bjorn Andersson
                     ` (2 more replies)
  2020-07-16 22:20  7% ` [PATCH v8 5/5] remoteproc: Add coredump debugfs entry Rishabh Bhatnagar
  4 siblings, 3 replies; 200+ results
From: Rishabh Bhatnagar @ 2020-07-16 22:20 UTC (permalink / raw)
  To: linux-remoteproc, linux-kernel
  Cc: bjorn.andersson, mathieu.poirier, sibis, tsoni, psodagud, sidgup,
	Rishabh Bhatnagar

The current coredump implementation uses vmalloc area to copy
all the segments. But this might put strain on low memory targets
as the firmware size sometimes is in tens of MBs. The situation
becomes worse if there are multiple remote processors undergoing
recovery at the same time. This patch adds inline coredump
functionality that avoids extra memory usage. This requires
recovery to be halted until data is read by userspace and free
function is called.

Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Tested-by: Sibi Sankar <sibis@codeaurora.org>
---
 drivers/remoteproc/remoteproc_coredump.c | 156 +++++++++++++++++++++++++++----
 include/linux/remoteproc.h               |  16 ++++
 2 files changed, 154 insertions(+), 18 deletions(-)

diff --git a/drivers/remoteproc/remoteproc_coredump.c b/drivers/remoteproc/remoteproc_coredump.c
index 390f563..bb15a29 100644
--- a/drivers/remoteproc/remoteproc_coredump.c
+++ b/drivers/remoteproc/remoteproc_coredump.c
@@ -5,6 +5,7 @@
  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  */
 
+#include <linux/completion.h>
 #include <linux/devcoredump.h>
 #include <linux/device.h>
 #include <linux/kernel.h>
@@ -12,6 +13,12 @@
 #include "remoteproc_internal.h"
 #include "remoteproc_elf_helpers.h"
 
+struct rproc_coredump_state {
+	struct rproc *rproc;
+	void *header;
+	struct completion dump_done;
+};
+
 /**
  * rproc_coredump_cleanup() - clean up dump_segments list
  * @rproc: the remote processor handle
@@ -115,12 +122,110 @@ int rproc_coredump_set_elf_info(struct rproc *rproc, u8 class, u16 machine)
 }
 EXPORT_SYMBOL(rproc_coredump_set_elf_info);
 
+static void rproc_coredump_free(void *data)
+{
+	struct rproc_coredump_state *dump_state = data;
+
+	vfree(dump_state->header);
+	complete(&dump_state->dump_done);
+}
+
+static void *rproc_coredump_find_segment(loff_t user_offset,
+					 struct list_head *segments,
+					 size_t *data_left)
+{
+	struct rproc_dump_segment *segment;
+
+	list_for_each_entry(segment, segments, node) {
+		if (user_offset < segment->size) {
+			*data_left = segment->size - user_offset;
+			return segment;
+		}
+		user_offset -= segment->size;
+	}
+
+	*data_left = 0;
+	return NULL;
+}
+
+static void rproc_copy_segment(struct rproc *rproc, void *dest,
+			       struct rproc_dump_segment *segment,
+			       size_t offset, size_t size)
+{
+	void *ptr;
+
+	if (segment->dump) {
+		segment->dump(rproc, segment, dest, offset, size);
+	} else {
+		ptr = rproc_da_to_va(rproc, segment->da + offset, size);
+		if (!ptr) {
+			dev_err(&rproc->dev,
+				"invalid copy request for segment %pad with offset %zu and size %zu)\n",
+				&segment->da, offset, size);
+			memset(dest, 0xff, size);
+		} else {
+			memcpy(dest, ptr, size);
+		}
+	}
+}
+
+static ssize_t rproc_coredump_read(char *buffer, loff_t offset, size_t count,
+				   void *data, size_t header_sz)
+{
+	size_t seg_data, bytes_left = count;
+	ssize_t copy_sz;
+	struct rproc_dump_segment *seg;
+	struct rproc_coredump_state *dump_state = data;
+	struct rproc *rproc = dump_state->rproc;
+	void *elfcore = dump_state->header;
+
+	/* Copy the vmalloc'ed header first. */
+	if (offset < header_sz) {
+		copy_sz = memory_read_from_buffer(buffer, count, &offset,
+						  elfcore, header_sz);
+
+		return copy_sz;
+	}
+
+	/*
+	 * Find out the segment memory chunk to be copied based on offset.
+	 * Keep copying data until count bytes are read.
+	 */
+	while (bytes_left) {
+		seg = rproc_coredump_find_segment(offset - header_sz,
+						  &rproc->dump_segments,
+						  &seg_data);
+		/* EOF check */
+		if (!seg) {
+			dev_info(&rproc->dev, "Ramdump done, %lld bytes read",
+				 offset);
+			break;
+		}
+
+		copy_sz = min_t(size_t, bytes_left, seg_data);
+
+		rproc_copy_segment(rproc, buffer, seg, seg->size - seg_data,
+				   copy_sz);
+
+		offset += copy_sz;
+		buffer += copy_sz;
+		bytes_left -= copy_sz;
+	}
+
+	return count - bytes_left;
+}
+
 /**
  * rproc_coredump() - perform coredump
  * @rproc:	rproc handle
  *
  * This function will generate an ELF header for the registered segments
- * and create a devcoredump device associated with rproc.
+ * and create a devcoredump device associated with rproc. Based on the
+ * coredump configuration this function will directly copy the segments
+ * from device memory to userspace or copy segments from device memory to
+ * a separate buffer, which can then be read by userspace.
+ * The first approach avoids using extra vmalloc memory. But it will stall
+ * recovery flow until dump is read by userspace.
  */
 void rproc_coredump(struct rproc *rproc)
 {
@@ -130,11 +235,13 @@ void rproc_coredump(struct rproc *rproc)
 	size_t data_size;
 	size_t offset;
 	void *data;
-	void *ptr;
 	u8 class = rproc->elf_class;
 	int phnum = 0;
+	struct rproc_coredump_state dump_state;
+	enum rproc_dump_mechanism dump_conf = rproc->dump_conf;
 
-	if (list_empty(&rproc->dump_segments))
+	if (list_empty(&rproc->dump_segments) ||
+	    dump_conf == RPROC_COREDUMP_DISABLED)
 		return;
 
 	if (class == ELFCLASSNONE) {
@@ -144,7 +251,14 @@ void rproc_coredump(struct rproc *rproc)
 
 	data_size = elf_size_of_hdr(class);
 	list_for_each_entry(segment, &rproc->dump_segments, node) {
-		data_size += elf_size_of_phdr(class) + segment->size;
+		/*
+		 * For default configuration buffer includes headers & segments.
+		 * For inline dump buffer just includes headers as segments are
+		 * directly read from device memory.
+		 */
+		data_size += elf_size_of_phdr(class);
+		if (dump_conf == RPROC_COREDUMP_DEFAULT)
+			data_size += segment->size;
 
 		phnum++;
 	}
@@ -183,23 +297,29 @@ void rproc_coredump(struct rproc *rproc)
 		elf_phdr_set_p_flags(class, phdr, PF_R | PF_W | PF_X);
 		elf_phdr_set_p_align(class, phdr, 0);
 
-		if (segment->dump) {
-			segment->dump(rproc, segment, data + offset, 0, segment->size);
-		} else {
-			ptr = rproc_da_to_va(rproc, segment->da, segment->size);
-			if (!ptr) {
-				dev_err(&rproc->dev,
-					"invalid coredump segment (%pad, %zu)\n",
-					&segment->da, segment->size);
-				memset(data + offset, 0xff, segment->size);
-			} else {
-				memcpy(data + offset, ptr, segment->size);
-			}
-		}
+		if (dump_conf == RPROC_COREDUMP_DEFAULT)
+			rproc_copy_segment(rproc, data + offset, segment, 0,
+					   segment->size);
 
 		offset += elf_phdr_get_p_filesz(class, phdr);
 		phdr += elf_size_of_phdr(class);
 	}
+	if (dump_conf == RPROC_COREDUMP_DEFAULT) {
+		dev_coredumpv(&rproc->dev, data, data_size, GFP_KERNEL);
+		return;
+	}
+
+	/* Initialize the dump state struct to be used by rproc_coredump_read */
+	dump_state.rproc = rproc;
+	dump_state.header = data;
+	init_completion(&dump_state.dump_done);
+
+	dev_coredumpm(&rproc->dev, NULL, &dump_state, data_size, GFP_KERNEL,
+		      rproc_coredump_read, rproc_coredump_free);
 
-	dev_coredumpv(&rproc->dev, data, data_size, GFP_KERNEL);
+	/*
+	 * Wait until the dump is read and free is called. Data is freed
+	 * by devcoredump framework automatically after 5 minutes.
+	 */
+	wait_for_completion(&dump_state.dump_done);
 }
diff --git a/include/linux/remoteproc.h b/include/linux/remoteproc.h
index eb08139..38d037d 100644
--- a/include/linux/remoteproc.h
+++ b/include/linux/remoteproc.h
@@ -435,6 +435,20 @@ enum rproc_crash_type {
 };
 
 /**
+ * enum rproc_dump_mechanism - Coredump options for core
+ * @RPROC_COREDUMP_DEFAULT:	Copy dump to separate buffer and carry on with
+				recovery
+ * @RPROC_COREDUMP_INLINE:	Read segments directly from device memory. Stall
+				recovery until all segments are read
+ * @RPROC_COREDUMP_DISABLED:	Don't perform any dump
+ */
+enum rproc_dump_mechanism {
+	RPROC_COREDUMP_DEFAULT,
+	RPROC_COREDUMP_INLINE,
+	RPROC_COREDUMP_DISABLED,
+};
+
+/**
  * struct rproc_dump_segment - segment info from ELF header
  * @node:	list node related to the rproc segment list
  * @da:		device address of the segment
@@ -466,6 +480,7 @@ struct rproc_dump_segment {
  * @dev: virtual device for refcounting and common remoteproc behavior
  * @power: refcount of users who need this rproc powered up
  * @state: state of the device
+ * @dump_conf: Currently selected coredump configuration
  * @lock: lock which protects concurrent manipulations of the rproc
  * @dbg_dir: debugfs directory of this rproc device
  * @traces: list of trace buffers
@@ -499,6 +514,7 @@ struct rproc {
 	struct device dev;
 	atomic_t power;
 	unsigned int state;
+	enum rproc_dump_mechanism dump_conf;
 	struct mutex lock;
 	struct dentry *dbg_dir;
 	struct list_head traces;
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 5%]

* [PATCH v8 5/5] remoteproc: Add coredump debugfs entry
                     ` (3 preceding siblings ...)
  2020-07-16 22:20  5% ` [PATCH v8 4/5] remoteproc: Add inline coredump functionality Rishabh Bhatnagar
@ 2020-07-16 22:20  7% ` Rishabh Bhatnagar
  4 siblings, 0 replies; 200+ results
From: Rishabh Bhatnagar @ 2020-07-16 22:20 UTC (permalink / raw)
  To: linux-remoteproc, linux-kernel
  Cc: bjorn.andersson, mathieu.poirier, sibis, tsoni, psodagud, sidgup,
	Rishabh Bhatnagar

Add coredump debugfs entry to configure the type of dump that will
be collected during recovery. User can select between default or
inline coredump functionality. Also coredump collection can be
disabled through this interface.
This functionality can be configured differently for different
remote processors.

Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
---
 drivers/remoteproc/remoteproc_debugfs.c | 90 +++++++++++++++++++++++++++++++++
 1 file changed, 90 insertions(+)

diff --git a/drivers/remoteproc/remoteproc_debugfs.c b/drivers/remoteproc/remoteproc_debugfs.c
index 732770e..2e3b3e2 100644
--- a/drivers/remoteproc/remoteproc_debugfs.c
+++ b/drivers/remoteproc/remoteproc_debugfs.c
@@ -28,6 +28,94 @@
 static struct dentry *rproc_dbg;
 
 /*
+ * A coredump-configuration-to-string lookup table, for exposing a
+ * human readable configuration via debugfs. Always keep in sync with
+ * enum rproc_coredump_mechanism
+ */
+static const char * const rproc_coredump_str[] = {
+	[RPROC_COREDUMP_DEFAULT]	= "default",
+	[RPROC_COREDUMP_INLINE]		= "inline",
+	[RPROC_COREDUMP_DISABLED]	= "disabled",
+};
+
+/* Expose the current coredump configuration via debugfs */
+static ssize_t rproc_coredump_read(struct file *filp, char __user *userbuf,
+				   size_t count, loff_t *ppos)
+{
+	struct rproc *rproc = filp->private_data;
+	char buf[20];
+	int len;
+
+	len = scnprintf(buf, sizeof(buf), "%s\n",
+			rproc_coredump_str[rproc->dump_conf]);
+
+	return simple_read_from_buffer(userbuf, count, ppos, buf, len);
+}
+
+/*
+ * By writing to the 'coredump' debugfs entry, we control the behavior of the
+ * coredump mechanism dynamically. The default value of this entry is "default".
+ *
+ * The 'coredump' debugfs entry supports these commands:
+ *
+ * default:	This is the default coredump mechanism. When the remoteproc
+ *		crashes the entire coredump will be copied to a separate buffer
+ *		and exposed to userspace.
+ *
+ * inline:	The coredump will not be copied to a separate buffer and the
+ *		recovery process will have to wait until data is read by
+ *		userspace. But this avoid usage of extra memory.
+ *
+ * disabled:	This will disable coredump. Recovery will proceed without
+ *		collecting any dump.
+ */
+static ssize_t rproc_coredump_write(struct file *filp,
+				    const char __user *user_buf, size_t count,
+				    loff_t *ppos)
+{
+	struct rproc *rproc = filp->private_data;
+	int ret, err = 0;
+	char buf[20];
+
+	if (count > sizeof(buf))
+		return -EINVAL;
+
+	ret = copy_from_user(buf, user_buf, count);
+	if (ret)
+		return -EFAULT;
+
+	/* remove end of line */
+	if (buf[count - 1] == '\n')
+		buf[count - 1] = '\0';
+
+	if (rproc->state == RPROC_CRASHED) {
+		dev_err(&rproc->dev, "can't change coredump configuration\n");
+		err = -EBUSY;
+		goto out;
+	}
+
+	if (!strncmp(buf, "disable", count)) {
+		rproc->dump_conf = RPROC_COREDUMP_DISABLED;
+	} else if (!strncmp(buf, "inline", count)) {
+		rproc->dump_conf = RPROC_COREDUMP_INLINE;
+	} else if (!strncmp(buf, "default", count)) {
+		rproc->dump_conf = RPROC_COREDUMP_DEFAULT;
+	} else {
+		dev_err(&rproc->dev, "Invalid coredump configuration\n");
+		err = -EINVAL;
+	}
+out:
+	return err ? err : count;
+}
+
+static const struct file_operations rproc_coredump_fops = {
+	.read = rproc_coredump_read,
+	.write = rproc_coredump_write,
+	.open = simple_open,
+	.llseek = generic_file_llseek,
+};
+
+/*
  * Some remote processors may support dumping trace logs into a shared
  * memory buffer. We expose this trace buffer using debugfs, so users
  * can easily tell what's going on remotely.
@@ -337,6 +425,8 @@ void rproc_create_debug_dir(struct rproc *rproc)
 			    rproc, &rproc_rsc_table_fops);
 	debugfs_create_file("carveout_memories", 0400, rproc->dbg_dir,
 			    rproc, &rproc_carveouts_fops);
+	debugfs_create_file("coredump", 0600, rproc->dbg_dir,
+			    rproc, &rproc_coredump_fops);
 }
 
 void __init rproc_init_debugfs(void)
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 7%]

* Re: [PATCH] arm64: dts: qcom: sc7180: Move the fixed-perm property to SoC dtsi
  2020-07-16 19:17 22% [PATCH] arm64: dts: qcom: sc7180: Move the fixed-perm property to SoC dtsi Sibi Sankar
@ 2020-07-16 22:37  6% ` Doug Anderson
  2020-07-16 23:40  0% ` Bjorn Andersson
  1 sibling, 0 replies; 200+ results
From: Doug Anderson @ 2020-07-16 22:37 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: Bjorn Andersson, Andy Gross, linux-arm-msm,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, LKML,
	Evan Green, Rakesh Pillai, Rob Herring

Hi,

On Thu, Jul 16, 2020 at 12:18 PM Sibi Sankar <sibis@codeaurora.org> wrote:
>
> All the platforms using SC7180 SoC are expected to have the wlan firmware
> memory statically mapped by the Trusted Firmware. Hence move back the
> qcom,msa-fixed-perm property to the SoC dtsi.
>
> Fixes: 7d484566087c0 ("arm64: dts: qcom: sc7180: Add missing properties for Wifi node")
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7180-idp.dts | 1 -
>  arch/arm64/boot/dts/qcom/sc7180.dtsi    | 1 +
>  2 files changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts
> index 860fc4658b8b1..26cc4913d3ddc 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts
> +++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts
> @@ -392,7 +392,6 @@ video-firmware {
>
>  &wifi {
>         status = "okay";
> -       qcom,msa-fixed-perm;
>         vdd-0.8-cx-mx-supply = <&vreg_l9a_0p6>;
>         vdd-1.8-xo-supply = <&vreg_l1c_1p8>;
>         vdd-1.3-rfa-supply = <&vreg_l2c_1p3>;
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index 126e2fce26c1a..a91d3f074625e 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -3233,6 +3233,7 @@ wifi: wifi@18800000 {
>                                 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH /* CE10 */>,
>                                 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH /* CE11 */>;
>                         memory-region = <&wlan_mem>;
> +                       qcom,msa-fixed-perm;

Seems good to me.  If someone ever comes up with a firmware where it's
sane to not have this property, we can either delete the property from
those boards or migrate the property to the the existing board dts
files.

Reviewed-by: Douglas Anderson <dianders@chromium.org>

^ permalink raw reply	[relevance 6%]

* [PATCH v8 2/5] remoteproc: qcom_q6v5_mss: Replace mask based tracking with size
    2020-07-16 22:20  5% ` [PATCH v8 1/5] remoteproc: Move coredump functionality to a new file Rishabh Bhatnagar
@ 2020-07-16 22:20  8% ` Rishabh Bhatnagar
  2020-07-17  5:01  0%   ` Bjorn Andersson
                     ` (2 subsequent siblings)
  4 siblings, 1 reply; 200+ results
From: Rishabh Bhatnagar @ 2020-07-16 22:20 UTC (permalink / raw)
  To: linux-remoteproc, linux-kernel
  Cc: bjorn.andersson, mathieu.poirier, sibis, tsoni, psodagud, sidgup,
	Sibi Sankar, Rishabh Bhatnagar

From: Sibi Sankar <sibis@codeaurora.org>

In order to land inline coredump support for mss, the dump_segment
function would need to support granularities less than the segment
size. This is achieved by replacing mask based tracking with size.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
---
 drivers/remoteproc/qcom_q6v5_mss.c | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
index feb70283b..037cd45 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -181,8 +181,8 @@ struct q6v5 {
 	bool running;
 
 	bool dump_mba_loaded;
-	unsigned long dump_segment_mask;
-	unsigned long dump_complete_mask;
+	size_t current_dump_size;
+	size_t total_dump_size;
 
 	phys_addr_t mba_phys;
 	void *mba_region;
@@ -1203,7 +1203,6 @@ static void qcom_q6v5_dump_segment(struct rproc *rproc,
 {
 	int ret = 0;
 	struct q6v5 *qproc = rproc->priv;
-	unsigned long mask = BIT((unsigned long)segment->priv);
 	int offset = segment->da - qproc->mpss_reloc;
 	void *ptr = NULL;
 
@@ -1229,10 +1228,10 @@ static void qcom_q6v5_dump_segment(struct rproc *rproc,
 		memset(dest, 0xff, segment->size);
 	}
 
-	qproc->dump_segment_mask |= mask;
+	qproc->current_dump_size += segment->size;
 
 	/* Reclaim mba after copying segments */
-	if (qproc->dump_segment_mask == qproc->dump_complete_mask) {
+	if (qproc->current_dump_size == qproc->total_dump_size) {
 		if (qproc->dump_mba_loaded) {
 			/* Try to reset ownership back to Q6 */
 			q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm,
@@ -1274,7 +1273,7 @@ static int q6v5_start(struct rproc *rproc)
 			"Failed to reclaim mba buffer system may become unstable\n");
 
 	/* Reset Dump Segment Mask */
-	qproc->dump_segment_mask = 0;
+	qproc->current_dump_size = 0;
 	qproc->running = true;
 
 	return 0;
@@ -1323,7 +1322,7 @@ static int qcom_q6v5_register_dump_segments(struct rproc *rproc,
 
 	ehdr = (struct elf32_hdr *)fw->data;
 	phdrs = (struct elf32_phdr *)(ehdr + 1);
-	qproc->dump_complete_mask = 0;
+	qproc->total_dump_size = 0;
 
 	for (i = 0; i < ehdr->e_phnum; i++) {
 		phdr = &phdrs[i];
@@ -1334,11 +1333,11 @@ static int qcom_q6v5_register_dump_segments(struct rproc *rproc,
 		ret = rproc_coredump_add_custom_segment(rproc, phdr->p_paddr,
 							phdr->p_memsz,
 							qcom_q6v5_dump_segment,
-							(void *)i);
+							NULL);
 		if (ret)
 			break;
 
-		qproc->dump_complete_mask |= BIT(i);
+		qproc->total_dump_size += phdr->p_memsz;
 	}
 
 	release_firmware(fw);
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 8%]

* [PATCH v8 1/5] remoteproc: Move coredump functionality to a new file
  @ 2020-07-16 22:20  5% ` Rishabh Bhatnagar
  2020-07-16 22:20  8% ` [PATCH v8 2/5] remoteproc: qcom_q6v5_mss: Replace mask based tracking with size Rishabh Bhatnagar
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 200+ results
From: Rishabh Bhatnagar @ 2020-07-16 22:20 UTC (permalink / raw)
  To: linux-remoteproc, linux-kernel
  Cc: bjorn.andersson, mathieu.poirier, sibis, tsoni, psodagud, sidgup,
	Rishabh Bhatnagar

Move all coredump functionality to an individual file. This is
being done so that the current functionality can be extended
in future patchsets.

Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Tested-by: Sibi Sankar <sibis@codeaurora.org>
---
 drivers/remoteproc/Makefile              |   1 +
 drivers/remoteproc/remoteproc_core.c     | 191 -----------------------------
 drivers/remoteproc/remoteproc_coredump.c | 204 +++++++++++++++++++++++++++++++
 drivers/remoteproc/remoteproc_internal.h |   4 +
 4 files changed, 209 insertions(+), 191 deletions(-)
 create mode 100644 drivers/remoteproc/remoteproc_coredump.c

diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
index e8b886e..8702a4e 100644
--- a/drivers/remoteproc/Makefile
+++ b/drivers/remoteproc/Makefile
@@ -5,6 +5,7 @@
 
 obj-$(CONFIG_REMOTEPROC)		+= remoteproc.o
 remoteproc-y				:= remoteproc_core.o
+remoteproc-y				+= remoteproc_coredump.o
 remoteproc-y				+= remoteproc_debugfs.o
 remoteproc-y				+= remoteproc_sysfs.o
 remoteproc-y				+= remoteproc_virtio.o
diff --git a/drivers/remoteproc/remoteproc_core.c b/drivers/remoteproc/remoteproc_core.c
index 9f04c30..57db042 100644
--- a/drivers/remoteproc/remoteproc_core.c
+++ b/drivers/remoteproc/remoteproc_core.c
@@ -26,7 +26,6 @@
 #include <linux/firmware.h>
 #include <linux/string.h>
 #include <linux/debugfs.h>
-#include <linux/devcoredump.h>
 #include <linux/rculist.h>
 #include <linux/remoteproc.h>
 #include <linux/pm_runtime.h>
@@ -41,7 +40,6 @@
 #include <linux/platform_device.h>
 
 #include "remoteproc_internal.h"
-#include "remoteproc_elf_helpers.h"
 
 #define HIGH_BITS_MASK 0xFFFFFFFF00000000ULL
 
@@ -1239,19 +1237,6 @@ static int rproc_alloc_registered_carveouts(struct rproc *rproc)
 	return 0;
 }
 
-/**
- * rproc_coredump_cleanup() - clean up dump_segments list
- * @rproc: the remote processor handle
- */
-static void rproc_coredump_cleanup(struct rproc *rproc)
-{
-	struct rproc_dump_segment *entry, *tmp;
-
-	list_for_each_entry_safe(entry, tmp, &rproc->dump_segments, node) {
-		list_del(&entry->node);
-		kfree(entry);
-	}
-}
 
 /**
  * rproc_resource_cleanup() - clean up and free all acquired resources
@@ -1518,182 +1503,6 @@ static int rproc_stop(struct rproc *rproc, bool crashed)
 	return 0;
 }
 
-/**
- * rproc_coredump_add_segment() - add segment of device memory to coredump
- * @rproc:	handle of a remote processor
- * @da:		device address
- * @size:	size of segment
- *
- * Add device memory to the list of segments to be included in a coredump for
- * the remoteproc.
- *
- * Return: 0 on success, negative errno on error.
- */
-int rproc_coredump_add_segment(struct rproc *rproc, dma_addr_t da, size_t size)
-{
-	struct rproc_dump_segment *segment;
-
-	segment = kzalloc(sizeof(*segment), GFP_KERNEL);
-	if (!segment)
-		return -ENOMEM;
-
-	segment->da = da;
-	segment->size = size;
-
-	list_add_tail(&segment->node, &rproc->dump_segments);
-
-	return 0;
-}
-EXPORT_SYMBOL(rproc_coredump_add_segment);
-
-/**
- * rproc_coredump_add_custom_segment() - add custom coredump segment
- * @rproc:	handle of a remote processor
- * @da:		device address
- * @size:	size of segment
- * @dumpfn:	custom dump function called for each segment during coredump
- * @priv:	private data
- *
- * Add device memory to the list of segments to be included in the coredump
- * and associate the segment with the given custom dump function and private
- * data.
- *
- * Return: 0 on success, negative errno on error.
- */
-int rproc_coredump_add_custom_segment(struct rproc *rproc,
-				      dma_addr_t da, size_t size,
-				      void (*dumpfn)(struct rproc *rproc,
-						     struct rproc_dump_segment *segment,
-						     void *dest),
-				      void *priv)
-{
-	struct rproc_dump_segment *segment;
-
-	segment = kzalloc(sizeof(*segment), GFP_KERNEL);
-	if (!segment)
-		return -ENOMEM;
-
-	segment->da = da;
-	segment->size = size;
-	segment->priv = priv;
-	segment->dump = dumpfn;
-
-	list_add_tail(&segment->node, &rproc->dump_segments);
-
-	return 0;
-}
-EXPORT_SYMBOL(rproc_coredump_add_custom_segment);
-
-/**
- * rproc_coredump_set_elf_info() - set coredump elf information
- * @rproc:	handle of a remote processor
- * @class:	elf class for coredump elf file
- * @machine:	elf machine for coredump elf file
- *
- * Set elf information which will be used for coredump elf file.
- *
- * Return: 0 on success, negative errno on error.
- */
-int rproc_coredump_set_elf_info(struct rproc *rproc, u8 class, u16 machine)
-{
-	if (class != ELFCLASS64 && class != ELFCLASS32)
-		return -EINVAL;
-
-	rproc->elf_class = class;
-	rproc->elf_machine = machine;
-
-	return 0;
-}
-EXPORT_SYMBOL(rproc_coredump_set_elf_info);
-
-/**
- * rproc_coredump() - perform coredump
- * @rproc:	rproc handle
- *
- * This function will generate an ELF header for the registered segments
- * and create a devcoredump device associated with rproc.
- */
-static void rproc_coredump(struct rproc *rproc)
-{
-	struct rproc_dump_segment *segment;
-	void *phdr;
-	void *ehdr;
-	size_t data_size;
-	size_t offset;
-	void *data;
-	void *ptr;
-	u8 class = rproc->elf_class;
-	int phnum = 0;
-
-	if (list_empty(&rproc->dump_segments))
-		return;
-
-	if (class == ELFCLASSNONE) {
-		dev_err(&rproc->dev, "Elf class is not set\n");
-		return;
-	}
-
-	data_size = elf_size_of_hdr(class);
-	list_for_each_entry(segment, &rproc->dump_segments, node) {
-		data_size += elf_size_of_phdr(class) + segment->size;
-
-		phnum++;
-	}
-
-	data = vmalloc(data_size);
-	if (!data)
-		return;
-
-	ehdr = data;
-
-	memset(ehdr, 0, elf_size_of_hdr(class));
-	/* e_ident field is common for both elf32 and elf64 */
-	elf_hdr_init_ident(ehdr, class);
-
-	elf_hdr_set_e_type(class, ehdr, ET_CORE);
-	elf_hdr_set_e_machine(class, ehdr, rproc->elf_machine);
-	elf_hdr_set_e_version(class, ehdr, EV_CURRENT);
-	elf_hdr_set_e_entry(class, ehdr, rproc->bootaddr);
-	elf_hdr_set_e_phoff(class, ehdr, elf_size_of_hdr(class));
-	elf_hdr_set_e_ehsize(class, ehdr, elf_size_of_hdr(class));
-	elf_hdr_set_e_phentsize(class, ehdr, elf_size_of_phdr(class));
-	elf_hdr_set_e_phnum(class, ehdr, phnum);
-
-	phdr = data + elf_hdr_get_e_phoff(class, ehdr);
-	offset = elf_hdr_get_e_phoff(class, ehdr);
-	offset += elf_size_of_phdr(class) * elf_hdr_get_e_phnum(class, ehdr);
-
-	list_for_each_entry(segment, &rproc->dump_segments, node) {
-		memset(phdr, 0, elf_size_of_phdr(class));
-		elf_phdr_set_p_type(class, phdr, PT_LOAD);
-		elf_phdr_set_p_offset(class, phdr, offset);
-		elf_phdr_set_p_vaddr(class, phdr, segment->da);
-		elf_phdr_set_p_paddr(class, phdr, segment->da);
-		elf_phdr_set_p_filesz(class, phdr, segment->size);
-		elf_phdr_set_p_memsz(class, phdr, segment->size);
-		elf_phdr_set_p_flags(class, phdr, PF_R | PF_W | PF_X);
-		elf_phdr_set_p_align(class, phdr, 0);
-
-		if (segment->dump) {
-			segment->dump(rproc, segment, data + offset);
-		} else {
-			ptr = rproc_da_to_va(rproc, segment->da, segment->size);
-			if (!ptr) {
-				dev_err(&rproc->dev,
-					"invalid coredump segment (%pad, %zu)\n",
-					&segment->da, segment->size);
-				memset(data + offset, 0xff, segment->size);
-			} else {
-				memcpy(data + offset, ptr, segment->size);
-			}
-		}
-
-		offset += elf_phdr_get_p_filesz(class, phdr);
-		phdr += elf_size_of_phdr(class);
-	}
-
-	dev_coredumpv(&rproc->dev, data, data_size, GFP_KERNEL);
-}
 
 /**
  * rproc_trigger_recovery() - recover a remoteproc
diff --git a/drivers/remoteproc/remoteproc_coredump.c b/drivers/remoteproc/remoteproc_coredump.c
new file mode 100644
index 0000000..ded0244
--- /dev/null
+++ b/drivers/remoteproc/remoteproc_coredump.c
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Coredump functionality for Remoteproc framework.
+ *
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ */
+
+#include <linux/devcoredump.h>
+#include <linux/device.h>
+#include <linux/kernel.h>
+#include <linux/remoteproc.h>
+#include "remoteproc_internal.h"
+#include "remoteproc_elf_helpers.h"
+
+/**
+ * rproc_coredump_cleanup() - clean up dump_segments list
+ * @rproc: the remote processor handle
+ */
+void rproc_coredump_cleanup(struct rproc *rproc)
+{
+	struct rproc_dump_segment *entry, *tmp;
+
+	list_for_each_entry_safe(entry, tmp, &rproc->dump_segments, node) {
+		list_del(&entry->node);
+		kfree(entry);
+	}
+}
+
+/**
+ * rproc_coredump_add_segment() - add segment of device memory to coredump
+ * @rproc:	handle of a remote processor
+ * @da:		device address
+ * @size:	size of segment
+ *
+ * Add device memory to the list of segments to be included in a coredump for
+ * the remoteproc.
+ *
+ * Return: 0 on success, negative errno on error.
+ */
+int rproc_coredump_add_segment(struct rproc *rproc, dma_addr_t da, size_t size)
+{
+	struct rproc_dump_segment *segment;
+
+	segment = kzalloc(sizeof(*segment), GFP_KERNEL);
+	if (!segment)
+		return -ENOMEM;
+
+	segment->da = da;
+	segment->size = size;
+
+	list_add_tail(&segment->node, &rproc->dump_segments);
+
+	return 0;
+}
+EXPORT_SYMBOL(rproc_coredump_add_segment);
+
+/**
+ * rproc_coredump_add_custom_segment() - add custom coredump segment
+ * @rproc:	handle of a remote processor
+ * @da:		device address
+ * @size:	size of segment
+ * @dumpfn:	custom dump function called for each segment during coredump
+ * @priv:	private data
+ *
+ * Add device memory to the list of segments to be included in the coredump
+ * and associate the segment with the given custom dump function and private
+ * data.
+ *
+ * Return: 0 on success, negative errno on error.
+ */
+int rproc_coredump_add_custom_segment(struct rproc *rproc,
+				      dma_addr_t da, size_t size,
+				      void (*dumpfn)(struct rproc *rproc,
+						     struct rproc_dump_segment *segment,
+						     void *dest),
+				      void *priv)
+{
+	struct rproc_dump_segment *segment;
+
+	segment = kzalloc(sizeof(*segment), GFP_KERNEL);
+	if (!segment)
+		return -ENOMEM;
+
+	segment->da = da;
+	segment->size = size;
+	segment->priv = priv;
+	segment->dump = dumpfn;
+
+	list_add_tail(&segment->node, &rproc->dump_segments);
+
+	return 0;
+}
+EXPORT_SYMBOL(rproc_coredump_add_custom_segment);
+
+/**
+ * rproc_coredump_set_elf_info() - set coredump elf information
+ * @rproc:	handle of a remote processor
+ * @class:	elf class for coredump elf file
+ * @machine:	elf machine for coredump elf file
+ *
+ * Set elf information which will be used for coredump elf file.
+ *
+ * Return: 0 on success, negative errno on error.
+ */
+int rproc_coredump_set_elf_info(struct rproc *rproc, u8 class, u16 machine)
+{
+	if (class != ELFCLASS64 && class != ELFCLASS32)
+		return -EINVAL;
+
+	rproc->elf_class = class;
+	rproc->elf_machine = machine;
+
+	return 0;
+}
+EXPORT_SYMBOL(rproc_coredump_set_elf_info);
+
+/**
+ * rproc_coredump() - perform coredump
+ * @rproc:	rproc handle
+ *
+ * This function will generate an ELF header for the registered segments
+ * and create a devcoredump device associated with rproc.
+ */
+void rproc_coredump(struct rproc *rproc)
+{
+	struct rproc_dump_segment *segment;
+	void *phdr;
+	void *ehdr;
+	size_t data_size;
+	size_t offset;
+	void *data;
+	void *ptr;
+	u8 class = rproc->elf_class;
+	int phnum = 0;
+
+	if (list_empty(&rproc->dump_segments))
+		return;
+
+	if (class == ELFCLASSNONE) {
+		dev_err(&rproc->dev, "Elf class is not set\n");
+		return;
+	}
+
+	data_size = elf_size_of_hdr(class);
+	list_for_each_entry(segment, &rproc->dump_segments, node) {
+		data_size += elf_size_of_phdr(class) + segment->size;
+
+		phnum++;
+	}
+
+	data = vmalloc(data_size);
+	if (!data)
+		return;
+
+	ehdr = data;
+
+	memset(ehdr, 0, elf_size_of_hdr(class));
+	/* e_ident field is common for both elf32 and elf64 */
+	elf_hdr_init_ident(ehdr, class);
+
+	elf_hdr_set_e_type(class, ehdr, ET_CORE);
+	elf_hdr_set_e_machine(class, ehdr, rproc->elf_machine);
+	elf_hdr_set_e_version(class, ehdr, EV_CURRENT);
+	elf_hdr_set_e_entry(class, ehdr, rproc->bootaddr);
+	elf_hdr_set_e_phoff(class, ehdr, elf_size_of_hdr(class));
+	elf_hdr_set_e_ehsize(class, ehdr, elf_size_of_hdr(class));
+	elf_hdr_set_e_phentsize(class, ehdr, elf_size_of_phdr(class));
+	elf_hdr_set_e_phnum(class, ehdr, phnum);
+
+	phdr = data + elf_hdr_get_e_phoff(class, ehdr);
+	offset = elf_hdr_get_e_phoff(class, ehdr);
+	offset += elf_size_of_phdr(class) * elf_hdr_get_e_phnum(class, ehdr);
+
+	list_for_each_entry(segment, &rproc->dump_segments, node) {
+		memset(phdr, 0, elf_size_of_phdr(class));
+		elf_phdr_set_p_type(class, phdr, PT_LOAD);
+		elf_phdr_set_p_offset(class, phdr, offset);
+		elf_phdr_set_p_vaddr(class, phdr, segment->da);
+		elf_phdr_set_p_paddr(class, phdr, segment->da);
+		elf_phdr_set_p_filesz(class, phdr, segment->size);
+		elf_phdr_set_p_memsz(class, phdr, segment->size);
+		elf_phdr_set_p_flags(class, phdr, PF_R | PF_W | PF_X);
+		elf_phdr_set_p_align(class, phdr, 0);
+
+		if (segment->dump) {
+			segment->dump(rproc, segment, data + offset);
+		} else {
+			ptr = rproc_da_to_va(rproc, segment->da, segment->size);
+			if (!ptr) {
+				dev_err(&rproc->dev,
+					"invalid coredump segment (%pad, %zu)\n",
+					&segment->da, segment->size);
+				memset(data + offset, 0xff, segment->size);
+			} else {
+				memcpy(data + offset, ptr, segment->size);
+			}
+		}
+
+		offset += elf_phdr_get_p_filesz(class, phdr);
+		phdr += elf_size_of_phdr(class);
+	}
+
+	dev_coredumpv(&rproc->dev, data, data_size, GFP_KERNEL);
+}
diff --git a/drivers/remoteproc/remoteproc_internal.h b/drivers/remoteproc/remoteproc_internal.h
index 4ba7cb5..97d441b 100644
--- a/drivers/remoteproc/remoteproc_internal.h
+++ b/drivers/remoteproc/remoteproc_internal.h
@@ -47,6 +47,10 @@ extern struct class rproc_class;
 int rproc_init_sysfs(void);
 void rproc_exit_sysfs(void);
 
+/* from remoteproc_coredump.c */
+void rproc_coredump_cleanup(struct rproc *rproc);
+void rproc_coredump(struct rproc *rproc);
+
 void rproc_free_vring(struct rproc_vring *rvring);
 int rproc_alloc_vring(struct rproc_vdev *rvdev, int i);
 
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 5%]

* Re: [PATCH] arm64: dts: qcom: sc7180: Move the fixed-perm property to SoC dtsi
  2020-07-16 19:17 22% [PATCH] arm64: dts: qcom: sc7180: Move the fixed-perm property to SoC dtsi Sibi Sankar
  2020-07-16 22:37  6% ` Doug Anderson
@ 2020-07-16 23:40  0% ` Bjorn Andersson
  1 sibling, 0 replies; 200+ results
From: Bjorn Andersson @ 2020-07-16 23:40 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: agross, linux-arm-msm, devicetree, linux-kernel, evgreen,
	dianders, pillair, robh+dt

On Thu 16 Jul 12:17 PDT 2020, Sibi Sankar wrote:

> All the platforms using SC7180 SoC are expected to have the wlan firmware
> memory statically mapped by the Trusted Firmware. Hence move back the
> qcom,msa-fixed-perm property to the SoC dtsi.
> 
> Fixes: 7d484566087c0 ("arm64: dts: qcom: sc7180: Add missing properties for Wifi node")
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>

Thank you, applied.

> ---
>  arch/arm64/boot/dts/qcom/sc7180-idp.dts | 1 -
>  arch/arm64/boot/dts/qcom/sc7180.dtsi    | 1 +
>  2 files changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts
> index 860fc4658b8b1..26cc4913d3ddc 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts
> +++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts
> @@ -392,7 +392,6 @@ video-firmware {
>  
>  &wifi {
>  	status = "okay";
> -	qcom,msa-fixed-perm;
>  	vdd-0.8-cx-mx-supply = <&vreg_l9a_0p6>;
>  	vdd-1.8-xo-supply = <&vreg_l1c_1p8>;
>  	vdd-1.3-rfa-supply = <&vreg_l2c_1p3>;
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index 126e2fce26c1a..a91d3f074625e 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -3233,6 +3233,7 @@ wifi: wifi@18800000 {
>  				<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH /* CE10 */>,
>  				<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH /* CE11 */>;
>  			memory-region = <&wlan_mem>;
> +			qcom,msa-fixed-perm;
>  			status = "disabled";
>  		};
>  	};
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* Re: [PATCH 1/3] remoteproc: qcom_q6v5_mss: Add modem debug policy support
  2020-07-16 12:36 21% ` [PATCH 1/3] remoteproc: qcom_q6v5_mss: Add modem debug policy support Sibi Sankar
@ 2020-07-17  4:41  0%   ` Bjorn Andersson
  2020-07-17  5:07  6%     ` Sibi Sankar
  0 siblings, 1 reply; 200+ results
From: Bjorn Andersson @ 2020-07-17  4:41 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen, ohad

On Thu 16 Jul 05:36 PDT 2020, Sibi Sankar wrote:

> Add modem debug policy support which will enable coredumps and live
> debug support when the msadp firmware is present on secure devices.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> ---
>  drivers/remoteproc/qcom_q6v5_mss.c | 15 ++++++++++++++-
>  1 file changed, 14 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> index 13c6d5a72a831..95e21ed607cb9 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> @@ -187,6 +187,7 @@ struct q6v5 {
>  	phys_addr_t mba_phys;
>  	void *mba_region;
>  	size_t mba_size;
> +	size_t dp_size;
>  
>  	phys_addr_t mpss_phys;
>  	phys_addr_t mpss_reloc;
> @@ -406,6 +407,13 @@ static int q6v5_xfer_mem_ownership(struct q6v5 *qproc, int *current_perm,
>  static int q6v5_load(struct rproc *rproc, const struct firmware *fw)
>  {
>  	struct q6v5 *qproc = rproc->priv;
> +	const struct firmware *dp_fw;
> +
> +	if (!request_firmware(&dp_fw, "msadp", qproc->dev) && fw->size <= SZ_1M) {

Can we change this to a request_firmware_direct() to avoid the fact that
as written here devices lacking this file will pause here for 60 seconds
waiting for userspace to assist in loading it (which at least none of my
systems do).

I also think that while it's nice to check that fw->size <= SZ_1M, to
avoid overwriting the tail of it, you should check that SZ_1M +
dp_fw->size < mba_size. To ensure that the memcpy doesn't go out of
bounds.

> +		memcpy(qproc->mba_region + SZ_1M, dp_fw->data, dp_fw->size);
> +		qproc->dp_size = dp_fw->size;
> +		release_firmware(dp_fw);
> +	}
>  
>  	memcpy(qproc->mba_region, fw->data, fw->size);
>  
> @@ -896,6 +904,10 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>  	}
>  
>  	writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG);
> +	if (qproc->dp_size) {
> +		writel(qproc->mba_phys + SZ_1M, qproc->rmb_base + RMB_PMI_CODE_START_REG);
> +		writel(qproc->dp_size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG);
> +	}
>  
>  	ret = q6v5proc_reset(qproc);
>  	if (ret)
> @@ -1258,7 +1270,8 @@ static int q6v5_start(struct rproc *rproc)
>  	if (ret)
>  		return ret;
>  
> -	dev_info(qproc->dev, "MBA booted, loading mpss\n");
> +	dev_info(qproc->dev, "MBA booted, debug policy %s, loading mpss\n",
> +		 qproc->dp_size ? "enabled" : "disabled");

"MBA booted with%s debug policy, loading mpss\n", qproc->dp_size ? "" : "out"

Please.

Regards,
Bjorn

>  
>  	ret = q6v5_mpss_load(qproc);
>  	if (ret)
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* Re: [PATCH 2/3] remoteproc: qcom_q6v5_mss: Add MBA log extraction support
  2020-07-16 12:36 18% ` [PATCH 2/3] remoteproc: qcom_q6v5_mss: Add MBA log extraction support Sibi Sankar
  2020-07-16 13:43  0%   ` Manivannan Sadhasivam
@ 2020-07-17  4:57  0%   ` Bjorn Andersson
  2020-07-17  5:22  6%     ` Sibi Sankar
  1 sibling, 1 reply; 200+ results
From: Bjorn Andersson @ 2020-07-17  4:57 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen, ohad

On Thu 16 Jul 05:36 PDT 2020, Sibi Sankar wrote:

> On SC7180 the MBA firmware stores the bootup text logs in a 4K segment
> at the beginning of the MBA region. Add support to extract the logs
> which will be useful to debug mba boot/authentication issues.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> ---
>  drivers/remoteproc/qcom_q6v5_mss.c | 41 ++++++++++++++++++++++++++----
>  1 file changed, 36 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> index 95e21ed607cb9..4ddf084b2c6fc 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> @@ -9,6 +9,7 @@
>  
>  #include <linux/clk.h>
>  #include <linux/delay.h>
> +#include <linux/devcoredump.h>
>  #include <linux/dma-mapping.h>
>  #include <linux/interrupt.h>
>  #include <linux/kernel.h>
> @@ -37,6 +38,8 @@
>  
>  #define MPSS_CRASH_REASON_SMEM		421
>  
> +#define MBA_LOG_SIZE			SZ_4K
> +
>  /* RMB Status Register Values */
>  #define RMB_PBL_SUCCESS			0x1
>  
> @@ -139,6 +142,7 @@ struct rproc_hexagon_res {
>  	int version;
>  	bool need_mem_protection;
>  	bool has_alt_reset;
> +	bool has_mba_logs;
>  	bool has_spare_reg;
>  };
>  
> @@ -200,6 +204,7 @@ struct q6v5 {
>  	struct qcom_sysmon *sysmon;
>  	bool need_mem_protection;
>  	bool has_alt_reset;
> +	bool has_mba_logs;
>  	bool has_spare_reg;
>  	int mpss_perm;
>  	int mba_perm;
> @@ -518,6 +523,19 @@ static int q6v5_rmb_mba_wait(struct q6v5 *qproc, u32 status, int ms)
>  	return val;
>  }
>  
> +static void q6v5_dump_mba_logs(struct q6v5 *qproc)
> +{
> +	struct rproc *rproc = qproc->rproc;
> +	void *data;
> +
> +	data = vmalloc(MBA_LOG_SIZE);
> +	if (!data)
> +		return;
> +
> +	memcpy(data, qproc->mba_region, MBA_LOG_SIZE);
> +	dev_coredumpv(&rproc->dev, data, MBA_LOG_SIZE, GFP_KERNEL);
> +}
> +
>  static int q6v5proc_reset(struct q6v5 *qproc)
>  {
>  	u32 val;
> @@ -838,6 +856,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>  {
>  	int ret;
>  	int xfermemop_ret;
> +	bool mba_load_err = false;
>  
>  	qcom_q6v5_prepare(&qproc->q6v5);
>  
> @@ -931,7 +950,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc);
> -
> +	mba_load_err = true;
>  reclaim_mba:
>  	xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true,
>  						false, qproc->mba_phys,
> @@ -939,6 +958,8 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>  	if (xfermemop_ret) {
>  		dev_err(qproc->dev,
>  			"Failed to reclaim mba buffer, system may become unstable\n");
> +	} else if (qproc->has_mba_logs & mba_load_err) {
> +		q6v5_dump_mba_logs(qproc);
>  	}
>  
>  disable_active_clks:
> @@ -968,7 +989,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>  	return ret;
>  }
>  
> -static void q6v5_mba_reclaim(struct q6v5 *qproc)
> +static void q6v5_mba_reclaim(struct q6v5 *qproc, bool err_path)
>  {
>  	int ret;
>  	u32 val;
> @@ -1006,6 +1027,9 @@ static void q6v5_mba_reclaim(struct q6v5 *qproc)
>  				      qproc->mba_size);
>  	WARN_ON(ret);
>  
> +	if (qproc->has_mba_logs && err_path && !ret)

Wouldn't it be possible to just call q6v5_dump_mba_logs() directly after
the return from q6v5_mba_reclaim()? That way we can avoid passing the
bool to indicate if the reclaim should also dump some stuff.

Sure we don't have a way to tell if the assign_mem failed, but we're
going to crash shortly anyways (which is something we should change).



I think you should move the has_mba_logs into q6v5_dump_mba_logs(),
making it cause an early return.

Regards,
Bjorn

> +		q6v5_dump_mba_logs(qproc);
> +
>  	ret = qcom_q6v5_unprepare(&qproc->q6v5);
>  	if (ret) {
>  		q6v5_pds_disable(qproc, qproc->proxy_pds,
> @@ -1255,7 +1279,7 @@ static void qcom_q6v5_dump_segment(struct rproc *rproc,
>  						false, true,
>  						qproc->mpss_phys,
>  						qproc->mpss_size);
> -			q6v5_mba_reclaim(qproc);
> +			q6v5_mba_reclaim(qproc, false);
>  		}
>  	}
>  }
> @@ -1297,7 +1321,7 @@ static int q6v5_start(struct rproc *rproc)
>  	return 0;
>  
>  reclaim_mpss:
> -	q6v5_mba_reclaim(qproc);
> +	q6v5_mba_reclaim(qproc, true);
>  
>  	return ret;
>  }
> @@ -1313,7 +1337,7 @@ static int q6v5_stop(struct rproc *rproc)
>  	if (ret == -ETIMEDOUT)
>  		dev_err(qproc->dev, "timed out on wait\n");
>  
> -	q6v5_mba_reclaim(qproc);
> +	q6v5_mba_reclaim(qproc, false);
>  
>  	return 0;
>  }
> @@ -1717,6 +1741,7 @@ static int q6v5_probe(struct platform_device *pdev)
>  
>  	qproc->version = desc->version;
>  	qproc->need_mem_protection = desc->need_mem_protection;
> +	qproc->has_mba_logs = desc->has_mba_logs;
>  
>  	ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM,
>  			     qcom_msa_handover);
> @@ -1808,6 +1833,7 @@ static const struct rproc_hexagon_res sc7180_mss = {
>  	},
>  	.need_mem_protection = true,
>  	.has_alt_reset = false,
> +	.has_mba_logs = true,
>  	.has_spare_reg = true,
>  	.version = MSS_SC7180,
>  };
> @@ -1843,6 +1869,7 @@ static const struct rproc_hexagon_res sdm845_mss = {
>  	},
>  	.need_mem_protection = true,
>  	.has_alt_reset = true,
> +	.has_mba_logs = true,
>  	.has_spare_reg = false,
>  	.version = MSS_SDM845,
>  };
> @@ -1870,6 +1897,7 @@ static const struct rproc_hexagon_res msm8998_mss = {
>  	},
>  	.need_mem_protection = true,
>  	.has_alt_reset = false,
> +	.has_mba_logs = false,
>  	.has_spare_reg = false,
>  	.version = MSS_MSM8998,
>  };
> @@ -1900,6 +1928,7 @@ static const struct rproc_hexagon_res msm8996_mss = {
>  	},
>  	.need_mem_protection = true,
>  	.has_alt_reset = false,
> +	.has_mba_logs = false,
>  	.has_spare_reg = false,
>  	.version = MSS_MSM8996,
>  };
> @@ -1933,6 +1962,7 @@ static const struct rproc_hexagon_res msm8916_mss = {
>  	},
>  	.need_mem_protection = false,
>  	.has_alt_reset = false,
> +	.has_mba_logs = false,
>  	.has_spare_reg = false,
>  	.version = MSS_MSM8916,
>  };
> @@ -1974,6 +2004,7 @@ static const struct rproc_hexagon_res msm8974_mss = {
>  	},
>  	.need_mem_protection = false,
>  	.has_alt_reset = false,
> +	.has_mba_logs = false,
>  	.has_spare_reg = false,
>  	.version = MSS_MSM8974,
>  };
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* Re: [PATCH 3/3] remoteproc: qcom_q6v5_mss: Update MBA log info
  2020-07-16 12:36 22% ` [PATCH 3/3] remoteproc: qcom_q6v5_mss: Update MBA log info Sibi Sankar
@ 2020-07-17  4:59  0%   ` Bjorn Andersson
  2020-07-17  5:28  6%     ` Sibi Sankar
  0 siblings, 1 reply; 200+ results
From: Bjorn Andersson @ 2020-07-17  4:59 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen, ohad

On Thu 16 Jul 05:36 PDT 2020, Sibi Sankar wrote:

> Update MBA text logs location/size in IMEM to aid tools extract
> them after ramdump collection.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> ---
>  drivers/remoteproc/qcom_q6v5_mss.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> index 4ddf084b2c6fc..539594ab955f1 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> @@ -932,6 +932,9 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>  	if (ret)
>  		goto reclaim_mba;
>  
> +	if (qproc->has_mba_logs)
> +		qcom_pil_info_store("mba", qproc->mba_phys, MBA_LOG_SIZE);

Is there a reason why we don't unconditionally write this to the PIL
info? And why it shouldn't be mba_size?

Regards,
Bjorn

> +
>  	ret = q6v5_rmb_mba_wait(qproc, 0, 5000);
>  	if (ret == -ETIMEDOUT) {
>  		dev_err(qproc->dev, "MBA boot timed out\n");
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* Re: [PATCH v8 2/5] remoteproc: qcom_q6v5_mss: Replace mask based tracking with size
  2020-07-16 22:20  8% ` [PATCH v8 2/5] remoteproc: qcom_q6v5_mss: Replace mask based tracking with size Rishabh Bhatnagar
@ 2020-07-17  5:01  0%   ` Bjorn Andersson
  0 siblings, 0 replies; 200+ results
From: Bjorn Andersson @ 2020-07-17  5:01 UTC (permalink / raw)
  To: Rishabh Bhatnagar
  Cc: linux-remoteproc, linux-kernel, mathieu.poirier, sibis, tsoni,
	psodagud, sidgup, Sibi Sankar

On Thu 16 Jul 15:20 PDT 2020, Rishabh Bhatnagar wrote:

> From: Sibi Sankar <sibis@codeaurora.org>
> 
> In order to land inline coredump support for mss, the dump_segment
> function would need to support granularities less than the segment
> size. This is achieved by replacing mask based tracking with size.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> ---
>  drivers/remoteproc/qcom_q6v5_mss.c | 17 ++++++++---------
>  1 file changed, 8 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> index feb70283b..037cd45 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> @@ -181,8 +181,8 @@ struct q6v5 {
>  	bool running;
>  
>  	bool dump_mba_loaded;
> -	unsigned long dump_segment_mask;
> -	unsigned long dump_complete_mask;
> +	size_t current_dump_size;
> +	size_t total_dump_size;
>  
>  	phys_addr_t mba_phys;
>  	void *mba_region;
> @@ -1203,7 +1203,6 @@ static void qcom_q6v5_dump_segment(struct rproc *rproc,
>  {
>  	int ret = 0;
>  	struct q6v5 *qproc = rproc->priv;
> -	unsigned long mask = BIT((unsigned long)segment->priv);
>  	int offset = segment->da - qproc->mpss_reloc;
>  	void *ptr = NULL;
>  
> @@ -1229,10 +1228,10 @@ static void qcom_q6v5_dump_segment(struct rproc *rproc,
>  		memset(dest, 0xff, segment->size);
>  	}
>  
> -	qproc->dump_segment_mask |= mask;
> +	qproc->current_dump_size += segment->size;
>  
>  	/* Reclaim mba after copying segments */
> -	if (qproc->dump_segment_mask == qproc->dump_complete_mask) {
> +	if (qproc->current_dump_size == qproc->total_dump_size) {
>  		if (qproc->dump_mba_loaded) {
>  			/* Try to reset ownership back to Q6 */
>  			q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm,
> @@ -1274,7 +1273,7 @@ static int q6v5_start(struct rproc *rproc)
>  			"Failed to reclaim mba buffer system may become unstable\n");
>  
>  	/* Reset Dump Segment Mask */
> -	qproc->dump_segment_mask = 0;
> +	qproc->current_dump_size = 0;
>  	qproc->running = true;
>  
>  	return 0;
> @@ -1323,7 +1322,7 @@ static int qcom_q6v5_register_dump_segments(struct rproc *rproc,
>  
>  	ehdr = (struct elf32_hdr *)fw->data;
>  	phdrs = (struct elf32_phdr *)(ehdr + 1);
> -	qproc->dump_complete_mask = 0;
> +	qproc->total_dump_size = 0;
>  
>  	for (i = 0; i < ehdr->e_phnum; i++) {
>  		phdr = &phdrs[i];
> @@ -1334,11 +1333,11 @@ static int qcom_q6v5_register_dump_segments(struct rproc *rproc,
>  		ret = rproc_coredump_add_custom_segment(rproc, phdr->p_paddr,
>  							phdr->p_memsz,
>  							qcom_q6v5_dump_segment,
> -							(void *)i);
> +							NULL);
>  		if (ret)
>  			break;
>  
> -		qproc->dump_complete_mask |= BIT(i);
> +		qproc->total_dump_size += phdr->p_memsz;
>  	}
>  
>  	release_firmware(fw);
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* Re: [PATCH 1/3] remoteproc: qcom_q6v5_mss: Add modem debug policy support
  2020-07-17  4:41  0%   ` Bjorn Andersson
@ 2020-07-17  5:07  6%     ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-17  5:07 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen, ohad

Hey Bjorn,
Thanks for taking time to review
the series.

On 2020-07-17 10:11, Bjorn Andersson wrote:
> On Thu 16 Jul 05:36 PDT 2020, Sibi Sankar wrote:
> 
>> Add modem debug policy support which will enable coredumps and live
>> debug support when the msadp firmware is present on secure devices.
>> 
>> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
>> ---
>>  drivers/remoteproc/qcom_q6v5_mss.c | 15 ++++++++++++++-
>>  1 file changed, 14 insertions(+), 1 deletion(-)
>> 
>> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c 
>> b/drivers/remoteproc/qcom_q6v5_mss.c
>> index 13c6d5a72a831..95e21ed607cb9 100644
>> --- a/drivers/remoteproc/qcom_q6v5_mss.c
>> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
>> @@ -187,6 +187,7 @@ struct q6v5 {
>>  	phys_addr_t mba_phys;
>>  	void *mba_region;
>>  	size_t mba_size;
>> +	size_t dp_size;
>> 
>>  	phys_addr_t mpss_phys;
>>  	phys_addr_t mpss_reloc;
>> @@ -406,6 +407,13 @@ static int q6v5_xfer_mem_ownership(struct q6v5 
>> *qproc, int *current_perm,
>>  static int q6v5_load(struct rproc *rproc, const struct firmware *fw)
>>  {
>>  	struct q6v5 *qproc = rproc->priv;
>> +	const struct firmware *dp_fw;
>> +
>> +	if (!request_firmware(&dp_fw, "msadp", qproc->dev) && fw->size <= 
>> SZ_1M) {
> 
> Can we change this to a request_firmware_direct() to avoid the fact 
> that
> as written here devices lacking this file will pause here for 60 
> seconds
> waiting for userspace to assist in loading it (which at least none of 
> my
> systems do).
> 
> I also think that while it's nice to check that fw->size <= SZ_1M, to
> avoid overwriting the tail of it, you should check that SZ_1M +
> dp_fw->size < mba_size. To ensure that the memcpy doesn't go out of
> bounds.

Sure I'll get ^^ done in the
next re-spin.

> 
>> +		memcpy(qproc->mba_region + SZ_1M, dp_fw->data, dp_fw->size);
>> +		qproc->dp_size = dp_fw->size;
>> +		release_firmware(dp_fw);
>> +	}
>> 
>>  	memcpy(qproc->mba_region, fw->data, fw->size);
>> 
>> @@ -896,6 +904,10 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>>  	}
>> 
>>  	writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG);
>> +	if (qproc->dp_size) {
>> +		writel(qproc->mba_phys + SZ_1M, qproc->rmb_base + 
>> RMB_PMI_CODE_START_REG);
>> +		writel(qproc->dp_size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG);
>> +	}
>> 
>>  	ret = q6v5proc_reset(qproc);
>>  	if (ret)
>> @@ -1258,7 +1270,8 @@ static int q6v5_start(struct rproc *rproc)
>>  	if (ret)
>>  		return ret;
>> 
>> -	dev_info(qproc->dev, "MBA booted, loading mpss\n");
>> +	dev_info(qproc->dev, "MBA booted, debug policy %s, loading mpss\n",
>> +		 qproc->dp_size ? "enabled" : "disabled");
> 
> "MBA booted with%s debug policy, loading mpss\n", qproc->dp_size ? "" : 
> "out"
> 
> Please.

Sure I'll use your template instead.

> 
> Regards,
> Bjorn
> 
>> 
>>  	ret = q6v5_mpss_load(qproc);
>>  	if (ret)
>> --
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora 
>> Forum,
>> a Linux Foundation Collaborative Project
>> 

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* Re: [PATCH v8 4/5] remoteproc: Add inline coredump functionality
  2020-07-16 22:20  5% ` [PATCH v8 4/5] remoteproc: Add inline coredump functionality Rishabh Bhatnagar
@ 2020-07-17  5:13  0%   ` Bjorn Andersson
  2020-07-17 11:03 13%   ` Sibi Sankar
  2020-07-20 17:07  0%   ` Mathieu Poirier
  2 siblings, 0 replies; 200+ results
From: Bjorn Andersson @ 2020-07-17  5:13 UTC (permalink / raw)
  To: Rishabh Bhatnagar
  Cc: linux-remoteproc, linux-kernel, mathieu.poirier, sibis, tsoni,
	psodagud, sidgup

On Thu 16 Jul 15:20 PDT 2020, Rishabh Bhatnagar wrote:

> The current coredump implementation uses vmalloc area to copy
> all the segments. But this might put strain on low memory targets
> as the firmware size sometimes is in tens of MBs. The situation
> becomes worse if there are multiple remote processors undergoing
> recovery at the same time. This patch adds inline coredump
> functionality that avoids extra memory usage. This requires
> recovery to be halted until data is read by userspace and free
> function is called.
> 
> Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
> Tested-by: Sibi Sankar <sibis@codeaurora.org>

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> ---
>  drivers/remoteproc/remoteproc_coredump.c | 156 +++++++++++++++++++++++++++----
>  include/linux/remoteproc.h               |  16 ++++
>  2 files changed, 154 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/remoteproc/remoteproc_coredump.c b/drivers/remoteproc/remoteproc_coredump.c
> index 390f563..bb15a29 100644
> --- a/drivers/remoteproc/remoteproc_coredump.c
> +++ b/drivers/remoteproc/remoteproc_coredump.c
> @@ -5,6 +5,7 @@
>   * Copyright (c) 2020, The Linux Foundation. All rights reserved.
>   */
>  
> +#include <linux/completion.h>
>  #include <linux/devcoredump.h>
>  #include <linux/device.h>
>  #include <linux/kernel.h>
> @@ -12,6 +13,12 @@
>  #include "remoteproc_internal.h"
>  #include "remoteproc_elf_helpers.h"
>  
> +struct rproc_coredump_state {
> +	struct rproc *rproc;
> +	void *header;
> +	struct completion dump_done;
> +};
> +
>  /**
>   * rproc_coredump_cleanup() - clean up dump_segments list
>   * @rproc: the remote processor handle
> @@ -115,12 +122,110 @@ int rproc_coredump_set_elf_info(struct rproc *rproc, u8 class, u16 machine)
>  }
>  EXPORT_SYMBOL(rproc_coredump_set_elf_info);
>  
> +static void rproc_coredump_free(void *data)
> +{
> +	struct rproc_coredump_state *dump_state = data;
> +
> +	vfree(dump_state->header);
> +	complete(&dump_state->dump_done);
> +}
> +
> +static void *rproc_coredump_find_segment(loff_t user_offset,
> +					 struct list_head *segments,
> +					 size_t *data_left)
> +{
> +	struct rproc_dump_segment *segment;
> +
> +	list_for_each_entry(segment, segments, node) {
> +		if (user_offset < segment->size) {
> +			*data_left = segment->size - user_offset;
> +			return segment;
> +		}
> +		user_offset -= segment->size;
> +	}
> +
> +	*data_left = 0;
> +	return NULL;
> +}
> +
> +static void rproc_copy_segment(struct rproc *rproc, void *dest,
> +			       struct rproc_dump_segment *segment,
> +			       size_t offset, size_t size)
> +{
> +	void *ptr;
> +
> +	if (segment->dump) {
> +		segment->dump(rproc, segment, dest, offset, size);
> +	} else {
> +		ptr = rproc_da_to_va(rproc, segment->da + offset, size);
> +		if (!ptr) {
> +			dev_err(&rproc->dev,
> +				"invalid copy request for segment %pad with offset %zu and size %zu)\n",
> +				&segment->da, offset, size);
> +			memset(dest, 0xff, size);
> +		} else {
> +			memcpy(dest, ptr, size);
> +		}
> +	}
> +}
> +
> +static ssize_t rproc_coredump_read(char *buffer, loff_t offset, size_t count,
> +				   void *data, size_t header_sz)
> +{
> +	size_t seg_data, bytes_left = count;
> +	ssize_t copy_sz;
> +	struct rproc_dump_segment *seg;
> +	struct rproc_coredump_state *dump_state = data;
> +	struct rproc *rproc = dump_state->rproc;
> +	void *elfcore = dump_state->header;
> +
> +	/* Copy the vmalloc'ed header first. */
> +	if (offset < header_sz) {
> +		copy_sz = memory_read_from_buffer(buffer, count, &offset,
> +						  elfcore, header_sz);
> +
> +		return copy_sz;
> +	}
> +
> +	/*
> +	 * Find out the segment memory chunk to be copied based on offset.
> +	 * Keep copying data until count bytes are read.
> +	 */
> +	while (bytes_left) {
> +		seg = rproc_coredump_find_segment(offset - header_sz,
> +						  &rproc->dump_segments,
> +						  &seg_data);
> +		/* EOF check */
> +		if (!seg) {
> +			dev_info(&rproc->dev, "Ramdump done, %lld bytes read",
> +				 offset);
> +			break;
> +		}
> +
> +		copy_sz = min_t(size_t, bytes_left, seg_data);
> +
> +		rproc_copy_segment(rproc, buffer, seg, seg->size - seg_data,
> +				   copy_sz);
> +
> +		offset += copy_sz;
> +		buffer += copy_sz;
> +		bytes_left -= copy_sz;
> +	}
> +
> +	return count - bytes_left;
> +}
> +
>  /**
>   * rproc_coredump() - perform coredump
>   * @rproc:	rproc handle
>   *
>   * This function will generate an ELF header for the registered segments
> - * and create a devcoredump device associated with rproc.
> + * and create a devcoredump device associated with rproc. Based on the
> + * coredump configuration this function will directly copy the segments
> + * from device memory to userspace or copy segments from device memory to
> + * a separate buffer, which can then be read by userspace.
> + * The first approach avoids using extra vmalloc memory. But it will stall
> + * recovery flow until dump is read by userspace.
>   */
>  void rproc_coredump(struct rproc *rproc)
>  {
> @@ -130,11 +235,13 @@ void rproc_coredump(struct rproc *rproc)
>  	size_t data_size;
>  	size_t offset;
>  	void *data;
> -	void *ptr;
>  	u8 class = rproc->elf_class;
>  	int phnum = 0;
> +	struct rproc_coredump_state dump_state;
> +	enum rproc_dump_mechanism dump_conf = rproc->dump_conf;
>  
> -	if (list_empty(&rproc->dump_segments))
> +	if (list_empty(&rproc->dump_segments) ||
> +	    dump_conf == RPROC_COREDUMP_DISABLED)
>  		return;
>  
>  	if (class == ELFCLASSNONE) {
> @@ -144,7 +251,14 @@ void rproc_coredump(struct rproc *rproc)
>  
>  	data_size = elf_size_of_hdr(class);
>  	list_for_each_entry(segment, &rproc->dump_segments, node) {
> -		data_size += elf_size_of_phdr(class) + segment->size;
> +		/*
> +		 * For default configuration buffer includes headers & segments.
> +		 * For inline dump buffer just includes headers as segments are
> +		 * directly read from device memory.
> +		 */
> +		data_size += elf_size_of_phdr(class);
> +		if (dump_conf == RPROC_COREDUMP_DEFAULT)
> +			data_size += segment->size;
>  
>  		phnum++;
>  	}
> @@ -183,23 +297,29 @@ void rproc_coredump(struct rproc *rproc)
>  		elf_phdr_set_p_flags(class, phdr, PF_R | PF_W | PF_X);
>  		elf_phdr_set_p_align(class, phdr, 0);
>  
> -		if (segment->dump) {
> -			segment->dump(rproc, segment, data + offset, 0, segment->size);
> -		} else {
> -			ptr = rproc_da_to_va(rproc, segment->da, segment->size);
> -			if (!ptr) {
> -				dev_err(&rproc->dev,
> -					"invalid coredump segment (%pad, %zu)\n",
> -					&segment->da, segment->size);
> -				memset(data + offset, 0xff, segment->size);
> -			} else {
> -				memcpy(data + offset, ptr, segment->size);
> -			}
> -		}
> +		if (dump_conf == RPROC_COREDUMP_DEFAULT)
> +			rproc_copy_segment(rproc, data + offset, segment, 0,
> +					   segment->size);
>  
>  		offset += elf_phdr_get_p_filesz(class, phdr);
>  		phdr += elf_size_of_phdr(class);
>  	}
> +	if (dump_conf == RPROC_COREDUMP_DEFAULT) {
> +		dev_coredumpv(&rproc->dev, data, data_size, GFP_KERNEL);
> +		return;
> +	}
> +
> +	/* Initialize the dump state struct to be used by rproc_coredump_read */
> +	dump_state.rproc = rproc;
> +	dump_state.header = data;
> +	init_completion(&dump_state.dump_done);
> +
> +	dev_coredumpm(&rproc->dev, NULL, &dump_state, data_size, GFP_KERNEL,
> +		      rproc_coredump_read, rproc_coredump_free);
>  
> -	dev_coredumpv(&rproc->dev, data, data_size, GFP_KERNEL);
> +	/*
> +	 * Wait until the dump is read and free is called. Data is freed
> +	 * by devcoredump framework automatically after 5 minutes.
> +	 */
> +	wait_for_completion(&dump_state.dump_done);
>  }
> diff --git a/include/linux/remoteproc.h b/include/linux/remoteproc.h
> index eb08139..38d037d 100644
> --- a/include/linux/remoteproc.h
> +++ b/include/linux/remoteproc.h
> @@ -435,6 +435,20 @@ enum rproc_crash_type {
>  };
>  
>  /**
> + * enum rproc_dump_mechanism - Coredump options for core
> + * @RPROC_COREDUMP_DEFAULT:	Copy dump to separate buffer and carry on with
> +				recovery
> + * @RPROC_COREDUMP_INLINE:	Read segments directly from device memory. Stall
> +				recovery until all segments are read
> + * @RPROC_COREDUMP_DISABLED:	Don't perform any dump
> + */
> +enum rproc_dump_mechanism {
> +	RPROC_COREDUMP_DEFAULT,
> +	RPROC_COREDUMP_INLINE,
> +	RPROC_COREDUMP_DISABLED,
> +};
> +
> +/**
>   * struct rproc_dump_segment - segment info from ELF header
>   * @node:	list node related to the rproc segment list
>   * @da:		device address of the segment
> @@ -466,6 +480,7 @@ struct rproc_dump_segment {
>   * @dev: virtual device for refcounting and common remoteproc behavior
>   * @power: refcount of users who need this rproc powered up
>   * @state: state of the device
> + * @dump_conf: Currently selected coredump configuration
>   * @lock: lock which protects concurrent manipulations of the rproc
>   * @dbg_dir: debugfs directory of this rproc device
>   * @traces: list of trace buffers
> @@ -499,6 +514,7 @@ struct rproc {
>  	struct device dev;
>  	atomic_t power;
>  	unsigned int state;
> +	enum rproc_dump_mechanism dump_conf;
>  	struct mutex lock;
>  	struct dentry *dbg_dir;
>  	struct list_head traces;
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* Re: [PATCH 2/3] remoteproc: qcom_q6v5_mss: Add MBA log extraction support
  2020-07-17  4:57  0%   ` Bjorn Andersson
@ 2020-07-17  5:22  6%     ` Sibi Sankar
  2020-07-17  5:52  0%       ` Bjorn Andersson
  0 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-07-17  5:22 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen, ohad

On 2020-07-17 10:27, Bjorn Andersson wrote:
> On Thu 16 Jul 05:36 PDT 2020, Sibi Sankar wrote:
> 
>> On SC7180 the MBA firmware stores the bootup text logs in a 4K segment
>> at the beginning of the MBA region. Add support to extract the logs
>> which will be useful to debug mba boot/authentication issues.
>> 
>> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
>> ---
>>  drivers/remoteproc/qcom_q6v5_mss.c | 41 
>> ++++++++++++++++++++++++++----
>>  1 file changed, 36 insertions(+), 5 deletions(-)
>> 
>> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c 
>> b/drivers/remoteproc/qcom_q6v5_mss.c
>> index 95e21ed607cb9..4ddf084b2c6fc 100644
>> --- a/drivers/remoteproc/qcom_q6v5_mss.c
>> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
>> @@ -9,6 +9,7 @@
>> 
>>  #include <linux/clk.h>
>>  #include <linux/delay.h>
>> +#include <linux/devcoredump.h>
>>  #include <linux/dma-mapping.h>
>>  #include <linux/interrupt.h>
>>  #include <linux/kernel.h>
>> @@ -37,6 +38,8 @@
>> 
>>  #define MPSS_CRASH_REASON_SMEM		421
>> 
>> +#define MBA_LOG_SIZE			SZ_4K
>> +
>>  /* RMB Status Register Values */
>>  #define RMB_PBL_SUCCESS			0x1
>> 
>> @@ -139,6 +142,7 @@ struct rproc_hexagon_res {
>>  	int version;
>>  	bool need_mem_protection;
>>  	bool has_alt_reset;
>> +	bool has_mba_logs;
>>  	bool has_spare_reg;
>>  };
>> 
>> @@ -200,6 +204,7 @@ struct q6v5 {
>>  	struct qcom_sysmon *sysmon;
>>  	bool need_mem_protection;
>>  	bool has_alt_reset;
>> +	bool has_mba_logs;
>>  	bool has_spare_reg;
>>  	int mpss_perm;
>>  	int mba_perm;
>> @@ -518,6 +523,19 @@ static int q6v5_rmb_mba_wait(struct q6v5 *qproc, 
>> u32 status, int ms)
>>  	return val;
>>  }
>> 
>> +static void q6v5_dump_mba_logs(struct q6v5 *qproc)
>> +{
>> +	struct rproc *rproc = qproc->rproc;
>> +	void *data;
>> +
>> +	data = vmalloc(MBA_LOG_SIZE);
>> +	if (!data)
>> +		return;
>> +
>> +	memcpy(data, qproc->mba_region, MBA_LOG_SIZE);
>> +	dev_coredumpv(&rproc->dev, data, MBA_LOG_SIZE, GFP_KERNEL);
>> +}
>> +
>>  static int q6v5proc_reset(struct q6v5 *qproc)
>>  {
>>  	u32 val;
>> @@ -838,6 +856,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>>  {
>>  	int ret;
>>  	int xfermemop_ret;
>> +	bool mba_load_err = false;
>> 
>>  	qcom_q6v5_prepare(&qproc->q6v5);
>> 
>> @@ -931,7 +950,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
>>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
>>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc);
>> -
>> +	mba_load_err = true;
>>  reclaim_mba:
>>  	xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, 
>> true,
>>  						false, qproc->mba_phys,
>> @@ -939,6 +958,8 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>>  	if (xfermemop_ret) {
>>  		dev_err(qproc->dev,
>>  			"Failed to reclaim mba buffer, system may become unstable\n");
>> +	} else if (qproc->has_mba_logs & mba_load_err) {
>> +		q6v5_dump_mba_logs(qproc);
>>  	}
>> 
>>  disable_active_clks:
>> @@ -968,7 +989,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>>  	return ret;
>>  }
>> 
>> -static void q6v5_mba_reclaim(struct q6v5 *qproc)
>> +static void q6v5_mba_reclaim(struct q6v5 *qproc, bool err_path)
>>  {
>>  	int ret;
>>  	u32 val;
>> @@ -1006,6 +1027,9 @@ static void q6v5_mba_reclaim(struct q6v5 *qproc)
>>  				      qproc->mba_size);
>>  	WARN_ON(ret);
>> 
>> +	if (qproc->has_mba_logs && err_path && !ret)
> 
> Wouldn't it be possible to just call q6v5_dump_mba_logs() directly 
> after
> the return from q6v5_mba_reclaim()? That way we can avoid passing the
> bool to indicate if the reclaim should also dump some stuff.
> 
> Sure we don't have a way to tell if the assign_mem failed, but we're
> going to crash shortly anyways (which is something we should change).

We wont crash as long as we dont touch
the mba region though. Trying a mba
logs dump in such a case will ensure
that we crash lol.

> 
> 
> 
> I think you should move the has_mba_logs into q6v5_dump_mba_logs(),
> making it cause an early return.

cool sure I'll do that.

> 
> Regards,
> Bjorn
> 
>> +		q6v5_dump_mba_logs(qproc);
>> +
>>  	ret = qcom_q6v5_unprepare(&qproc->q6v5);
>>  	if (ret) {
>>  		q6v5_pds_disable(qproc, qproc->proxy_pds,
>> @@ -1255,7 +1279,7 @@ static void qcom_q6v5_dump_segment(struct rproc 
>> *rproc,
>>  						false, true,
>>  						qproc->mpss_phys,
>>  						qproc->mpss_size);
>> -			q6v5_mba_reclaim(qproc);
>> +			q6v5_mba_reclaim(qproc, false);
>>  		}
>>  	}
>>  }
>> @@ -1297,7 +1321,7 @@ static int q6v5_start(struct rproc *rproc)
>>  	return 0;
>> 
>>  reclaim_mpss:
>> -	q6v5_mba_reclaim(qproc);
>> +	q6v5_mba_reclaim(qproc, true);
>> 
>>  	return ret;
>>  }
>> @@ -1313,7 +1337,7 @@ static int q6v5_stop(struct rproc *rproc)
>>  	if (ret == -ETIMEDOUT)
>>  		dev_err(qproc->dev, "timed out on wait\n");
>> 
>> -	q6v5_mba_reclaim(qproc);
>> +	q6v5_mba_reclaim(qproc, false);
>> 
>>  	return 0;
>>  }
>> @@ -1717,6 +1741,7 @@ static int q6v5_probe(struct platform_device 
>> *pdev)
>> 
>>  	qproc->version = desc->version;
>>  	qproc->need_mem_protection = desc->need_mem_protection;
>> +	qproc->has_mba_logs = desc->has_mba_logs;
>> 
>>  	ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, 
>> MPSS_CRASH_REASON_SMEM,
>>  			     qcom_msa_handover);
>> @@ -1808,6 +1833,7 @@ static const struct rproc_hexagon_res sc7180_mss 
>> = {
>>  	},
>>  	.need_mem_protection = true,
>>  	.has_alt_reset = false,
>> +	.has_mba_logs = true,
>>  	.has_spare_reg = true,
>>  	.version = MSS_SC7180,
>>  };
>> @@ -1843,6 +1869,7 @@ static const struct rproc_hexagon_res sdm845_mss 
>> = {
>>  	},
>>  	.need_mem_protection = true,
>>  	.has_alt_reset = true,
>> +	.has_mba_logs = true,
>>  	.has_spare_reg = false,
>>  	.version = MSS_SDM845,
>>  };
>> @@ -1870,6 +1897,7 @@ static const struct rproc_hexagon_res 
>> msm8998_mss = {
>>  	},
>>  	.need_mem_protection = true,
>>  	.has_alt_reset = false,
>> +	.has_mba_logs = false,
>>  	.has_spare_reg = false,
>>  	.version = MSS_MSM8998,
>>  };
>> @@ -1900,6 +1928,7 @@ static const struct rproc_hexagon_res 
>> msm8996_mss = {
>>  	},
>>  	.need_mem_protection = true,
>>  	.has_alt_reset = false,
>> +	.has_mba_logs = false,
>>  	.has_spare_reg = false,
>>  	.version = MSS_MSM8996,
>>  };
>> @@ -1933,6 +1962,7 @@ static const struct rproc_hexagon_res 
>> msm8916_mss = {
>>  	},
>>  	.need_mem_protection = false,
>>  	.has_alt_reset = false,
>> +	.has_mba_logs = false,
>>  	.has_spare_reg = false,
>>  	.version = MSS_MSM8916,
>>  };
>> @@ -1974,6 +2004,7 @@ static const struct rproc_hexagon_res 
>> msm8974_mss = {
>>  	},
>>  	.need_mem_protection = false,
>>  	.has_alt_reset = false,
>> +	.has_mba_logs = false,
>>  	.has_spare_reg = false,
>>  	.version = MSS_MSM8974,
>>  };
>> --
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora 
>> Forum,
>> a Linux Foundation Collaborative Project
>> 

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* Re: [PATCH 3/3] remoteproc: qcom_q6v5_mss: Update MBA log info
  2020-07-17  4:59  0%   ` Bjorn Andersson
@ 2020-07-17  5:28  6%     ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-17  5:28 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, linux-remoteproc-owner

On 2020-07-17 10:29, Bjorn Andersson wrote:
> On Thu 16 Jul 05:36 PDT 2020, Sibi Sankar wrote:
> 
>> Update MBA text logs location/size in IMEM to aid tools extract
>> them after ramdump collection.
>> 
>> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
>> ---
>>  drivers/remoteproc/qcom_q6v5_mss.c | 3 +++
>>  1 file changed, 3 insertions(+)
>> 
>> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c 
>> b/drivers/remoteproc/qcom_q6v5_mss.c
>> index 4ddf084b2c6fc..539594ab955f1 100644
>> --- a/drivers/remoteproc/qcom_q6v5_mss.c
>> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
>> @@ -932,6 +932,9 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>>  	if (ret)
>>  		goto reclaim_mba;
>> 
>> +	if (qproc->has_mba_logs)
>> +		qcom_pil_info_store("mba", qproc->mba_phys, MBA_LOG_SIZE);
> 
> Is there a reason why we don't unconditionally write this to the PIL
> info? And why it shouldn't be mba_size?

MBA text logs of size specified are the
only things extracted from MBA region by
the postmortem tools (the tool assumes
that the entire region is text). The MBA
log feature was only added to SC7180 MSS
firmware.

> 
> Regards,
> Bjorn
> 
>> +
>>  	ret = q6v5_rmb_mba_wait(qproc, 0, 5000);
>>  	if (ret == -ETIMEDOUT) {
>>  		dev_err(qproc->dev, "MBA boot timed out\n");
>> --
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora 
>> Forum,
>> a Linux Foundation Collaborative Project
>> 

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* Re: [PATCH 2/3] remoteproc: qcom_q6v5_mss: Add MBA log extraction support
  2020-07-17  5:22  6%     ` Sibi Sankar
@ 2020-07-17  5:52  0%       ` Bjorn Andersson
  0 siblings, 0 replies; 200+ results
From: Bjorn Andersson @ 2020-07-17  5:52 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen, ohad

On Thu 16 Jul 22:22 PDT 2020, Sibi Sankar wrote:

> On 2020-07-17 10:27, Bjorn Andersson wrote:
> > On Thu 16 Jul 05:36 PDT 2020, Sibi Sankar wrote:
> > 
> > > On SC7180 the MBA firmware stores the bootup text logs in a 4K segment
> > > at the beginning of the MBA region. Add support to extract the logs
> > > which will be useful to debug mba boot/authentication issues.
> > > 
> > > Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> > > ---
> > >  drivers/remoteproc/qcom_q6v5_mss.c | 41
> > > ++++++++++++++++++++++++++----
> > >  1 file changed, 36 insertions(+), 5 deletions(-)
> > > 
> > > diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
> > > b/drivers/remoteproc/qcom_q6v5_mss.c
> > > index 95e21ed607cb9..4ddf084b2c6fc 100644
> > > --- a/drivers/remoteproc/qcom_q6v5_mss.c
> > > +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> > > @@ -9,6 +9,7 @@
> > > 
> > >  #include <linux/clk.h>
> > >  #include <linux/delay.h>
> > > +#include <linux/devcoredump.h>
> > >  #include <linux/dma-mapping.h>
> > >  #include <linux/interrupt.h>
> > >  #include <linux/kernel.h>
> > > @@ -37,6 +38,8 @@
> > > 
> > >  #define MPSS_CRASH_REASON_SMEM		421
> > > 
> > > +#define MBA_LOG_SIZE			SZ_4K
> > > +
> > >  /* RMB Status Register Values */
> > >  #define RMB_PBL_SUCCESS			0x1
> > > 
> > > @@ -139,6 +142,7 @@ struct rproc_hexagon_res {
> > >  	int version;
> > >  	bool need_mem_protection;
> > >  	bool has_alt_reset;
> > > +	bool has_mba_logs;
> > >  	bool has_spare_reg;
> > >  };
> > > 
> > > @@ -200,6 +204,7 @@ struct q6v5 {
> > >  	struct qcom_sysmon *sysmon;
> > >  	bool need_mem_protection;
> > >  	bool has_alt_reset;
> > > +	bool has_mba_logs;
> > >  	bool has_spare_reg;
> > >  	int mpss_perm;
> > >  	int mba_perm;
> > > @@ -518,6 +523,19 @@ static int q6v5_rmb_mba_wait(struct q6v5
> > > *qproc, u32 status, int ms)
> > >  	return val;
> > >  }
> > > 
> > > +static void q6v5_dump_mba_logs(struct q6v5 *qproc)
> > > +{
> > > +	struct rproc *rproc = qproc->rproc;
> > > +	void *data;
> > > +
> > > +	data = vmalloc(MBA_LOG_SIZE);
> > > +	if (!data)
> > > +		return;
> > > +
> > > +	memcpy(data, qproc->mba_region, MBA_LOG_SIZE);
> > > +	dev_coredumpv(&rproc->dev, data, MBA_LOG_SIZE, GFP_KERNEL);
> > > +}
> > > +
> > >  static int q6v5proc_reset(struct q6v5 *qproc)
> > >  {
> > >  	u32 val;
> > > @@ -838,6 +856,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
> > >  {
> > >  	int ret;
> > >  	int xfermemop_ret;
> > > +	bool mba_load_err = false;
> > > 
> > >  	qcom_q6v5_prepare(&qproc->q6v5);
> > > 
> > > @@ -931,7 +950,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
> > >  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
> > >  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
> > >  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc);
> > > -
> > > +	mba_load_err = true;
> > >  reclaim_mba:
> > >  	xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm,
> > > true,
> > >  						false, qproc->mba_phys,
> > > @@ -939,6 +958,8 @@ static int q6v5_mba_load(struct q6v5 *qproc)
> > >  	if (xfermemop_ret) {
> > >  		dev_err(qproc->dev,
> > >  			"Failed to reclaim mba buffer, system may become unstable\n");
> > > +	} else if (qproc->has_mba_logs & mba_load_err) {
> > > +		q6v5_dump_mba_logs(qproc);
> > >  	}
> > > 
> > >  disable_active_clks:
> > > @@ -968,7 +989,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
> > >  	return ret;
> > >  }
> > > 
> > > -static void q6v5_mba_reclaim(struct q6v5 *qproc)
> > > +static void q6v5_mba_reclaim(struct q6v5 *qproc, bool err_path)
> > >  {
> > >  	int ret;
> > >  	u32 val;
> > > @@ -1006,6 +1027,9 @@ static void q6v5_mba_reclaim(struct q6v5 *qproc)
> > >  				      qproc->mba_size);
> > >  	WARN_ON(ret);
> > > 
> > > +	if (qproc->has_mba_logs && err_path && !ret)
> > 
> > Wouldn't it be possible to just call q6v5_dump_mba_logs() directly after
> > the return from q6v5_mba_reclaim()? That way we can avoid passing the
> > bool to indicate if the reclaim should also dump some stuff.
> > 
> > Sure we don't have a way to tell if the assign_mem failed, but we're
> > going to crash shortly anyways (which is something we should change).
> 
> We wont crash as long as we dont touch
> the mba region though. Trying a mba
> logs dump in such a case will ensure
> that we crash lol.
> 

Right, but that means that if we ever try to start the remoteproc again
it will crash on us.

So what I meant at the end there is that we should either have a
mechanism to ensure that no further accesses are attempted (e.g.
prohibit a subsequent "start") or this might actually be a valid case
for a BUG_ON().

Regards,
Bjorn

> > 
> > 
> > 
> > I think you should move the has_mba_logs into q6v5_dump_mba_logs(),
> > making it cause an early return.
> 
> cool sure I'll do that.
> 
> > 
> > Regards,
> > Bjorn
> > 
> > > +		q6v5_dump_mba_logs(qproc);
> > > +
> > >  	ret = qcom_q6v5_unprepare(&qproc->q6v5);
> > >  	if (ret) {
> > >  		q6v5_pds_disable(qproc, qproc->proxy_pds,
> > > @@ -1255,7 +1279,7 @@ static void qcom_q6v5_dump_segment(struct
> > > rproc *rproc,
> > >  						false, true,
> > >  						qproc->mpss_phys,
> > >  						qproc->mpss_size);
> > > -			q6v5_mba_reclaim(qproc);
> > > +			q6v5_mba_reclaim(qproc, false);
> > >  		}
> > >  	}
> > >  }
> > > @@ -1297,7 +1321,7 @@ static int q6v5_start(struct rproc *rproc)
> > >  	return 0;
> > > 
> > >  reclaim_mpss:
> > > -	q6v5_mba_reclaim(qproc);
> > > +	q6v5_mba_reclaim(qproc, true);
> > > 
> > >  	return ret;
> > >  }
> > > @@ -1313,7 +1337,7 @@ static int q6v5_stop(struct rproc *rproc)
> > >  	if (ret == -ETIMEDOUT)
> > >  		dev_err(qproc->dev, "timed out on wait\n");
> > > 
> > > -	q6v5_mba_reclaim(qproc);
> > > +	q6v5_mba_reclaim(qproc, false);
> > > 
> > >  	return 0;
> > >  }
> > > @@ -1717,6 +1741,7 @@ static int q6v5_probe(struct platform_device
> > > *pdev)
> > > 
> > >  	qproc->version = desc->version;
> > >  	qproc->need_mem_protection = desc->need_mem_protection;
> > > +	qproc->has_mba_logs = desc->has_mba_logs;
> > > 
> > >  	ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc,
> > > MPSS_CRASH_REASON_SMEM,
> > >  			     qcom_msa_handover);
> > > @@ -1808,6 +1833,7 @@ static const struct rproc_hexagon_res
> > > sc7180_mss = {
> > >  	},
> > >  	.need_mem_protection = true,
> > >  	.has_alt_reset = false,
> > > +	.has_mba_logs = true,
> > >  	.has_spare_reg = true,
> > >  	.version = MSS_SC7180,
> > >  };
> > > @@ -1843,6 +1869,7 @@ static const struct rproc_hexagon_res
> > > sdm845_mss = {
> > >  	},
> > >  	.need_mem_protection = true,
> > >  	.has_alt_reset = true,
> > > +	.has_mba_logs = true,
> > >  	.has_spare_reg = false,
> > >  	.version = MSS_SDM845,
> > >  };
> > > @@ -1870,6 +1897,7 @@ static const struct rproc_hexagon_res
> > > msm8998_mss = {
> > >  	},
> > >  	.need_mem_protection = true,
> > >  	.has_alt_reset = false,
> > > +	.has_mba_logs = false,
> > >  	.has_spare_reg = false,
> > >  	.version = MSS_MSM8998,
> > >  };
> > > @@ -1900,6 +1928,7 @@ static const struct rproc_hexagon_res
> > > msm8996_mss = {
> > >  	},
> > >  	.need_mem_protection = true,
> > >  	.has_alt_reset = false,
> > > +	.has_mba_logs = false,
> > >  	.has_spare_reg = false,
> > >  	.version = MSS_MSM8996,
> > >  };
> > > @@ -1933,6 +1962,7 @@ static const struct rproc_hexagon_res
> > > msm8916_mss = {
> > >  	},
> > >  	.need_mem_protection = false,
> > >  	.has_alt_reset = false,
> > > +	.has_mba_logs = false,
> > >  	.has_spare_reg = false,
> > >  	.version = MSS_MSM8916,
> > >  };
> > > @@ -1974,6 +2004,7 @@ static const struct rproc_hexagon_res
> > > msm8974_mss = {
> > >  	},
> > >  	.need_mem_protection = false,
> > >  	.has_alt_reset = false,
> > > +	.has_mba_logs = false,
> > >  	.has_spare_reg = false,
> > >  	.version = MSS_MSM8974,
> > >  };
> > > --
> > > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
> > > Forum,
> > > a Linux Foundation Collaborative Project
> > > 
> 
> -- 
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 0%]

* Re: [PATCH v8 4/5] remoteproc: Add inline coredump functionality
  2020-07-16 22:20  5% ` [PATCH v8 4/5] remoteproc: Add inline coredump functionality Rishabh Bhatnagar
  2020-07-17  5:13  0%   ` Bjorn Andersson
@ 2020-07-17 11:03 13%   ` Sibi Sankar
  2020-07-20 17:07  0%   ` Mathieu Poirier
  2 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-17 11:03 UTC (permalink / raw)
  To: Rishabh Bhatnagar
  Cc: linux-remoteproc, linux-kernel, bjorn.andersson, mathieu.poirier,
	sibis, tsoni, psodagud, sidgup, linux-remoteproc-owner

On 2020-07-17 03:50, Rishabh Bhatnagar wrote:
> The current coredump implementation uses vmalloc area to copy
> all the segments. But this might put strain on low memory targets
> as the firmware size sometimes is in tens of MBs. The situation
> becomes worse if there are multiple remote processors undergoing
> recovery at the same time. This patch adds inline coredump
> functionality that avoids extra memory usage. This requires
> recovery to be halted until data is read by userspace and free
> function is called.
> 
> Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>

Reviewed-by: Sibi Sankar <sibis@codeaurora.org>

> Tested-by: Sibi Sankar <sibis@codeaurora.org>
> ---
>  drivers/remoteproc/remoteproc_coredump.c | 156 
> +++++++++++++++++++++++++++----
>  include/linux/remoteproc.h               |  16 ++++
>  2 files changed, 154 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/remoteproc/remoteproc_coredump.c
> b/drivers/remoteproc/remoteproc_coredump.c
> index 390f563..bb15a29 100644
> --- a/drivers/remoteproc/remoteproc_coredump.c
> +++ b/drivers/remoteproc/remoteproc_coredump.c
> @@ -5,6 +5,7 @@
>   * Copyright (c) 2020, The Linux Foundation. All rights reserved.
>   */
> 
> +#include <linux/completion.h>
>  #include <linux/devcoredump.h>
>  #include <linux/device.h>
>  #include <linux/kernel.h>
> @@ -12,6 +13,12 @@
>  #include "remoteproc_internal.h"
>  #include "remoteproc_elf_helpers.h"
> 
> +struct rproc_coredump_state {
> +	struct rproc *rproc;
> +	void *header;
> +	struct completion dump_done;
> +};
> +
>  /**
>   * rproc_coredump_cleanup() - clean up dump_segments list
>   * @rproc: the remote processor handle
> @@ -115,12 +122,110 @@ int rproc_coredump_set_elf_info(struct rproc
> *rproc, u8 class, u16 machine)
>  }
>  EXPORT_SYMBOL(rproc_coredump_set_elf_info);
> 
> +static void rproc_coredump_free(void *data)
> +{
> +	struct rproc_coredump_state *dump_state = data;
> +
> +	vfree(dump_state->header);
> +	complete(&dump_state->dump_done);
> +}
> +
> +static void *rproc_coredump_find_segment(loff_t user_offset,
> +					 struct list_head *segments,
> +					 size_t *data_left)
> +{
> +	struct rproc_dump_segment *segment;
> +
> +	list_for_each_entry(segment, segments, node) {
> +		if (user_offset < segment->size) {
> +			*data_left = segment->size - user_offset;
> +			return segment;
> +		}
> +		user_offset -= segment->size;
> +	}
> +
> +	*data_left = 0;
> +	return NULL;
> +}
> +
> +static void rproc_copy_segment(struct rproc *rproc, void *dest,
> +			       struct rproc_dump_segment *segment,
> +			       size_t offset, size_t size)
> +{
> +	void *ptr;
> +
> +	if (segment->dump) {
> +		segment->dump(rproc, segment, dest, offset, size);
> +	} else {
> +		ptr = rproc_da_to_va(rproc, segment->da + offset, size);
> +		if (!ptr) {
> +			dev_err(&rproc->dev,
> +				"invalid copy request for segment %pad with offset %zu and size 
> %zu)\n",
> +				&segment->da, offset, size);
> +			memset(dest, 0xff, size);
> +		} else {
> +			memcpy(dest, ptr, size);
> +		}
> +	}
> +}
> +
> +static ssize_t rproc_coredump_read(char *buffer, loff_t offset, size_t 
> count,
> +				   void *data, size_t header_sz)
> +{
> +	size_t seg_data, bytes_left = count;
> +	ssize_t copy_sz;
> +	struct rproc_dump_segment *seg;
> +	struct rproc_coredump_state *dump_state = data;
> +	struct rproc *rproc = dump_state->rproc;
> +	void *elfcore = dump_state->header;
> +
> +	/* Copy the vmalloc'ed header first. */
> +	if (offset < header_sz) {
> +		copy_sz = memory_read_from_buffer(buffer, count, &offset,
> +						  elfcore, header_sz);
> +
> +		return copy_sz;
> +	}
> +
> +	/*
> +	 * Find out the segment memory chunk to be copied based on offset.
> +	 * Keep copying data until count bytes are read.
> +	 */
> +	while (bytes_left) {
> +		seg = rproc_coredump_find_segment(offset - header_sz,
> +						  &rproc->dump_segments,
> +						  &seg_data);
> +		/* EOF check */
> +		if (!seg) {
> +			dev_info(&rproc->dev, "Ramdump done, %lld bytes read",
> +				 offset);
> +			break;
> +		}
> +
> +		copy_sz = min_t(size_t, bytes_left, seg_data);
> +
> +		rproc_copy_segment(rproc, buffer, seg, seg->size - seg_data,
> +				   copy_sz);
> +
> +		offset += copy_sz;
> +		buffer += copy_sz;
> +		bytes_left -= copy_sz;
> +	}
> +
> +	return count - bytes_left;
> +}
> +
>  /**
>   * rproc_coredump() - perform coredump
>   * @rproc:	rproc handle
>   *
>   * This function will generate an ELF header for the registered 
> segments
> - * and create a devcoredump device associated with rproc.
> + * and create a devcoredump device associated with rproc. Based on the
> + * coredump configuration this function will directly copy the 
> segments
> + * from device memory to userspace or copy segments from device memory 
> to
> + * a separate buffer, which can then be read by userspace.
> + * The first approach avoids using extra vmalloc memory. But it will 
> stall
> + * recovery flow until dump is read by userspace.
>   */
>  void rproc_coredump(struct rproc *rproc)
>  {
> @@ -130,11 +235,13 @@ void rproc_coredump(struct rproc *rproc)
>  	size_t data_size;
>  	size_t offset;
>  	void *data;
> -	void *ptr;
>  	u8 class = rproc->elf_class;
>  	int phnum = 0;
> +	struct rproc_coredump_state dump_state;
> +	enum rproc_dump_mechanism dump_conf = rproc->dump_conf;
> 
> -	if (list_empty(&rproc->dump_segments))
> +	if (list_empty(&rproc->dump_segments) ||
> +	    dump_conf == RPROC_COREDUMP_DISABLED)
>  		return;
> 
>  	if (class == ELFCLASSNONE) {
> @@ -144,7 +251,14 @@ void rproc_coredump(struct rproc *rproc)
> 
>  	data_size = elf_size_of_hdr(class);
>  	list_for_each_entry(segment, &rproc->dump_segments, node) {
> -		data_size += elf_size_of_phdr(class) + segment->size;
> +		/*
> +		 * For default configuration buffer includes headers & segments.
> +		 * For inline dump buffer just includes headers as segments are
> +		 * directly read from device memory.
> +		 */
> +		data_size += elf_size_of_phdr(class);
> +		if (dump_conf == RPROC_COREDUMP_DEFAULT)
> +			data_size += segment->size;
> 
>  		phnum++;
>  	}
> @@ -183,23 +297,29 @@ void rproc_coredump(struct rproc *rproc)
>  		elf_phdr_set_p_flags(class, phdr, PF_R | PF_W | PF_X);
>  		elf_phdr_set_p_align(class, phdr, 0);
> 
> -		if (segment->dump) {
> -			segment->dump(rproc, segment, data + offset, 0, segment->size);
> -		} else {
> -			ptr = rproc_da_to_va(rproc, segment->da, segment->size);
> -			if (!ptr) {
> -				dev_err(&rproc->dev,
> -					"invalid coredump segment (%pad, %zu)\n",
> -					&segment->da, segment->size);
> -				memset(data + offset, 0xff, segment->size);
> -			} else {
> -				memcpy(data + offset, ptr, segment->size);
> -			}
> -		}
> +		if (dump_conf == RPROC_COREDUMP_DEFAULT)
> +			rproc_copy_segment(rproc, data + offset, segment, 0,
> +					   segment->size);
> 
>  		offset += elf_phdr_get_p_filesz(class, phdr);
>  		phdr += elf_size_of_phdr(class);
>  	}
> +	if (dump_conf == RPROC_COREDUMP_DEFAULT) {
> +		dev_coredumpv(&rproc->dev, data, data_size, GFP_KERNEL);
> +		return;
> +	}
> +
> +	/* Initialize the dump state struct to be used by rproc_coredump_read 
> */
> +	dump_state.rproc = rproc;
> +	dump_state.header = data;
> +	init_completion(&dump_state.dump_done);
> +
> +	dev_coredumpm(&rproc->dev, NULL, &dump_state, data_size, GFP_KERNEL,
> +		      rproc_coredump_read, rproc_coredump_free);
> 
> -	dev_coredumpv(&rproc->dev, data, data_size, GFP_KERNEL);
> +	/*
> +	 * Wait until the dump is read and free is called. Data is freed
> +	 * by devcoredump framework automatically after 5 minutes.
> +	 */
> +	wait_for_completion(&dump_state.dump_done);
>  }
> diff --git a/include/linux/remoteproc.h b/include/linux/remoteproc.h
> index eb08139..38d037d 100644
> --- a/include/linux/remoteproc.h
> +++ b/include/linux/remoteproc.h
> @@ -435,6 +435,20 @@ enum rproc_crash_type {
>  };
> 
>  /**
> + * enum rproc_dump_mechanism - Coredump options for core
> + * @RPROC_COREDUMP_DEFAULT:	Copy dump to separate buffer and carry on 
> with
> +				recovery
> + * @RPROC_COREDUMP_INLINE:	Read segments directly from device memory. 
> Stall
> +				recovery until all segments are read
> + * @RPROC_COREDUMP_DISABLED:	Don't perform any dump
> + */
> +enum rproc_dump_mechanism {
> +	RPROC_COREDUMP_DEFAULT,
> +	RPROC_COREDUMP_INLINE,
> +	RPROC_COREDUMP_DISABLED,
> +};
> +
> +/**
>   * struct rproc_dump_segment - segment info from ELF header
>   * @node:	list node related to the rproc segment list
>   * @da:		device address of the segment
> @@ -466,6 +480,7 @@ struct rproc_dump_segment {
>   * @dev: virtual device for refcounting and common remoteproc behavior
>   * @power: refcount of users who need this rproc powered up
>   * @state: state of the device
> + * @dump_conf: Currently selected coredump configuration
>   * @lock: lock which protects concurrent manipulations of the rproc
>   * @dbg_dir: debugfs directory of this rproc device
>   * @traces: list of trace buffers
> @@ -499,6 +514,7 @@ struct rproc {
>  	struct device dev;
>  	atomic_t power;
>  	unsigned int state;
> +	enum rproc_dump_mechanism dump_conf;
>  	struct mutex lock;
>  	struct dentry *dbg_dir;
>  	struct list_head traces;

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 13%]

* Re: [PATCH v8 3/5] remoteproc: Pass size and offset as arguments to segment dump function
  @ 2020-07-17 11:05 15%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-17 11:05 UTC (permalink / raw)
  To: Rishabh Bhatnagar
  Cc: linux-remoteproc, linux-kernel, bjorn.andersson, mathieu.poirier,
	sibis, tsoni, psodagud, sidgup, linux-remoteproc-owner

On 2020-07-17 03:50, Rishabh Bhatnagar wrote:
> Change the segment dump API signature to include size and offset
> arguments. Refactor the qcom_q6v5_mss driver to use these
> arguments while copying the segment. Doing this lays the ground
> work for "inline" coredump functionality being added in the next
> patch.
> 
> Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>

Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>


> ---
>  drivers/remoteproc/qcom_q6v5_mss.c       | 10 +++++-----
>  drivers/remoteproc/remoteproc_coredump.c |  5 +++--
>  include/linux/remoteproc.h               |  5 +++--
>  3 files changed, 11 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
> b/drivers/remoteproc/qcom_q6v5_mss.c
> index 037cd45..6baa3ae 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> @@ -1199,7 +1199,7 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
> 
>  static void qcom_q6v5_dump_segment(struct rproc *rproc,
>  				   struct rproc_dump_segment *segment,
> -				   void *dest)
> +				   void *dest, size_t cp_offset, size_t size)
>  {
>  	int ret = 0;
>  	struct q6v5 *qproc = rproc->priv;
> @@ -1219,16 +1219,16 @@ static void qcom_q6v5_dump_segment(struct rproc 
> *rproc,
>  	}
> 
>  	if (!ret)
> -		ptr = ioremap_wc(qproc->mpss_phys + offset, segment->size);
> +		ptr = ioremap_wc(qproc->mpss_phys + offset + cp_offset, size);
> 
>  	if (ptr) {
> -		memcpy(dest, ptr, segment->size);
> +		memcpy(dest, ptr, size);
>  		iounmap(ptr);
>  	} else {
> -		memset(dest, 0xff, segment->size);
> +		memset(dest, 0xff, size);
>  	}
> 
> -	qproc->current_dump_size += segment->size;
> +	qproc->current_dump_size += size;
> 
>  	/* Reclaim mba after copying segments */
>  	if (qproc->current_dump_size == qproc->total_dump_size) {
> diff --git a/drivers/remoteproc/remoteproc_coredump.c
> b/drivers/remoteproc/remoteproc_coredump.c
> index ded0244..390f563 100644
> --- a/drivers/remoteproc/remoteproc_coredump.c
> +++ b/drivers/remoteproc/remoteproc_coredump.c
> @@ -72,7 +72,8 @@ int rproc_coredump_add_custom_segment(struct rproc 
> *rproc,
>  				      dma_addr_t da, size_t size,
>  				      void (*dumpfn)(struct rproc *rproc,
>  						     struct rproc_dump_segment *segment,
> -						     void *dest),
> +						     void *dest, size_t offset,
> +						     size_t size),
>  				      void *priv)
>  {
>  	struct rproc_dump_segment *segment;
> @@ -183,7 +184,7 @@ void rproc_coredump(struct rproc *rproc)
>  		elf_phdr_set_p_align(class, phdr, 0);
> 
>  		if (segment->dump) {
> -			segment->dump(rproc, segment, data + offset);
> +			segment->dump(rproc, segment, data + offset, 0, segment->size);
>  		} else {
>  			ptr = rproc_da_to_va(rproc, segment->da, segment->size);
>  			if (!ptr) {
> diff --git a/include/linux/remoteproc.h b/include/linux/remoteproc.h
> index e7b7bab..eb08139 100644
> --- a/include/linux/remoteproc.h
> +++ b/include/linux/remoteproc.h
> @@ -451,7 +451,7 @@ struct rproc_dump_segment {
> 
>  	void *priv;
>  	void (*dump)(struct rproc *rproc, struct rproc_dump_segment *segment,
> -		     void *dest);
> +		     void *dest, size_t offset, size_t size);
>  	loff_t offset;
>  };
> 
> @@ -630,7 +630,8 @@ int rproc_coredump_add_custom_segment(struct rproc 
> *rproc,
>  				      dma_addr_t da, size_t size,
>  				      void (*dumpfn)(struct rproc *rproc,
>  						     struct rproc_dump_segment *segment,
> -						     void *dest),
> +						     void *dest, size_t offset,
> +						     size_t size),
>  				      void *priv);
>  int rproc_coredump_set_elf_info(struct rproc *rproc, u8 class, u16 
> machine);

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 15%]

* Re: [PATCH 2/3] remoteproc: qcom_q6v5_mss: Add MBA log extraction support
  2020-07-16 14:58  6%     ` Sibi Sankar
@ 2020-07-17 14:38  0%       ` Manivannan Sadhasivam
  0 siblings, 0 replies; 200+ results
From: Manivannan Sadhasivam @ 2020-07-17 14:38 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: bjorn.andersson, agross, linux-arm-msm, linux-remoteproc,
	linux-kernel, evgreen, ohad, linux-arm-msm-owner

On Thu, Jul 16, 2020 at 08:28:50PM +0530, Sibi Sankar wrote:
> On 2020-07-16 19:13, Manivannan Sadhasivam wrote:
> > Hi Sibi,
> > 
> > On Thu, Jul 16, 2020 at 06:06:29PM +0530, Sibi Sankar wrote:
> > > On SC7180 the MBA firmware stores the bootup text logs in a 4K segment
> > > at the beginning of the MBA region. Add support to extract the logs
> > > which will be useful to debug mba boot/authentication issues.
> > > 
> > > Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> > > ---
> > >  drivers/remoteproc/qcom_q6v5_mss.c | 41
> > > ++++++++++++++++++++++++++----
> > >  1 file changed, 36 insertions(+), 5 deletions(-)
> > > 
> > > diff --git a/drivers/remoteproc/qcom_q6v5_mss.c
> > > b/drivers/remoteproc/qcom_q6v5_mss.c
> > > index 95e21ed607cb9..4ddf084b2c6fc 100644
> > > --- a/drivers/remoteproc/qcom_q6v5_mss.c
> > > +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> > > @@ -9,6 +9,7 @@
> > > 
> > >  #include <linux/clk.h>
> > >  #include <linux/delay.h>
> > > +#include <linux/devcoredump.h>
> > >  #include <linux/dma-mapping.h>
> > >  #include <linux/interrupt.h>
> > >  #include <linux/kernel.h>
> > > @@ -37,6 +38,8 @@
> > > 
> > >  #define MPSS_CRASH_REASON_SMEM		421
> > > 
> > > +#define MBA_LOG_SIZE			SZ_4K
> > > +
> > >  /* RMB Status Register Values */
> > >  #define RMB_PBL_SUCCESS			0x1
> > > 
> > > @@ -139,6 +142,7 @@ struct rproc_hexagon_res {
> > >  	int version;
> > >  	bool need_mem_protection;
> > >  	bool has_alt_reset;
> > > +	bool has_mba_logs;
> > >  	bool has_spare_reg;
> > >  };
> > > 
> > > @@ -200,6 +204,7 @@ struct q6v5 {
> > >  	struct qcom_sysmon *sysmon;
> > >  	bool need_mem_protection;
> > >  	bool has_alt_reset;
> > > +	bool has_mba_logs;
> > >  	bool has_spare_reg;
> > >  	int mpss_perm;
> > >  	int mba_perm;
> > > @@ -518,6 +523,19 @@ static int q6v5_rmb_mba_wait(struct q6v5
> > > *qproc, u32 status, int ms)
> > >  	return val;
> > >  }
> > > 
> > > +static void q6v5_dump_mba_logs(struct q6v5 *qproc)
> > > +{
> > > +	struct rproc *rproc = qproc->rproc;
> > > +	void *data;
> > > +
> > > +	data = vmalloc(MBA_LOG_SIZE);
> > 
> > Is there any specific reason to use vmalloc for the size of 4K?
> 
> data is passed onto dev_coredumpv
> which takes ownership of the memory
> and would eventually do a vfree of the
> data.
> 

Ah, okay.

Thanks,
Mani

> > 
> > Thanks,
> > Mani
> > 
> > > +	if (!data)
> > > +		return;
> > > +
> > > +	memcpy(data, qproc->mba_region, MBA_LOG_SIZE);
> > > +	dev_coredumpv(&rproc->dev, data, MBA_LOG_SIZE, GFP_KERNEL);
> > > +}
> > > +
> > >  static int q6v5proc_reset(struct q6v5 *qproc)
> > >  {
> > >  	u32 val;
> > > @@ -838,6 +856,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
> > >  {
> > >  	int ret;
> > >  	int xfermemop_ret;
> > > +	bool mba_load_err = false;
> > > 
> > >  	qcom_q6v5_prepare(&qproc->q6v5);
> > > 
> > > @@ -931,7 +950,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
> > >  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
> > >  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
> > >  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc);
> > > -
> > > +	mba_load_err = true;
> > >  reclaim_mba:
> > >  	xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm,
> > > true,
> > >  						false, qproc->mba_phys,
> > > @@ -939,6 +958,8 @@ static int q6v5_mba_load(struct q6v5 *qproc)
> > >  	if (xfermemop_ret) {
> > >  		dev_err(qproc->dev,
> > >  			"Failed to reclaim mba buffer, system may become unstable\n");
> > > +	} else if (qproc->has_mba_logs & mba_load_err) {
> > > +		q6v5_dump_mba_logs(qproc);
> > >  	}
> > > 
> > >  disable_active_clks:
> > > @@ -968,7 +989,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
> > >  	return ret;
> > >  }
> > > 
> > > -static void q6v5_mba_reclaim(struct q6v5 *qproc)
> > > +static void q6v5_mba_reclaim(struct q6v5 *qproc, bool err_path)
> > >  {
> > >  	int ret;
> > >  	u32 val;
> > > @@ -1006,6 +1027,9 @@ static void q6v5_mba_reclaim(struct q6v5 *qproc)
> > >  				      qproc->mba_size);
> > >  	WARN_ON(ret);
> > > 
> > > +	if (qproc->has_mba_logs && err_path && !ret)
> > > +		q6v5_dump_mba_logs(qproc);
> > > +
> > >  	ret = qcom_q6v5_unprepare(&qproc->q6v5);
> > >  	if (ret) {
> > >  		q6v5_pds_disable(qproc, qproc->proxy_pds,
> > > @@ -1255,7 +1279,7 @@ static void qcom_q6v5_dump_segment(struct
> > > rproc *rproc,
> > >  						false, true,
> > >  						qproc->mpss_phys,
> > >  						qproc->mpss_size);
> > > -			q6v5_mba_reclaim(qproc);
> > > +			q6v5_mba_reclaim(qproc, false);
> > >  		}
> > >  	}
> > >  }
> > > @@ -1297,7 +1321,7 @@ static int q6v5_start(struct rproc *rproc)
> > >  	return 0;
> > > 
> > >  reclaim_mpss:
> > > -	q6v5_mba_reclaim(qproc);
> > > +	q6v5_mba_reclaim(qproc, true);
> > > 
> > >  	return ret;
> > >  }
> > > @@ -1313,7 +1337,7 @@ static int q6v5_stop(struct rproc *rproc)
> > >  	if (ret == -ETIMEDOUT)
> > >  		dev_err(qproc->dev, "timed out on wait\n");
> > > 
> > > -	q6v5_mba_reclaim(qproc);
> > > +	q6v5_mba_reclaim(qproc, false);
> > > 
> > >  	return 0;
> > >  }
> > > @@ -1717,6 +1741,7 @@ static int q6v5_probe(struct platform_device
> > > *pdev)
> > > 
> > >  	qproc->version = desc->version;
> > >  	qproc->need_mem_protection = desc->need_mem_protection;
> > > +	qproc->has_mba_logs = desc->has_mba_logs;
> > > 
> > >  	ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc,
> > > MPSS_CRASH_REASON_SMEM,
> > >  			     qcom_msa_handover);
> > > @@ -1808,6 +1833,7 @@ static const struct rproc_hexagon_res
> > > sc7180_mss = {
> > >  	},
> > >  	.need_mem_protection = true,
> > >  	.has_alt_reset = false,
> > > +	.has_mba_logs = true,
> > >  	.has_spare_reg = true,
> > >  	.version = MSS_SC7180,
> > >  };
> > > @@ -1843,6 +1869,7 @@ static const struct rproc_hexagon_res
> > > sdm845_mss = {
> > >  	},
> > >  	.need_mem_protection = true,
> > >  	.has_alt_reset = true,
> > > +	.has_mba_logs = true,
> > >  	.has_spare_reg = false,
> > >  	.version = MSS_SDM845,
> > >  };
> > > @@ -1870,6 +1897,7 @@ static const struct rproc_hexagon_res
> > > msm8998_mss = {
> > >  	},
> > >  	.need_mem_protection = true,
> > >  	.has_alt_reset = false,
> > > +	.has_mba_logs = false,
> > >  	.has_spare_reg = false,
> > >  	.version = MSS_MSM8998,
> > >  };
> > > @@ -1900,6 +1928,7 @@ static const struct rproc_hexagon_res
> > > msm8996_mss = {
> > >  	},
> > >  	.need_mem_protection = true,
> > >  	.has_alt_reset = false,
> > > +	.has_mba_logs = false,
> > >  	.has_spare_reg = false,
> > >  	.version = MSS_MSM8996,
> > >  };
> > > @@ -1933,6 +1962,7 @@ static const struct rproc_hexagon_res
> > > msm8916_mss = {
> > >  	},
> > >  	.need_mem_protection = false,
> > >  	.has_alt_reset = false,
> > > +	.has_mba_logs = false,
> > >  	.has_spare_reg = false,
> > >  	.version = MSS_MSM8916,
> > >  };
> > > @@ -1974,6 +2004,7 @@ static const struct rproc_hexagon_res
> > > msm8974_mss = {
> > >  	},
> > >  	.need_mem_protection = false,
> > >  	.has_alt_reset = false,
> > > +	.has_mba_logs = false,
> > >  	.has_spare_reg = false,
> > >  	.version = MSS_MSM8974,
> > >  };
> > > --
> > > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
> > > Forum,
> > > a Linux Foundation Collaborative Project
> > > 
> 
> -- 
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 0%]

* Re: [PATCH v1 2/4] remoteproc: qcom_q6v5_mss: Replace mask based tracking with size
    @ 2020-07-20 16:57  0%   ` Mathieu Poirier
  1 sibling, 0 replies; 200+ results
From: Mathieu Poirier @ 2020-07-20 16:57 UTC (permalink / raw)
  To: Rishabh Bhatnagar
  Cc: linux-remoteproc, linux-kernel, bjorn.andersson, tsoni, psodagud,
	sidgup, Sibi Sankar

On Thu, Jul 09, 2020 at 01:31:54PM -0700, Rishabh Bhatnagar wrote:
> From: Sibi Sankar <sibis@codeaurora.org>
> 
> In order to land inline coredump support for mss, the dump_segment
> function would need to support granularities less than the segment
> size. This is achieved by replacing mask based tracking with size.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>

Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>

> ---
>  drivers/remoteproc/qcom_q6v5_mss.c | 15 +++++++--------
>  1 file changed, 7 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> index feb70283b..c6ce032 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> @@ -181,8 +181,8 @@ struct q6v5 {
>  	bool running;
>  
>  	bool dump_mba_loaded;
> -	unsigned long dump_segment_mask;
> -	unsigned long dump_complete_mask;
> +	size_t current_dump_size;
> +	size_t total_dump_size;
>  
>  	phys_addr_t mba_phys;
>  	void *mba_region;
> @@ -1203,7 +1203,6 @@ static void qcom_q6v5_dump_segment(struct rproc *rproc,
>  {
>  	int ret = 0;
>  	struct q6v5 *qproc = rproc->priv;
> -	unsigned long mask = BIT((unsigned long)segment->priv);
>  	int offset = segment->da - qproc->mpss_reloc;
>  	void *ptr = NULL;
>  
> @@ -1229,10 +1228,10 @@ static void qcom_q6v5_dump_segment(struct rproc *rproc,
>  		memset(dest, 0xff, segment->size);
>  	}
>  
> -	qproc->dump_segment_mask |= mask;
> +	qproc->current_dump_size += segment->size;
>  
>  	/* Reclaim mba after copying segments */
> -	if (qproc->dump_segment_mask == qproc->dump_complete_mask) {
> +	if (qproc->current_dump_size == qproc->total_dump_size) {
>  		if (qproc->dump_mba_loaded) {
>  			/* Try to reset ownership back to Q6 */
>  			q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm,
> @@ -1274,7 +1273,7 @@ static int q6v5_start(struct rproc *rproc)
>  			"Failed to reclaim mba buffer system may become unstable\n");
>  
>  	/* Reset Dump Segment Mask */
> -	qproc->dump_segment_mask = 0;
> +	qproc->current_dump_size = 0;
>  	qproc->running = true;
>  
>  	return 0;
> @@ -1323,7 +1322,7 @@ static int qcom_q6v5_register_dump_segments(struct rproc *rproc,
>  
>  	ehdr = (struct elf32_hdr *)fw->data;
>  	phdrs = (struct elf32_phdr *)(ehdr + 1);
> -	qproc->dump_complete_mask = 0;
> +	qproc->total_dump_size = 0;
>  
>  	for (i = 0; i < ehdr->e_phnum; i++) {
>  		phdr = &phdrs[i];
> @@ -1338,7 +1337,7 @@ static int qcom_q6v5_register_dump_segments(struct rproc *rproc,
>  		if (ret)
>  			break;
>  
> -		qproc->dump_complete_mask |= BIT(i);
> +		qproc->total_dump_size += phdr->p_memsz;
>  	}
>  
>  	release_firmware(fw);
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* Re: [PATCH v8 4/5] remoteproc: Add inline coredump functionality
  2020-07-16 22:20  5% ` [PATCH v8 4/5] remoteproc: Add inline coredump functionality Rishabh Bhatnagar
  2020-07-17  5:13  0%   ` Bjorn Andersson
  2020-07-17 11:03 13%   ` Sibi Sankar
@ 2020-07-20 17:07  0%   ` Mathieu Poirier
  2 siblings, 0 replies; 200+ results
From: Mathieu Poirier @ 2020-07-20 17:07 UTC (permalink / raw)
  To: Rishabh Bhatnagar
  Cc: linux-remoteproc, linux-kernel, bjorn.andersson, sibis, tsoni,
	psodagud, sidgup

On Thu, Jul 16, 2020 at 03:20:34PM -0700, Rishabh Bhatnagar wrote:
> The current coredump implementation uses vmalloc area to copy
> all the segments. But this might put strain on low memory targets
> as the firmware size sometimes is in tens of MBs. The situation
> becomes worse if there are multiple remote processors undergoing
> recovery at the same time. This patch adds inline coredump
> functionality that avoids extra memory usage. This requires
> recovery to be halted until data is read by userspace and free
> function is called.
> 
> Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
> Tested-by: Sibi Sankar <sibis@codeaurora.org>

Thanks for doing the modifications.

Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>

> ---
>  drivers/remoteproc/remoteproc_coredump.c | 156 +++++++++++++++++++++++++++----
>  include/linux/remoteproc.h               |  16 ++++
>  2 files changed, 154 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/remoteproc/remoteproc_coredump.c b/drivers/remoteproc/remoteproc_coredump.c
> index 390f563..bb15a29 100644
> --- a/drivers/remoteproc/remoteproc_coredump.c
> +++ b/drivers/remoteproc/remoteproc_coredump.c
> @@ -5,6 +5,7 @@
>   * Copyright (c) 2020, The Linux Foundation. All rights reserved.
>   */
>  
> +#include <linux/completion.h>
>  #include <linux/devcoredump.h>
>  #include <linux/device.h>
>  #include <linux/kernel.h>
> @@ -12,6 +13,12 @@
>  #include "remoteproc_internal.h"
>  #include "remoteproc_elf_helpers.h"
>  
> +struct rproc_coredump_state {
> +	struct rproc *rproc;
> +	void *header;
> +	struct completion dump_done;
> +};
> +
>  /**
>   * rproc_coredump_cleanup() - clean up dump_segments list
>   * @rproc: the remote processor handle
> @@ -115,12 +122,110 @@ int rproc_coredump_set_elf_info(struct rproc *rproc, u8 class, u16 machine)
>  }
>  EXPORT_SYMBOL(rproc_coredump_set_elf_info);
>  
> +static void rproc_coredump_free(void *data)
> +{
> +	struct rproc_coredump_state *dump_state = data;
> +
> +	vfree(dump_state->header);
> +	complete(&dump_state->dump_done);
> +}
> +
> +static void *rproc_coredump_find_segment(loff_t user_offset,
> +					 struct list_head *segments,
> +					 size_t *data_left)
> +{
> +	struct rproc_dump_segment *segment;
> +
> +	list_for_each_entry(segment, segments, node) {
> +		if (user_offset < segment->size) {
> +			*data_left = segment->size - user_offset;
> +			return segment;
> +		}
> +		user_offset -= segment->size;
> +	}
> +
> +	*data_left = 0;
> +	return NULL;
> +}
> +
> +static void rproc_copy_segment(struct rproc *rproc, void *dest,
> +			       struct rproc_dump_segment *segment,
> +			       size_t offset, size_t size)
> +{
> +	void *ptr;
> +
> +	if (segment->dump) {
> +		segment->dump(rproc, segment, dest, offset, size);
> +	} else {
> +		ptr = rproc_da_to_va(rproc, segment->da + offset, size);
> +		if (!ptr) {
> +			dev_err(&rproc->dev,
> +				"invalid copy request for segment %pad with offset %zu and size %zu)\n",
> +				&segment->da, offset, size);
> +			memset(dest, 0xff, size);
> +		} else {
> +			memcpy(dest, ptr, size);
> +		}
> +	}
> +}
> +
> +static ssize_t rproc_coredump_read(char *buffer, loff_t offset, size_t count,
> +				   void *data, size_t header_sz)
> +{
> +	size_t seg_data, bytes_left = count;
> +	ssize_t copy_sz;
> +	struct rproc_dump_segment *seg;
> +	struct rproc_coredump_state *dump_state = data;
> +	struct rproc *rproc = dump_state->rproc;
> +	void *elfcore = dump_state->header;
> +
> +	/* Copy the vmalloc'ed header first. */
> +	if (offset < header_sz) {
> +		copy_sz = memory_read_from_buffer(buffer, count, &offset,
> +						  elfcore, header_sz);
> +
> +		return copy_sz;
> +	}
> +
> +	/*
> +	 * Find out the segment memory chunk to be copied based on offset.
> +	 * Keep copying data until count bytes are read.
> +	 */
> +	while (bytes_left) {
> +		seg = rproc_coredump_find_segment(offset - header_sz,
> +						  &rproc->dump_segments,
> +						  &seg_data);
> +		/* EOF check */
> +		if (!seg) {
> +			dev_info(&rproc->dev, "Ramdump done, %lld bytes read",
> +				 offset);
> +			break;
> +		}
> +
> +		copy_sz = min_t(size_t, bytes_left, seg_data);
> +
> +		rproc_copy_segment(rproc, buffer, seg, seg->size - seg_data,
> +				   copy_sz);
> +
> +		offset += copy_sz;
> +		buffer += copy_sz;
> +		bytes_left -= copy_sz;
> +	}
> +
> +	return count - bytes_left;
> +}
> +
>  /**
>   * rproc_coredump() - perform coredump
>   * @rproc:	rproc handle
>   *
>   * This function will generate an ELF header for the registered segments
> - * and create a devcoredump device associated with rproc.
> + * and create a devcoredump device associated with rproc. Based on the
> + * coredump configuration this function will directly copy the segments
> + * from device memory to userspace or copy segments from device memory to
> + * a separate buffer, which can then be read by userspace.
> + * The first approach avoids using extra vmalloc memory. But it will stall
> + * recovery flow until dump is read by userspace.
>   */
>  void rproc_coredump(struct rproc *rproc)
>  {
> @@ -130,11 +235,13 @@ void rproc_coredump(struct rproc *rproc)
>  	size_t data_size;
>  	size_t offset;
>  	void *data;
> -	void *ptr;
>  	u8 class = rproc->elf_class;
>  	int phnum = 0;
> +	struct rproc_coredump_state dump_state;
> +	enum rproc_dump_mechanism dump_conf = rproc->dump_conf;
>  
> -	if (list_empty(&rproc->dump_segments))
> +	if (list_empty(&rproc->dump_segments) ||
> +	    dump_conf == RPROC_COREDUMP_DISABLED)
>  		return;
>  
>  	if (class == ELFCLASSNONE) {
> @@ -144,7 +251,14 @@ void rproc_coredump(struct rproc *rproc)
>  
>  	data_size = elf_size_of_hdr(class);
>  	list_for_each_entry(segment, &rproc->dump_segments, node) {
> -		data_size += elf_size_of_phdr(class) + segment->size;
> +		/*
> +		 * For default configuration buffer includes headers & segments.
> +		 * For inline dump buffer just includes headers as segments are
> +		 * directly read from device memory.
> +		 */
> +		data_size += elf_size_of_phdr(class);
> +		if (dump_conf == RPROC_COREDUMP_DEFAULT)
> +			data_size += segment->size;
>  
>  		phnum++;
>  	}
> @@ -183,23 +297,29 @@ void rproc_coredump(struct rproc *rproc)
>  		elf_phdr_set_p_flags(class, phdr, PF_R | PF_W | PF_X);
>  		elf_phdr_set_p_align(class, phdr, 0);
>  
> -		if (segment->dump) {
> -			segment->dump(rproc, segment, data + offset, 0, segment->size);
> -		} else {
> -			ptr = rproc_da_to_va(rproc, segment->da, segment->size);
> -			if (!ptr) {
> -				dev_err(&rproc->dev,
> -					"invalid coredump segment (%pad, %zu)\n",
> -					&segment->da, segment->size);
> -				memset(data + offset, 0xff, segment->size);
> -			} else {
> -				memcpy(data + offset, ptr, segment->size);
> -			}
> -		}
> +		if (dump_conf == RPROC_COREDUMP_DEFAULT)
> +			rproc_copy_segment(rproc, data + offset, segment, 0,
> +					   segment->size);
>  
>  		offset += elf_phdr_get_p_filesz(class, phdr);
>  		phdr += elf_size_of_phdr(class);
>  	}
> +	if (dump_conf == RPROC_COREDUMP_DEFAULT) {
> +		dev_coredumpv(&rproc->dev, data, data_size, GFP_KERNEL);
> +		return;
> +	}
> +
> +	/* Initialize the dump state struct to be used by rproc_coredump_read */
> +	dump_state.rproc = rproc;
> +	dump_state.header = data;
> +	init_completion(&dump_state.dump_done);
> +
> +	dev_coredumpm(&rproc->dev, NULL, &dump_state, data_size, GFP_KERNEL,
> +		      rproc_coredump_read, rproc_coredump_free);
>  
> -	dev_coredumpv(&rproc->dev, data, data_size, GFP_KERNEL);
> +	/*
> +	 * Wait until the dump is read and free is called. Data is freed
> +	 * by devcoredump framework automatically after 5 minutes.
> +	 */
> +	wait_for_completion(&dump_state.dump_done);
>  }
> diff --git a/include/linux/remoteproc.h b/include/linux/remoteproc.h
> index eb08139..38d037d 100644
> --- a/include/linux/remoteproc.h
> +++ b/include/linux/remoteproc.h
> @@ -435,6 +435,20 @@ enum rproc_crash_type {
>  };
>  
>  /**
> + * enum rproc_dump_mechanism - Coredump options for core
> + * @RPROC_COREDUMP_DEFAULT:	Copy dump to separate buffer and carry on with
> +				recovery
> + * @RPROC_COREDUMP_INLINE:	Read segments directly from device memory. Stall
> +				recovery until all segments are read
> + * @RPROC_COREDUMP_DISABLED:	Don't perform any dump
> + */
> +enum rproc_dump_mechanism {
> +	RPROC_COREDUMP_DEFAULT,
> +	RPROC_COREDUMP_INLINE,
> +	RPROC_COREDUMP_DISABLED,
> +};
> +
> +/**
>   * struct rproc_dump_segment - segment info from ELF header
>   * @node:	list node related to the rproc segment list
>   * @da:		device address of the segment
> @@ -466,6 +480,7 @@ struct rproc_dump_segment {
>   * @dev: virtual device for refcounting and common remoteproc behavior
>   * @power: refcount of users who need this rproc powered up
>   * @state: state of the device
> + * @dump_conf: Currently selected coredump configuration
>   * @lock: lock which protects concurrent manipulations of the rproc
>   * @dbg_dir: debugfs directory of this rproc device
>   * @traces: list of trace buffers
> @@ -499,6 +514,7 @@ struct rproc {
>  	struct device dev;
>  	atomic_t power;
>  	unsigned int state;
> +	enum rproc_dump_mechanism dump_conf;
>  	struct mutex lock;
>  	struct dentry *dbg_dir;
>  	struct list_head traces;
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* [PATCH v2 2/2] remoteproc: qcom_q6v5_mss: Add MBA log extraction support
  2020-07-21 11:29 15% [PATCH v2 0/2] Add modem debug features Sibi Sankar
  2020-07-21 11:29 21% ` [PATCH v2 1/2] remoteproc: qcom_q6v5_mss: Add modem debug policy support Sibi Sankar
@ 2020-07-21 11:29 18% ` Sibi Sankar
  2020-07-22  4:23  0%   ` Bjorn Andersson
  1 sibling, 1 reply; 200+ results
From: Sibi Sankar @ 2020-07-21 11:29 UTC (permalink / raw)
  To: bjorn.andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, Sibi Sankar

On SC7180 the MBA firmware stores the bootup text logs in a 4K segment
at the beginning of the MBA region. Add support to extract the logs
which will be useful to debug mba boot/authentication issues.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---

V2:
 * Don't dump logs in mba_reclaim path [Bjorn]
 * Move has_mba_logs check to q6v5_dump_mba_logs [Bjorn]
 * SDM845 mss was incorrectly marked to support mba logs

 drivers/remoteproc/qcom_q6v5_mss.c | 38 +++++++++++++++++++++++++++++-
 1 file changed, 37 insertions(+), 1 deletion(-)

diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
index 49cd16e050533..945ca2652e7d6 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -9,6 +9,7 @@
 
 #include <linux/clk.h>
 #include <linux/delay.h>
+#include <linux/devcoredump.h>
 #include <linux/dma-mapping.h>
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
@@ -37,6 +38,8 @@
 
 #define MPSS_CRASH_REASON_SMEM		421
 
+#define MBA_LOG_SIZE			SZ_4K
+
 /* RMB Status Register Values */
 #define RMB_PBL_SUCCESS			0x1
 
@@ -141,6 +144,7 @@ struct rproc_hexagon_res {
 	int version;
 	bool need_mem_protection;
 	bool has_alt_reset;
+	bool has_mba_logs;
 	bool has_spare_reg;
 };
 
@@ -202,6 +206,7 @@ struct q6v5 {
 	struct qcom_sysmon *sysmon;
 	bool need_mem_protection;
 	bool has_alt_reset;
+	bool has_mba_logs;
 	bool has_spare_reg;
 	int mpss_perm;
 	int mba_perm;
@@ -521,6 +526,26 @@ static int q6v5_rmb_mba_wait(struct q6v5 *qproc, u32 status, int ms)
 	return val;
 }
 
+static void q6v5_dump_mba_logs(struct q6v5 *qproc)
+{
+	struct rproc *rproc = qproc->rproc;
+	void *data;
+
+	if (!qproc->has_mba_logs)
+		return;
+
+	if (q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, false, qproc->mba_phys,
+				    qproc->mba_size))
+		return;
+
+	data = vmalloc(MBA_LOG_SIZE);
+	if (!data)
+		return;
+
+	memcpy(data, qproc->mba_region, MBA_LOG_SIZE);
+	dev_coredumpv(&rproc->dev, data, MBA_LOG_SIZE, GFP_KERNEL);
+}
+
 static int q6v5proc_reset(struct q6v5 *qproc)
 {
 	u32 val;
@@ -839,6 +864,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
 {
 	int ret;
 	int xfermemop_ret;
+	bool mba_load_err = false;
 
 	qcom_q6v5_prepare(&qproc->q6v5);
 
@@ -932,7 +958,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
 	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
 	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
 	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc);
-
+	mba_load_err = true;
 reclaim_mba:
 	xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true,
 						false, qproc->mba_phys,
@@ -940,6 +966,8 @@ static int q6v5_mba_load(struct q6v5 *qproc)
 	if (xfermemop_ret) {
 		dev_err(qproc->dev,
 			"Failed to reclaim mba buffer, system may become unstable\n");
+	} else if (mba_load_err) {
+		q6v5_dump_mba_logs(qproc);
 	}
 
 disable_active_clks:
@@ -1298,6 +1326,7 @@ static int q6v5_start(struct rproc *rproc)
 
 reclaim_mpss:
 	q6v5_mba_reclaim(qproc);
+	q6v5_dump_mba_logs(qproc);
 
 	return ret;
 }
@@ -1717,6 +1746,7 @@ static int q6v5_probe(struct platform_device *pdev)
 
 	qproc->version = desc->version;
 	qproc->need_mem_protection = desc->need_mem_protection;
+	qproc->has_mba_logs = desc->has_mba_logs;
 
 	ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM,
 			     qcom_msa_handover);
@@ -1808,6 +1838,7 @@ static const struct rproc_hexagon_res sc7180_mss = {
 	},
 	.need_mem_protection = true,
 	.has_alt_reset = false,
+	.has_mba_logs = true,
 	.has_spare_reg = true,
 	.version = MSS_SC7180,
 };
@@ -1843,6 +1874,7 @@ static const struct rproc_hexagon_res sdm845_mss = {
 	},
 	.need_mem_protection = true,
 	.has_alt_reset = true,
+	.has_mba_logs = false,
 	.has_spare_reg = false,
 	.version = MSS_SDM845,
 };
@@ -1870,6 +1902,7 @@ static const struct rproc_hexagon_res msm8998_mss = {
 	},
 	.need_mem_protection = true,
 	.has_alt_reset = false,
+	.has_mba_logs = false,
 	.has_spare_reg = false,
 	.version = MSS_MSM8998,
 };
@@ -1900,6 +1933,7 @@ static const struct rproc_hexagon_res msm8996_mss = {
 	},
 	.need_mem_protection = true,
 	.has_alt_reset = false,
+	.has_mba_logs = false,
 	.has_spare_reg = false,
 	.version = MSS_MSM8996,
 };
@@ -1933,6 +1967,7 @@ static const struct rproc_hexagon_res msm8916_mss = {
 	},
 	.need_mem_protection = false,
 	.has_alt_reset = false,
+	.has_mba_logs = false,
 	.has_spare_reg = false,
 	.version = MSS_MSM8916,
 };
@@ -1974,6 +2009,7 @@ static const struct rproc_hexagon_res msm8974_mss = {
 	},
 	.need_mem_protection = false,
 	.has_alt_reset = false,
+	.has_mba_logs = false,
 	.has_spare_reg = false,
 	.version = MSS_MSM8974,
 };
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 18%]

* [PATCH v2 0/2] Add modem debug features
@ 2020-07-21 11:29 15% Sibi Sankar
  2020-07-21 11:29 21% ` [PATCH v2 1/2] remoteproc: qcom_q6v5_mss: Add modem debug policy support Sibi Sankar
  2020-07-21 11:29 18% ` [PATCH v2 2/2] remoteproc: qcom_q6v5_mss: Add MBA log extraction support Sibi Sankar
  0 siblings, 2 replies; 200+ results
From: Sibi Sankar @ 2020-07-21 11:29 UTC (permalink / raw)
  To: bjorn.andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, Sibi Sankar

The series adds support for the following modem debug features:
 * Modem debug policy which enables coredumps/live debug on secure devices
 * MBA text logs extraction on SC7180 SoCs

V2:
 * Use request_firmware_direct [Bjorn]
 * Use Bjorn's template to show if debug policy is present
 * Add size check to prevent memcpy out of bounds [Bjorn]
 * Don't dump logs in mba_reclaim path [Bjorn]
 * Move has_mba_logs check to q6v5_dump_mba_logs [Bjorn]
 * SDM845 mss was incorrectly marked to support mba logs
 * Drop patch 3 where mba text logs are added to imem for now

Sibi Sankar (2):
  remoteproc: qcom_q6v5_mss: Add modem debug policy support
  remoteproc: qcom_q6v5_mss: Add MBA log extraction support

 drivers/remoteproc/qcom_q6v5_mss.c | 54 ++++++++++++++++++++++++++++--
 1 file changed, 52 insertions(+), 2 deletions(-)

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 15%]

* [PATCH v2 1/2] remoteproc: qcom_q6v5_mss: Add modem debug policy support
  2020-07-21 11:29 15% [PATCH v2 0/2] Add modem debug features Sibi Sankar
@ 2020-07-21 11:29 21% ` Sibi Sankar
  2020-07-22  3:54  0%   ` Bjorn Andersson
  2020-07-21 11:29 18% ` [PATCH v2 2/2] remoteproc: qcom_q6v5_mss: Add MBA log extraction support Sibi Sankar
  1 sibling, 1 reply; 200+ results
From: Sibi Sankar @ 2020-07-21 11:29 UTC (permalink / raw)
  To: bjorn.andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, Sibi Sankar

Add modem debug policy support which will enable coredumps and live
debug support when the msadp firmware is present on secure devices.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---

v2:
 * Use request_firmware_direct [Bjorn]
 * Use Bjorn's template to show if debug policy is present
 * Add size check to prevent memcpy out of bounds [Bjorn]

 drivers/remoteproc/qcom_q6v5_mss.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
index 0b6f260eb5349..49cd16e050533 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -189,6 +189,7 @@ struct q6v5 {
 	phys_addr_t mba_phys;
 	void *mba_region;
 	size_t mba_size;
+	size_t dp_size;
 
 	phys_addr_t mpss_phys;
 	phys_addr_t mpss_reloc;
@@ -408,6 +409,14 @@ static int q6v5_xfer_mem_ownership(struct q6v5 *qproc, int *current_perm,
 static int q6v5_load(struct rproc *rproc, const struct firmware *fw)
 {
 	struct q6v5 *qproc = rproc->priv;
+	const struct firmware *dp_fw;
+
+	if (!request_firmware_direct(&dp_fw, "msadp", qproc->dev) && fw->size <= SZ_1M &&
+	    (SZ_1M + dp_fw->size) <= qproc->mba_size) {
+		memcpy(qproc->mba_region + SZ_1M, dp_fw->data, dp_fw->size);
+		qproc->dp_size = dp_fw->size;
+		release_firmware(dp_fw);
+	}
 
 	memcpy(qproc->mba_region, fw->data, fw->size);
 
@@ -896,6 +905,10 @@ static int q6v5_mba_load(struct q6v5 *qproc)
 	}
 
 	writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG);
+	if (qproc->dp_size) {
+		writel(qproc->mba_phys + SZ_1M, qproc->rmb_base + RMB_PMI_CODE_START_REG);
+		writel(qproc->dp_size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG);
+	}
 
 	ret = q6v5proc_reset(qproc);
 	if (ret)
@@ -1257,7 +1270,8 @@ static int q6v5_start(struct rproc *rproc)
 	if (ret)
 		return ret;
 
-	dev_info(qproc->dev, "MBA booted, loading mpss\n");
+	dev_info(qproc->dev, "MBA booted with%s debug policy, loading mpss\n",
+		 qproc->dp_size ? "" : "out");
 
 	ret = q6v5_mpss_load(qproc);
 	if (ret)
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 21%]

* Re: [PATCH] interconnect: Do not skip aggregation for disabled paths
  @ 2020-07-21 13:31 13% ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-21 13:31 UTC (permalink / raw)
  To: Georgi Djakov
  Cc: linux-pm, adhudase, okukatla, mka, linux-kernel, linux-kernel-owner

Hey Georgi,
Thanks for the patch!

On 2020-07-21 17:37, Georgi Djakov wrote:
> When an interconnect path is being disabled, currently we don't 
> aggregate
> the requests for it afterwards. But the re-aggregation step shouldn't 
> be
> skipped, as it may leave the nodes with outdated bandwidth data. This
> outdated data may actually keep the path still enabled and prevent the
> device from going into lower power states.
> 
> Reported-by: Atul Dhudase <adhudase@codeaurora.org>
> Fixes: 7d374b209083 ("interconnect: Add helpers for enabling/disabling 
> a path")
> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
> ---

Reviewed-by: Sibi Sankar <sibis@codeaurora.org>

>  drivers/interconnect/core.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/interconnect/core.c b/drivers/interconnect/core.c
> index 37d5ec970cc1..5174dcb31ab7 100644
> --- a/drivers/interconnect/core.c
> +++ b/drivers/interconnect/core.c
> @@ -243,6 +243,7 @@ static int aggregate_requests(struct icc_node 
> *node)
>  {
>  	struct icc_provider *p = node->provider;
>  	struct icc_req *r;
> +	u32 avg_bw, peak_bw;
> 
>  	node->avg_bw = 0;
>  	node->peak_bw = 0;
> @@ -251,9 +252,14 @@ static int aggregate_requests(struct icc_node 
> *node)
>  		p->pre_aggregate(node);
> 
>  	hlist_for_each_entry(r, &node->req_list, req_node) {
> -		if (!r->enabled)
> -			continue;
> -		p->aggregate(node, r->tag, r->avg_bw, r->peak_bw,
> +		if (r->enabled) {
> +			avg_bw = r->avg_bw;
> +			peak_bw = r->peak_bw;
> +		} else {
> +			avg_bw = 0;
> +			peak_bw = 0;
> +		}
> +		p->aggregate(node, r->tag, avg_bw, peak_bw,
>  			     &node->avg_bw, &node->peak_bw);
>  	}

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 13%]

* Re: [PATCH v2 1/2] remoteproc: qcom_q6v5_mss: Add modem debug policy support
  2020-07-21 11:29 21% ` [PATCH v2 1/2] remoteproc: qcom_q6v5_mss: Add modem debug policy support Sibi Sankar
@ 2020-07-22  3:54  0%   ` Bjorn Andersson
  2020-07-22  4:18  6%     ` Sibi Sankar
  0 siblings, 1 reply; 200+ results
From: Bjorn Andersson @ 2020-07-22  3:54 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen, ohad

On Tue 21 Jul 04:29 PDT 2020, Sibi Sankar wrote:

> Add modem debug policy support which will enable coredumps and live
> debug support when the msadp firmware is present on secure devices.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> ---
> 
> v2:
>  * Use request_firmware_direct [Bjorn]
>  * Use Bjorn's template to show if debug policy is present
>  * Add size check to prevent memcpy out of bounds [Bjorn]
> 
>  drivers/remoteproc/qcom_q6v5_mss.c | 16 +++++++++++++++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> index 0b6f260eb5349..49cd16e050533 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> @@ -189,6 +189,7 @@ struct q6v5 {
>  	phys_addr_t mba_phys;
>  	void *mba_region;
>  	size_t mba_size;
> +	size_t dp_size;
>  
>  	phys_addr_t mpss_phys;
>  	phys_addr_t mpss_reloc;
> @@ -408,6 +409,14 @@ static int q6v5_xfer_mem_ownership(struct q6v5 *qproc, int *current_perm,
>  static int q6v5_load(struct rproc *rproc, const struct firmware *fw)
>  {
>  	struct q6v5 *qproc = rproc->priv;
> +	const struct firmware *dp_fw;
> +
> +	if (!request_firmware_direct(&dp_fw, "msadp", qproc->dev) && fw->size <= SZ_1M &&
> +	    (SZ_1M + dp_fw->size) <= qproc->mba_size) {
> +		memcpy(qproc->mba_region + SZ_1M, dp_fw->data, dp_fw->size);
> +		qproc->dp_size = dp_fw->size;
> +		release_firmware(dp_fw);

If request_firmware_direct() succeeds, but return a firmware blob bigger
than mba_size - SZ_1M you won't get here and will end up leaking dp_fw.

Additionally, there really isn't a need for requesting the firmware in
the first place if fw->size > SZ_1M.

So I think it's better if you break this out in it's own function where
you don't need to squeeze everything into one or two conditionals.

Regards,
Bjorn

> +	}
>  
>  	memcpy(qproc->mba_region, fw->data, fw->size);
>  
> @@ -896,6 +905,10 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>  	}
>  
>  	writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG);
> +	if (qproc->dp_size) {
> +		writel(qproc->mba_phys + SZ_1M, qproc->rmb_base + RMB_PMI_CODE_START_REG);
> +		writel(qproc->dp_size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG);
> +	}
>  
>  	ret = q6v5proc_reset(qproc);
>  	if (ret)
> @@ -1257,7 +1270,8 @@ static int q6v5_start(struct rproc *rproc)
>  	if (ret)
>  		return ret;
>  
> -	dev_info(qproc->dev, "MBA booted, loading mpss\n");
> +	dev_info(qproc->dev, "MBA booted with%s debug policy, loading mpss\n",
> +		 qproc->dp_size ? "" : "out");
>  
>  	ret = q6v5_mpss_load(qproc);
>  	if (ret)
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* Re: [PATCH v2 1/2] remoteproc: qcom_q6v5_mss: Add modem debug policy support
  2020-07-22  3:54  0%   ` Bjorn Andersson
@ 2020-07-22  4:18  6%     ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-22  4:18 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, linux-kernel-owner

On 2020-07-22 09:24, Bjorn Andersson wrote:
> On Tue 21 Jul 04:29 PDT 2020, Sibi Sankar wrote:
> 
>> Add modem debug policy support which will enable coredumps and live
>> debug support when the msadp firmware is present on secure devices.
>> 
>> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
>> ---
>> 
>> v2:
>>  * Use request_firmware_direct [Bjorn]
>>  * Use Bjorn's template to show if debug policy is present
>>  * Add size check to prevent memcpy out of bounds [Bjorn]
>> 
>>  drivers/remoteproc/qcom_q6v5_mss.c | 16 +++++++++++++++-
>>  1 file changed, 15 insertions(+), 1 deletion(-)
>> 
>> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c 
>> b/drivers/remoteproc/qcom_q6v5_mss.c
>> index 0b6f260eb5349..49cd16e050533 100644
>> --- a/drivers/remoteproc/qcom_q6v5_mss.c
>> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
>> @@ -189,6 +189,7 @@ struct q6v5 {
>>  	phys_addr_t mba_phys;
>>  	void *mba_region;
>>  	size_t mba_size;
>> +	size_t dp_size;
>> 
>>  	phys_addr_t mpss_phys;
>>  	phys_addr_t mpss_reloc;
>> @@ -408,6 +409,14 @@ static int q6v5_xfer_mem_ownership(struct q6v5 
>> *qproc, int *current_perm,
>>  static int q6v5_load(struct rproc *rproc, const struct firmware *fw)
>>  {
>>  	struct q6v5 *qproc = rproc->priv;
>> +	const struct firmware *dp_fw;
>> +
>> +	if (!request_firmware_direct(&dp_fw, "msadp", qproc->dev) && 
>> fw->size <= SZ_1M &&
>> +	    (SZ_1M + dp_fw->size) <= qproc->mba_size) {
>> +		memcpy(qproc->mba_region + SZ_1M, dp_fw->data, dp_fw->size);
>> +		qproc->dp_size = dp_fw->size;
>> +		release_firmware(dp_fw);
> 
> If request_firmware_direct() succeeds, but return a firmware blob 
> bigger
> than mba_size - SZ_1M you won't get here and will end up leaking dp_fw.
> 
> Additionally, there really isn't a need for requesting the firmware in
> the first place if fw->size > SZ_1M.
> 
> So I think it's better if you break this out in it's own function where
> you don't need to squeeze everything into one or two conditionals.

I'll fix dp_fw leak and move it
to a new func. Thanks for the
review.

> 
> Regards,
> Bjorn
> 
>> +	}
>> 
>>  	memcpy(qproc->mba_region, fw->data, fw->size);
>> 
>> @@ -896,6 +905,10 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>>  	}
>> 
>>  	writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG);
>> +	if (qproc->dp_size) {
>> +		writel(qproc->mba_phys + SZ_1M, qproc->rmb_base + 
>> RMB_PMI_CODE_START_REG);
>> +		writel(qproc->dp_size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG);
>> +	}
>> 
>>  	ret = q6v5proc_reset(qproc);
>>  	if (ret)
>> @@ -1257,7 +1270,8 @@ static int q6v5_start(struct rproc *rproc)
>>  	if (ret)
>>  		return ret;
>> 
>> -	dev_info(qproc->dev, "MBA booted, loading mpss\n");
>> +	dev_info(qproc->dev, "MBA booted with%s debug policy, loading 
>> mpss\n",
>> +		 qproc->dp_size ? "" : "out");
>> 
>>  	ret = q6v5_mpss_load(qproc);
>>  	if (ret)
>> --
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora 
>> Forum,
>> a Linux Foundation Collaborative Project
>> 

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* Re: [PATCH v2 2/2] remoteproc: qcom_q6v5_mss: Add MBA log extraction support
  2020-07-21 11:29 18% ` [PATCH v2 2/2] remoteproc: qcom_q6v5_mss: Add MBA log extraction support Sibi Sankar
@ 2020-07-22  4:23  0%   ` Bjorn Andersson
  0 siblings, 0 replies; 200+ results
From: Bjorn Andersson @ 2020-07-22  4:23 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen, ohad

On Tue 21 Jul 04:29 PDT 2020, Sibi Sankar wrote:

> On SC7180 the MBA firmware stores the bootup text logs in a 4K segment
> at the beginning of the MBA region. Add support to extract the logs
> which will be useful to debug mba boot/authentication issues.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>


Afaict this is completely independent from the other patch in the
series, so I applied this.

Regards,
Bjorn

> ---
> 
> V2:
>  * Don't dump logs in mba_reclaim path [Bjorn]
>  * Move has_mba_logs check to q6v5_dump_mba_logs [Bjorn]
>  * SDM845 mss was incorrectly marked to support mba logs
> 
>  drivers/remoteproc/qcom_q6v5_mss.c | 38 +++++++++++++++++++++++++++++-
>  1 file changed, 37 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> index 49cd16e050533..945ca2652e7d6 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> @@ -9,6 +9,7 @@
>  
>  #include <linux/clk.h>
>  #include <linux/delay.h>
> +#include <linux/devcoredump.h>
>  #include <linux/dma-mapping.h>
>  #include <linux/interrupt.h>
>  #include <linux/kernel.h>
> @@ -37,6 +38,8 @@
>  
>  #define MPSS_CRASH_REASON_SMEM		421
>  
> +#define MBA_LOG_SIZE			SZ_4K
> +
>  /* RMB Status Register Values */
>  #define RMB_PBL_SUCCESS			0x1
>  
> @@ -141,6 +144,7 @@ struct rproc_hexagon_res {
>  	int version;
>  	bool need_mem_protection;
>  	bool has_alt_reset;
> +	bool has_mba_logs;
>  	bool has_spare_reg;
>  };
>  
> @@ -202,6 +206,7 @@ struct q6v5 {
>  	struct qcom_sysmon *sysmon;
>  	bool need_mem_protection;
>  	bool has_alt_reset;
> +	bool has_mba_logs;
>  	bool has_spare_reg;
>  	int mpss_perm;
>  	int mba_perm;
> @@ -521,6 +526,26 @@ static int q6v5_rmb_mba_wait(struct q6v5 *qproc, u32 status, int ms)
>  	return val;
>  }
>  
> +static void q6v5_dump_mba_logs(struct q6v5 *qproc)
> +{
> +	struct rproc *rproc = qproc->rproc;
> +	void *data;
> +
> +	if (!qproc->has_mba_logs)
> +		return;
> +
> +	if (q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, false, qproc->mba_phys,
> +				    qproc->mba_size))
> +		return;
> +
> +	data = vmalloc(MBA_LOG_SIZE);
> +	if (!data)
> +		return;
> +
> +	memcpy(data, qproc->mba_region, MBA_LOG_SIZE);
> +	dev_coredumpv(&rproc->dev, data, MBA_LOG_SIZE, GFP_KERNEL);
> +}
> +
>  static int q6v5proc_reset(struct q6v5 *qproc)
>  {
>  	u32 val;
> @@ -839,6 +864,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>  {
>  	int ret;
>  	int xfermemop_ret;
> +	bool mba_load_err = false;
>  
>  	qcom_q6v5_prepare(&qproc->q6v5);
>  
> @@ -932,7 +958,7 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc);
> -
> +	mba_load_err = true;
>  reclaim_mba:
>  	xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true,
>  						false, qproc->mba_phys,
> @@ -940,6 +966,8 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>  	if (xfermemop_ret) {
>  		dev_err(qproc->dev,
>  			"Failed to reclaim mba buffer, system may become unstable\n");
> +	} else if (mba_load_err) {
> +		q6v5_dump_mba_logs(qproc);
>  	}
>  
>  disable_active_clks:
> @@ -1298,6 +1326,7 @@ static int q6v5_start(struct rproc *rproc)
>  
>  reclaim_mpss:
>  	q6v5_mba_reclaim(qproc);
> +	q6v5_dump_mba_logs(qproc);
>  
>  	return ret;
>  }
> @@ -1717,6 +1746,7 @@ static int q6v5_probe(struct platform_device *pdev)
>  
>  	qproc->version = desc->version;
>  	qproc->need_mem_protection = desc->need_mem_protection;
> +	qproc->has_mba_logs = desc->has_mba_logs;
>  
>  	ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM,
>  			     qcom_msa_handover);
> @@ -1808,6 +1838,7 @@ static const struct rproc_hexagon_res sc7180_mss = {
>  	},
>  	.need_mem_protection = true,
>  	.has_alt_reset = false,
> +	.has_mba_logs = true,
>  	.has_spare_reg = true,
>  	.version = MSS_SC7180,
>  };
> @@ -1843,6 +1874,7 @@ static const struct rproc_hexagon_res sdm845_mss = {
>  	},
>  	.need_mem_protection = true,
>  	.has_alt_reset = true,
> +	.has_mba_logs = false,
>  	.has_spare_reg = false,
>  	.version = MSS_SDM845,
>  };
> @@ -1870,6 +1902,7 @@ static const struct rproc_hexagon_res msm8998_mss = {
>  	},
>  	.need_mem_protection = true,
>  	.has_alt_reset = false,
> +	.has_mba_logs = false,
>  	.has_spare_reg = false,
>  	.version = MSS_MSM8998,
>  };
> @@ -1900,6 +1933,7 @@ static const struct rproc_hexagon_res msm8996_mss = {
>  	},
>  	.need_mem_protection = true,
>  	.has_alt_reset = false,
> +	.has_mba_logs = false,
>  	.has_spare_reg = false,
>  	.version = MSS_MSM8996,
>  };
> @@ -1933,6 +1967,7 @@ static const struct rproc_hexagon_res msm8916_mss = {
>  	},
>  	.need_mem_protection = false,
>  	.has_alt_reset = false,
> +	.has_mba_logs = false,
>  	.has_spare_reg = false,
>  	.version = MSS_MSM8916,
>  };
> @@ -1974,6 +2009,7 @@ static const struct rproc_hexagon_res msm8974_mss = {
>  	},
>  	.need_mem_protection = false,
>  	.has_alt_reset = false,
> +	.has_mba_logs = false,
>  	.has_spare_reg = false,
>  	.version = MSS_MSM8974,
>  };
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* [PATCH v3 0/3] Add modem debug features
@ 2020-07-22 20:10 15% Sibi Sankar
  2020-07-22 20:10 21% ` [PATCH v3 1/3] remoteproc: qcom_q6v5_mss: Validate MBA firmware size before load Sibi Sankar
                   ` (2 more replies)
  0 siblings, 3 replies; 200+ results
From: Sibi Sankar @ 2020-07-22 20:10 UTC (permalink / raw)
  To: bjorn.andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, Sibi Sankar

The series adds support for the following modem debug features:
 * Modem debug policy which enables coredumps/live debug on secure devices
 * MBA text logs extraction on SC7180 SoCs

The series also includes fixes for a couple of mem aborts seen when
mba/modem blob size exceeds mba/mpss regions respectively.

V3:
 * Drop mba text log extraction support since its already
   picked up by Bjorn
 * Fix dp_fw leak and create a separate func for dp load [Bjorn]
 * Reset dp_size on mba_reclaim
 * 2 new patches are included and they validate mba/modem blob size
   before load

V2:
 * Use request_firmware_direct [Bjorn]
 * Use Bjorn's template to show if debug policy is present
 * Add size check to prevent memcpy out of bounds [Bjorn]
 * Don't dump logs in mba_reclaim path [Bjorn]
 * Move has_mba_logs check to q6v5_dump_mba_logs [Bjorn]
 * SDM845 mss was incorrectly marked to support mba logs
 * Drop patch 3 where mba text logs are added to imem

Sibi Sankar (3):
  remoteproc: qcom_q6v5_mss: Validate MBA firmware size before load
  remoteproc: qcom_q6v5_mss: Validate modem blob firmware size before
    load
  remoteproc: qcom_q6v5_mss: Add modem debug policy support

 drivers/remoteproc/qcom_q6v5_mss.c | 36 ++++++++++++++++++++++++++----
 1 file changed, 32 insertions(+), 4 deletions(-)

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 15%]

* [PATCH v3 1/3] remoteproc: qcom_q6v5_mss: Validate MBA firmware size before load
  2020-07-22 20:10 15% [PATCH v3 0/3] Add modem debug features Sibi Sankar
@ 2020-07-22 20:10 21% ` Sibi Sankar
  2020-07-28  5:45  0%   ` Bjorn Andersson
  2020-07-22 20:10 21% ` [PATCH v3 2/3] remoteproc: qcom_q6v5_mss: Validate modem blob " Sibi Sankar
  2020-07-22 20:10 20% ` [PATCH v3 3/3] remoteproc: qcom_q6v5_mss: Add modem debug policy support Sibi Sankar
  2 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-07-22 20:10 UTC (permalink / raw)
  To: bjorn.andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, Sibi Sankar, stable

The following mem abort is observed when the mba firmware size exceeds
the allocated mba region. MBA firmware size is restricted to a maximum
size of 1M and remaining memory region is used by modem debug policy
firmware when available. Hence verify whether the MBA firmware size lies
within the allocated memory region and is not greater than 1M before
loading.

Err Logs:
Unable to handle kernel paging request at virtual address
Mem abort info:
...
Call trace:
  __memcpy+0x110/0x180
  rproc_start+0x40/0x218
  rproc_boot+0x5b4/0x608
  state_store+0x54/0xf8
  dev_attr_store+0x44/0x60
  sysfs_kf_write+0x58/0x80
  kernfs_fop_write+0x140/0x230
  vfs_write+0xc4/0x208
  ksys_write+0x74/0xf8
  __arm64_sys_write+0x24/0x30
...

Fixes: 051fb70fd4ea4 ("remoteproc: qcom: Driver for the self-authenticating Hexagon v5")
Cc: stable@vger.kernel.org
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 drivers/remoteproc/qcom_q6v5_mss.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
index 718acebae777f..4e72c9e30426c 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -412,6 +412,12 @@ static int q6v5_load(struct rproc *rproc, const struct firmware *fw)
 {
 	struct q6v5 *qproc = rproc->priv;
 
+	/* MBA is restricted to a maximum size of 1M */
+	if (fw->size > qproc->mba_size || fw->size > SZ_1M) {
+		dev_err(qproc->dev, "MBA firmware load failed\n");
+		return -EINVAL;
+	}
+
 	memcpy(qproc->mba_region, fw->data, fw->size);
 
 	return 0;
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 21%]

* [PATCH v3 3/3] remoteproc: qcom_q6v5_mss: Add modem debug policy support
  2020-07-22 20:10 15% [PATCH v3 0/3] Add modem debug features Sibi Sankar
  2020-07-22 20:10 21% ` [PATCH v3 1/3] remoteproc: qcom_q6v5_mss: Validate MBA firmware size before load Sibi Sankar
  2020-07-22 20:10 21% ` [PATCH v3 2/3] remoteproc: qcom_q6v5_mss: Validate modem blob " Sibi Sankar
@ 2020-07-22 20:10 20% ` Sibi Sankar
  2020-07-28  5:48  0%   ` Bjorn Andersson
  2 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-07-22 20:10 UTC (permalink / raw)
  To: bjorn.andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, Sibi Sankar

Add modem debug policy support which will enable coredumps and live
debug support when the msadp firmware is present on secure devices.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---

v3:
 * Fix dp_fw leak and create a separate func for dp load [Bjorn]
 * Reset dp_size on mba_reclaim

v2:
 * Use request_firmware_direct [Bjorn]
 * Use Bjorn's template to show if debug policy is present
 * Add size check to prevent memcpy out of bounds [Bjorn]

 drivers/remoteproc/qcom_q6v5_mss.c | 25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
index f4aa61ba220dc..da99c8504a346 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -191,6 +191,7 @@ struct q6v5 {
 	phys_addr_t mba_phys;
 	void *mba_region;
 	size_t mba_size;
+	size_t dp_size;
 
 	phys_addr_t mpss_phys;
 	phys_addr_t mpss_reloc;
@@ -408,6 +409,21 @@ static int q6v5_xfer_mem_ownership(struct q6v5 *qproc, int *current_perm,
 				   current_perm, next, perms);
 }
 
+static void q6v5_debug_policy_load(struct q6v5 *qproc)
+{
+	const struct firmware *dp_fw;
+
+	if (request_firmware_direct(&dp_fw, "msadp", qproc->dev))
+		return;
+
+	if (SZ_1M + dp_fw->size <= qproc->mba_size) {
+		memcpy(qproc->mba_region + SZ_1M, dp_fw->data, dp_fw->size);
+		qproc->dp_size = dp_fw->size;
+	}
+
+	release_firmware(dp_fw);
+}
+
 static int q6v5_load(struct rproc *rproc, const struct firmware *fw)
 {
 	struct q6v5 *qproc = rproc->priv;
@@ -419,6 +435,7 @@ static int q6v5_load(struct rproc *rproc, const struct firmware *fw)
 	}
 
 	memcpy(qproc->mba_region, fw->data, fw->size);
+	q6v5_debug_policy_load(qproc);
 
 	return 0;
 }
@@ -928,6 +945,10 @@ static int q6v5_mba_load(struct q6v5 *qproc)
 	}
 
 	writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG);
+	if (qproc->dp_size) {
+		writel(qproc->mba_phys + SZ_1M, qproc->rmb_base + RMB_PMI_CODE_START_REG);
+		writel(qproc->dp_size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG);
+	}
 
 	ret = q6v5proc_reset(qproc);
 	if (ret)
@@ -996,6 +1017,7 @@ static void q6v5_mba_reclaim(struct q6v5 *qproc)
 	u32 val;
 
 	qproc->dump_mba_loaded = false;
+	qproc->dp_size = 0;
 
 	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
 	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
@@ -1290,7 +1312,8 @@ static int q6v5_start(struct rproc *rproc)
 	if (ret)
 		return ret;
 
-	dev_info(qproc->dev, "MBA booted, loading mpss\n");
+	dev_info(qproc->dev, "MBA booted with%s debug policy, loading mpss\n",
+		 qproc->dp_size ? "" : "out");
 
 	ret = q6v5_mpss_load(qproc);
 	if (ret)
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 20%]

* [PATCH v3 2/3] remoteproc: qcom_q6v5_mss: Validate modem blob firmware size before load
  2020-07-22 20:10 15% [PATCH v3 0/3] Add modem debug features Sibi Sankar
  2020-07-22 20:10 21% ` [PATCH v3 1/3] remoteproc: qcom_q6v5_mss: Validate MBA firmware size before load Sibi Sankar
@ 2020-07-22 20:10 21% ` Sibi Sankar
  2020-07-28  6:04  0%   ` Bjorn Andersson
  2020-07-22 20:10 20% ` [PATCH v3 3/3] remoteproc: qcom_q6v5_mss: Add modem debug policy support Sibi Sankar
  2 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-07-22 20:10 UTC (permalink / raw)
  To: bjorn.andersson
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, Sibi Sankar, stable

The following mem abort is observed when one of the modem blob firmware
size exceeds the allocated mpss region. Fix this by restricting the copy
size to segment size using request_firmware_into_buf before load.

Err Logs:
Unable to handle kernel paging request at virtual address
Mem abort info:
...
Call trace:
  __memcpy+0x110/0x180
  rproc_start+0xd0/0x190
  rproc_boot+0x404/0x550
  state_store+0x54/0xf8
  dev_attr_store+0x44/0x60
  sysfs_kf_write+0x58/0x80
  kernfs_fop_write+0x140/0x230
  vfs_write+0xc4/0x208
  ksys_write+0x74/0xf8
...

Fixes: 051fb70fd4ea4 ("remoteproc: qcom: Driver for the self-authenticating Hexagon v5")
Cc: stable@vger.kernel.org
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 drivers/remoteproc/qcom_q6v5_mss.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
index 4e72c9e30426c..f4aa61ba220dc 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -1174,15 +1174,14 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
 		} else if (phdr->p_filesz) {
 			/* Replace "xxx.xxx" with "xxx.bxx" */
 			sprintf(fw_name + fw_name_len - 3, "b%02d", i);
-			ret = request_firmware(&seg_fw, fw_name, qproc->dev);
+			ret = request_firmware_into_buf(&seg_fw, fw_name, qproc->dev,
+							ptr, phdr->p_filesz);
 			if (ret) {
 				dev_err(qproc->dev, "failed to load %s\n", fw_name);
 				iounmap(ptr);
 				goto release_firmware;
 			}
 
-			memcpy(ptr, seg_fw->data, seg_fw->size);
-
 			release_firmware(seg_fw);
 		}
 
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 21%]

* [PATCH 1/2] interconnect: Do not skip aggregation for disabled paths
  @ 2020-07-23  8:37  7% ` Georgi Djakov
  0 siblings, 0 replies; 200+ results
From: Georgi Djakov @ 2020-07-23  8:37 UTC (permalink / raw)
  To: gregkh; +Cc: linux-pm, linux-kernel, georgi.djakov, Atul Dhudase, Sibi Sankar

When an interconnect path is being disabled, currently we don't aggregate
the requests for it afterwards. But the re-aggregation step shouldn't be
skipped, as it may leave the nodes with outdated bandwidth data. This
outdated data may actually keep the path still enabled and prevent the
device from going into lower power states.

Reported-by: Atul Dhudase <adhudase@codeaurora.org>
Fixes: 7d374b209083 ("interconnect: Add helpers for enabling/disabling a path")
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Tested-by: Atul Dhudase <adhudase@codeaurora.org>
Reviewed-by: Atul Dhudase <adhudase@codeaurora.org>
Link: https://lore.kernel.org/r/20200721120740.3436-1-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
---
 drivers/interconnect/core.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/interconnect/core.c b/drivers/interconnect/core.c
index e5f998744501..9e1ab701785c 100644
--- a/drivers/interconnect/core.c
+++ b/drivers/interconnect/core.c
@@ -243,6 +243,7 @@ static int aggregate_requests(struct icc_node *node)
 {
 	struct icc_provider *p = node->provider;
 	struct icc_req *r;
+	u32 avg_bw, peak_bw;
 
 	node->avg_bw = 0;
 	node->peak_bw = 0;
@@ -251,9 +252,14 @@ static int aggregate_requests(struct icc_node *node)
 		p->pre_aggregate(node);
 
 	hlist_for_each_entry(r, &node->req_list, req_node) {
-		if (!r->enabled)
-			continue;
-		p->aggregate(node, r->tag, r->avg_bw, r->peak_bw,
+		if (r->enabled) {
+			avg_bw = r->avg_bw;
+			peak_bw = r->peak_bw;
+		} else {
+			avg_bw = 0;
+			peak_bw = 0;
+		}
+		p->aggregate(node, r->tag, avg_bw, peak_bw,
 			     &node->avg_bw, &node->peak_bw);
 	}
 

^ permalink raw reply	[relevance 7%]

* [PATCH 6/6] arm64: dts: qcom: sc7180: Increase the number of interconnect cells
                     ` (4 preceding siblings ...)
  2020-07-23 13:09  8% ` [PATCH 5/6] interconnect: qcom: sc7180: Replace xlate with xlate_extended Georgi Djakov
@ 2020-07-23 13:09  4% ` Georgi Djakov
  2020-07-27 21:06  0%   ` Matthias Kaehlcke
  5 siblings, 1 reply; 200+ results
From: Georgi Djakov @ 2020-07-23 13:09 UTC (permalink / raw)
  To: linux-pm, devicetree
  Cc: bjorn.andersson, robh+dt, sibis, mka, dianders, georgi.djakov,
	linux-kernel

From: Sibi Sankar <sibis@codeaurora.org>

Increase the number of interconnect-cells, as now we can include
the tag information. The consumers can specify the path tag as an
additional argument to the endpoints.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 216 +++++++++++++--------------
 1 file changed, 108 insertions(+), 108 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 16df08d9ef8f..fe80e1b8acee 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -132,7 +132,7 @@ &LITTLE_CPU_SLEEP_1
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <100>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			next-level-cache = <&L2_0>;
 			#cooling-cells = <2>;
@@ -158,7 +158,7 @@ &LITTLE_CPU_SLEEP_1
 			dynamic-power-coefficient = <100>;
 			next-level-cache = <&L2_100>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -180,7 +180,7 @@ &LITTLE_CPU_SLEEP_1
 			dynamic-power-coefficient = <100>;
 			next-level-cache = <&L2_200>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -202,7 +202,7 @@ &LITTLE_CPU_SLEEP_1
 			dynamic-power-coefficient = <100>;
 			next-level-cache = <&L2_300>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -224,7 +224,7 @@ &LITTLE_CPU_SLEEP_1
 			dynamic-power-coefficient = <100>;
 			next-level-cache = <&L2_400>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -246,7 +246,7 @@ &LITTLE_CPU_SLEEP_1
 			dynamic-power-coefficient = <100>;
 			next-level-cache = <&L2_500>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -268,7 +268,7 @@ &BIG_CPU_SLEEP_1
 			dynamic-power-coefficient = <405>;
 			next-level-cache = <&L2_600>;
 			operating-points-v2 = <&cpu6_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			qcom,freq-domain = <&cpufreq_hw 1>;
@@ -290,7 +290,7 @@ &BIG_CPU_SLEEP_1
 			dynamic-power-coefficient = <405>;
 			next-level-cache = <&L2_700>;
 			operating-points-v2 = <&cpu6_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			qcom,freq-domain = <&cpufreq_hw 1>;
@@ -742,7 +742,7 @@ qupv3_id_0: geniqup@8c0000 {
 			#size-cells = <2>;
 			ranges;
 			iommus = <&apps_smmu 0x43 0x0>;
-			interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>;
+			interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>;
 			interconnect-names = "qup-core";
 			status = "disabled";
 
@@ -756,9 +756,9 @@ i2c0: i2c@880000 {
 				interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
-						<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
+						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -776,8 +776,8 @@ spi0: spi@880000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -792,8 +792,8 @@ uart0: serial@880000 {
 				interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -808,9 +808,9 @@ i2c1: i2c@884000 {
 				interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
-						<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
+						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -828,8 +828,8 @@ spi1: spi@884000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -844,8 +844,8 @@ uart1: serial@884000 {
 				interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -860,9 +860,9 @@ i2c2: i2c@888000 {
 				interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
-						<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
+						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -878,8 +878,8 @@ uart2: serial@888000 {
 				interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -894,9 +894,9 @@ i2c3: i2c@88c000 {
 				interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
-						<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
+						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -914,8 +914,8 @@ spi3: spi@88c000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -930,8 +930,8 @@ uart3: serial@88c000 {
 				interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -946,9 +946,9 @@ i2c4: i2c@890000 {
 				interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
-						<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
+						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -964,8 +964,8 @@ uart4: serial@890000 {
 				interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -980,9 +980,9 @@ i2c5: i2c@894000 {
 				interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
-						<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
+						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -1000,8 +1000,8 @@ spi5: spi@894000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1016,8 +1016,8 @@ uart5: serial@894000 {
 				interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1033,7 +1033,7 @@ qupv3_id_1: geniqup@ac0000 {
 			#size-cells = <2>;
 			ranges;
 			iommus = <&apps_smmu 0x4c3 0x0>;
-			interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>;
+			interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>;
 			interconnect-names = "qup-core";
 			status = "disabled";
 
@@ -1047,9 +1047,9 @@ i2c6: i2c@a80000 {
 				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
-						<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
+						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -1067,8 +1067,8 @@ spi6: spi@a80000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1083,8 +1083,8 @@ uart6: serial@a80000 {
 				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1099,9 +1099,9 @@ i2c7: i2c@a84000 {
 				interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
-						<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
+						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -1117,8 +1117,8 @@ uart7: serial@a84000 {
 				interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1133,9 +1133,9 @@ i2c8: i2c@a88000 {
 				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
-						<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
+						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -1153,8 +1153,8 @@ spi8: spi@a88000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1169,8 +1169,8 @@ uart8: serial@a88000 {
 				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1185,9 +1185,9 @@ i2c9: i2c@a8c000 {
 				interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
-						<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
+						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -1203,8 +1203,8 @@ uart9: serial@a8c000 {
 				interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1219,9 +1219,9 @@ i2c10: i2c@a90000 {
 				interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
-						<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
+						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -1239,8 +1239,8 @@ spi10: spi@a90000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1255,8 +1255,8 @@ uart10: serial@a90000 {
 				interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1271,9 +1271,9 @@ i2c11: i2c@a94000 {
 				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
-						<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
+						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -1291,8 +1291,8 @@ spi11: spi@a94000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1307,8 +1307,8 @@ uart11: serial@a94000 {
 				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1317,63 +1317,63 @@ uart11: serial@a94000 {
 		config_noc: interconnect@1500000 {
 			compatible = "qcom,sc7180-config-noc";
 			reg = <0 0x01500000 0 0x28000>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		system_noc: interconnect@1620000 {
 			compatible = "qcom,sc7180-system-noc";
 			reg = <0 0x01620000 0 0x17080>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		mc_virt: interconnect@1638000 {
 			compatible = "qcom,sc7180-mc-virt";
 			reg = <0 0x01638000 0 0x1000>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		qup_virt: interconnect@1650000 {
 			compatible = "qcom,sc7180-qup-virt";
 			reg = <0 0x01650000 0 0x1000>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		aggre1_noc: interconnect@16e0000 {
 			compatible = "qcom,sc7180-aggre1-noc";
 			reg = <0 0x016e0000 0 0x15080>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		aggre2_noc: interconnect@1705000 {
 			compatible = "qcom,sc7180-aggre2-noc";
 			reg = <0 0x01705000 0 0x9000>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		compute_noc: interconnect@170e000 {
 			compatible = "qcom,sc7180-compute-noc";
 			reg = <0 0x0170e000 0 0x6000>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		mmss_noc: interconnect@1740000 {
 			compatible = "qcom,sc7180-mmss-noc";
 			reg = <0 0x01740000 0 0x1c100>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		ipa_virt: interconnect@1e00000 {
 			compatible = "qcom,sc7180-ipa-virt";
 			reg = <0 0x01e00000 0 0x1000>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
@@ -1400,9 +1400,9 @@ ipa: ipa@1e40000 {
 			clocks = <&rpmhcc RPMH_IPA_CLK>;
 			clock-names = "core";
 
-			interconnects = <&aggre2_noc MASTER_IPA &mc_virt SLAVE_EBI1>,
-				        <&aggre2_noc MASTER_IPA &system_noc SLAVE_IMEM>,
-					<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_IPA_CFG>;
+			interconnects = <&aggre2_noc MASTER_IPA 0 &mc_virt SLAVE_EBI1 0>,
+					<&aggre2_noc MASTER_IPA 0 &system_noc SLAVE_IMEM 0>,
+					<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_IPA_CFG 0>;
 			interconnect-names = "memory",
 					     "imem",
 					     "config";
@@ -2526,8 +2526,8 @@ qspi: spi@88dc000 {
 			clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
 				 <&gcc GCC_QSPI_CORE_CLK>;
 			clock-names = "iface", "core";
-			interconnects = <&gem_noc MASTER_APPSS_PROC
-					&config_noc SLAVE_QSPI_0>;
+			interconnects = <&gem_noc MASTER_APPSS_PROC 0
+					&config_noc SLAVE_QSPI_0 0>;
 			interconnect-names = "qspi-config";
 			power-domains = <&rpmhpd SC7180_CX>;
 			operating-points-v2 = <&qspi_opp_table>;
@@ -2586,7 +2586,7 @@ usb_1_ssphy: phy@88e9200 {
 		dc_noc: interconnect@9160000 {
 			compatible = "qcom,sc7180-dc-noc";
 			reg = <0 0x09160000 0 0x03200>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
@@ -2600,14 +2600,14 @@ system-cache-controller@9200000 {
 		gem_noc: interconnect@9680000 {
 			compatible = "qcom,sc7180-gem-noc";
 			reg = <0 0x09680000 0 0x3e200>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		npu_noc: interconnect@9990000 {
 			compatible = "qcom,sc7180-npu-noc";
 			reg = <0 0x09990000 0 0x1600>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
@@ -2643,8 +2643,8 @@ usb_1: usb@a6f8800 {
 
 			resets = <&gcc GCC_USB30_PRIM_BCR>;
 
-			interconnects = <&aggre2_noc MASTER_USB3 &mc_virt SLAVE_EBI1>,
-					<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3>;
+			interconnects = <&aggre2_noc MASTER_USB3 0 &mc_virt SLAVE_EBI1 0>,
+					<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3 0>;
 			interconnect-names = "usb-ddr", "apps-usb";
 
 			usb_1_dwc3: dwc3@a600000 {
@@ -2675,8 +2675,8 @@ venus: video-codec@aa00000 {
 				      "vcodec0_core", "vcodec0_bus";
 			iommus = <&apps_smmu 0x0c00 0x60>;
 			memory-region = <&venus_mem>;
-			interconnects = <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI1>,
-					<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>;
+			interconnects = <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>,
+					<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_VENUS_CFG 0>;
 			interconnect-names = "video-mem", "cpu-cfg";
 
 			video-decoder {
@@ -2701,7 +2701,7 @@ videocc: clock-controller@ab00000 {
 		camnoc_virt: interconnect@ac00000 {
 			compatible = "qcom,sc7180-camnoc-virt";
 			reg = <0 0x0ac00000 0 0x1000>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 

^ permalink raw reply	[relevance 4%]

* [PATCH 5/6] interconnect: qcom: sc7180: Replace xlate with xlate_extended
                     ` (3 preceding siblings ...)
  @ 2020-07-23 13:09  8% ` Georgi Djakov
  2020-07-27 20:58  0%   ` Matthias Kaehlcke
  2020-07-23 13:09  4% ` [PATCH 6/6] arm64: dts: qcom: sc7180: Increase the number of interconnect cells Georgi Djakov
  5 siblings, 1 reply; 200+ results
From: Georgi Djakov @ 2020-07-23 13:09 UTC (permalink / raw)
  To: linux-pm, devicetree
  Cc: bjorn.andersson, robh+dt, sibis, mka, dianders, georgi.djakov,
	linux-kernel

From: Sibi Sankar <sibis@codeaurora.org>

Use the qcom_icc_xlate_extended() in order to parse tags, that are
specified as an additional arguments to the path endpoints in DT.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
---
 drivers/interconnect/qcom/sc7180.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/interconnect/qcom/sc7180.c b/drivers/interconnect/qcom/sc7180.c
index dcf493d07928..a6f119f363b1 100644
--- a/drivers/interconnect/qcom/sc7180.c
+++ b/drivers/interconnect/qcom/sc7180.c
@@ -535,7 +535,7 @@ static int qnoc_probe(struct platform_device *pdev)
 	provider->set = qcom_icc_set;
 	provider->pre_aggregate = qcom_icc_pre_aggregate;
 	provider->aggregate = qcom_icc_aggregate;
-	provider->xlate = of_icc_xlate_onecell;
+	provider->xlate_extended = qcom_icc_xlate_extended;
 	INIT_LIST_HEAD(&provider->nodes);
 	provider->data = data;
 

^ permalink raw reply	[relevance 8%]

* Re: [PATCH v2 7/7] arm64: dts: qcom: sm8250: add interconnect nodes
  @ 2020-07-24 14:13  6%   ` Sibi Sankar
    0 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-07-24 14:13 UTC (permalink / raw)
  To: Jonathan Marek
  Cc: linux-arm-msm, Andy Gross, Bjorn Andersson, Rob Herring,
	devicetree, linux-kernel, linux-kernel-owner

Hey Jonathan,

Thanks for the patch! Please use the
suggested register space definitions
instead.

On 2020-07-13 21:11, Jonathan Marek wrote:
> Add the interconnect dts nodes for sm8250.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 82 ++++++++++++++++++++++++++++
>  1 file changed, 82 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 636e2196138c..dfc1b7fa7d85 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -11,6 +11,7 @@
>  #include <dt-bindings/power/qcom-aoss-qmp.h>
>  #include <dt-bindings/power/qcom-rpmpd.h>
>  #include <dt-bindings/soc/qcom,rpmh-rsc.h>
> +#include <dt-bindings/interconnect/qcom,sm8250.h>

please fix ^^ sort order

> 
>  / {
>  	interrupt-parent = <&intc>;
> @@ -978,6 +979,55 @@ spi13: spi@a94000 {
>  			};
>  		};
> 
> +		config_noc: interconnect@1500000 {
> +			compatible = "qcom,sm8250-config-noc";
> +			reg = <0 0x01500000 0 0x1000>;

0x01500000 0xa580

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		ipa_virt: interconnect@1620000 {
> +			compatible = "qcom,sm8250-ipa-virt";
> +			reg = <0 0x01620000 0 0x1000>;

0x01e00000 0x1000

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		system_noc: interconnect@1632000 {
> +			compatible = "qcom,sm8250-system-noc";
> +			reg = <0 0x01632000 0 0x1000>;

0x01620000 0x1C200

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		aggre1_noc: interconnect@16e2000 {
> +			compatible = "qcom,sm8250-aggre1-noc";
> +			reg = <0 0x016e2000 0 0x1000>;

0x016e0000 0x1f180

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		aggre2_noc: interconnect@1703000 {
> +			compatible = "qcom,sm8250-aggre2-noc";
> +			reg = <0 0x01703000 0 0x1000>;

0x01700000 0x33000

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		compute_noc: interconnect@1733000 {
> +			compatible = "qcom,sm8250-compute-noc";
> +			reg = <0 0x01733000 0 0x1000>;

0x01733000 0xd180

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		mmss_noc: interconnect@174a000 {
> +			compatible = "qcom,sm8250-mmss-noc";
> +			reg = <0 0x0174a000 0 0x1000>;

0x01740000 0x1f080

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
>  		ufs_mem_hc: ufshc@1d84000 {
>  			compatible = "qcom,sm8250-ufshc", "qcom,ufshc",
>  				     "jedec,ufs-2.0";
> @@ -1364,6 +1414,34 @@ usb_2_ssphy: lane@88eb200 {
>  			};
>  		};
> 
> +		dc_noc: interconnect@90c0000 {
> +			compatible = "qcom,sm8250-dc-noc";
> +			reg = <0 0x090c0000 0 0x1000>;

0x090c0000 0x4200

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		mc_virt: interconnect@9100000 {
> +			compatible = "qcom,sm8250-mc-virt";
> +			reg = <0 0x09100000 0 0x1000>;

0x0163d000 0x1000

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		gem_noc: interconnect@9121000 {
> +			compatible = "qcom,sm8250-gem-noc";
> +			reg = <0 0x09121000 0 0x1000>;

0x09100000 0xb4000

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		npu_noc: interconnect@9990000 {
> +			compatible = "qcom,sm8250-npu-noc";
> +			reg = <0 0x09990000 0 0x1000>;

0x09990000 0x1600

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
>  		usb_1: usb@a6f8800 {
>  			compatible = "qcom,sm8250-dwc3", "qcom,dwc3";
>  			reg = <0 0x0a6f8800 0 0x400>;
> @@ -2359,6 +2437,10 @@ rpmhpd_opp_turbo_l1: opp10 {
>  					};
>  				};
>  			};
> +
> +			apps_bcm_voter: bcm_voter {
> +				compatible = "qcom,bcm-voter";
> +			};
>  		};
>  	};

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* Re: [PATCH v2 6/7] arm64: dts: qcom: sm8150: add interconnect nodes
  @ 2020-07-24 14:13  6%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-24 14:13 UTC (permalink / raw)
  To: Jonathan Marek
  Cc: linux-arm-msm, Andy Gross, Bjorn Andersson, Rob Herring,
	devicetree, linux-kernel, linux-arm-msm-owner

Hey Jonathan,

Thanks for the patch! Please use the
suggested register space definitions
instead.

On 2020-07-13 21:11, Jonathan Marek wrote:
> Add the interconnect dts nodes for sm8150.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 82 ++++++++++++++++++++++++++++
>  1 file changed, 82 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 33ff99132f4f..fa9cd9d60093 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -11,6 +11,7 @@
>  #include <dt-bindings/clock/qcom,rpmh.h>
>  #include <dt-bindings/clock/qcom,gcc-sm8150.h>
>  #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
> +#include <dt-bindings/interconnect/qcom,sm8150.h>
>  #include <dt-bindings/thermal/thermal.h>
> 
>  / {
> @@ -440,6 +441,69 @@ uart2: serial@a90000 {
>  			};
>  		};
> 
> +		dc_noc: interconnect@14e0000 {
> +			compatible = "qcom,sm8150-dc-noc";
> +			reg = <0 0x014e0000 0 0x1000>;

0x09160000 0x3200

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		config_noc: interconnect@1500000 {
> +			compatible = "qcom,sm8150-config-noc";
> +			reg = <0 0x01500000 0 0x1000>;

0x01500000 0x7400

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		camnoc_virt: interconnect@1620000 {
> +			compatible = "qcom,sm8150-camnoc-virt";
> +			reg = <0 0x01620000 0 0x1000>;

0x0ac00000 0x1000

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		ipa_virt: interconnect-ipa@1620000 {
> +			compatible = "qcom,sm8150-ipa-virt";
> +			reg = <0 0x01620000 0 0x1000>;

0x01e00000 0x1000

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		system_noc: interconnect@1629000 {
> +			compatible = "qcom,sm8150-system-noc";
> +			reg = <0 0x01500000 0 0x1000>;

0x01620000 0x19400

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		aggre1_noc: interconnect@16e4000 {
> +			compatible = "qcom,sm8150-aggre1-noc";
> +			reg = <0 0x016e4000 0 0x1000>;

0x016e0000 0xd080

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		aggre2_noc: interconnect@1706000 {
> +			compatible = "qcom,sm8150-aggre2-noc";
> +			reg = <0 0x01706000 0 0x1000>;

0x01700000 0x3b100

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		compute_noc: interconnect@1720000 {
> +			compatible = "qcom,sm8150-compute-noc";
> +			reg = <0 0x01720000 0 0x1000>;

0x01720000 0x7000

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		mmss_noc: interconnect@1749000 {
> +			compatible = "qcom,sm8150-mmss-noc";
> +			reg = <0 0x01749000 0 0x1000>;

0x01740000 0x1c100

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
>  		ufs_mem_hc: ufshc@1d84000 {
>  			compatible = "qcom,sm8150-ufshc", "qcom,ufshc",
>  				     "jedec,ufs-2.0";
> @@ -860,6 +924,20 @@ usb_2_ssphy: lane@88eb200 {
>  			};
>  		};
> 
> +		mc_virt: interconnect@9680000 {
> +			compatible = "qcom,sm8150-mc-virt";
> +			reg = <0 0x09680000 0 0x1000>;

0x0163a000 0x1000

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		gem_noc: interconnect@96ab000 {
> +			compatible = "qcom,sm8150-gem-noc";
> +			reg = <0 0x096ab000 0 0x1000>;

0x09680000 0x3e200

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
>  		usb_1: usb@a6f8800 {
>  			compatible = "qcom,sm8150-dwc3", "qcom,dwc3";
>  			reg = <0 0x0a6f8800 0 0x400>;
> @@ -1280,6 +1358,10 @@ rpmhpd_opp_turbo_l1: opp11 {
>  					};
>  				};
>  			};
> +
> +			apps_bcm_voter: bcm_voter {
> +				compatible = "qcom,bcm-voter";
> +			};
>  		};
> 
>  		cpufreq_hw: cpufreq@18323000 {

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* Re: [PATCH v2 4/7] interconnect: qcom: Add SM8150 interconnect provider driver
  @ 2020-07-24 14:29  6%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-24 14:29 UTC (permalink / raw)
  To: Jonathan Marek
  Cc: linux-arm-msm, Andy Gross, Bjorn Andersson, Georgi Djakov,
	linux-kernel, linux-pm, linux-kernel-owner

Hey Jonathan,
Thanks for the patch!

On 2020-07-13 21:11, Jonathan Marek wrote:
> Add driver for the Qualcomm interconnect buses found in SM8150 based
> platforms. The topology consists of several NoCs that are controlled by
> a remote processor that collects the aggregated bandwidth for each
> master-slave pairs.
> 
> Based on SC7180 driver and generated from downstream dts.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  drivers/interconnect/qcom/Kconfig  |  10 +
>  drivers/interconnect/qcom/Makefile |   2 +
>  drivers/interconnect/qcom/sm8150.c | 639 +++++++++++++++++++++++++++++
>  drivers/interconnect/qcom/sm8150.h | 153 +++++++
>  4 files changed, 804 insertions(+)
>  create mode 100644 drivers/interconnect/qcom/sm8150.c
>  create mode 100644 drivers/interconnect/qcom/sm8150.h
> 
> diff --git a/drivers/interconnect/qcom/Kconfig
> b/drivers/interconnect/qcom/Kconfig
> index a88f2f07bc27..25486de5a38d 100644
> --- a/drivers/interconnect/qcom/Kconfig
> +++ b/drivers/interconnect/qcom/Kconfig
> @@ -65,5 +65,15 @@ config INTERCONNECT_QCOM_SDM845
>  	  This is a driver for the Qualcomm Network-on-Chip on sdm845-based
>  	  platforms.
> 
> +config INTERCONNECT_QCOM_SM8150
> +	tristate "Qualcomm SM8150 interconnect driver"
> +	depends on INTERCONNECT_QCOM
> +	depends on (QCOM_RPMH && QCOM_COMMAND_DB && OF) || COMPILE_TEST
> +	select INTERCONNECT_QCOM_RPMH
> +	select INTERCONNECT_QCOM_BCM_VOTER
> +	help
> +	  This is a driver for the Qualcomm Network-on-Chip on sm8150-based
> +	  platforms.
> +
>  config INTERCONNECT_QCOM_SMD_RPM
>  	tristate
> diff --git a/drivers/interconnect/qcom/Makefile
> b/drivers/interconnect/qcom/Makefile
> index 3a047fe6e45a..1702ece67dc5 100644
> --- a/drivers/interconnect/qcom/Makefile
> +++ b/drivers/interconnect/qcom/Makefile
> @@ -8,6 +8,7 @@ qnoc-qcs404-objs			:= qcs404.o
>  icc-rpmh-obj				:= icc-rpmh.o
>  qnoc-sc7180-objs			:= sc7180.o
>  qnoc-sdm845-objs			:= sdm845.o
> +qnoc-sm8150-objs			:= sm8150.o
>  icc-smd-rpm-objs			:= smd-rpm.o
> 
>  obj-$(CONFIG_INTERCONNECT_QCOM_BCM_VOTER) += icc-bcm-voter.o
> @@ -18,4 +19,5 @@ obj-$(CONFIG_INTERCONNECT_QCOM_QCS404) += 
> qnoc-qcs404.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_RPMH) += icc-rpmh.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_SC7180) += qnoc-sc7180.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_SDM845) += qnoc-sdm845.o
> +obj-$(CONFIG_INTERCONNECT_QCOM_SM8150) += qnoc-sm8150.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_SMD_RPM) += icc-smd-rpm.o
> diff --git a/drivers/interconnect/qcom/sm8150.c
> b/drivers/interconnect/qcom/sm8150.c
> new file mode 100644
> index 000000000000..2b82fa8dd275
> --- /dev/null
> +++ b/drivers/interconnect/qcom/sm8150.c
> @@ -0,0 +1,639 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> + *
> + */
> +
> +#include <linux/device.h>
> +#include <linux/interconnect.h>
> +#include <linux/interconnect-provider.h>
> +#include <linux/module.h>
> +#include <linux/of_platform.h>
> +#include <dt-bindings/interconnect/qcom,sm8150.h>
> +
> +#include "bcm-voter.h"
> +#include "icc-rpmh.h"
> +#include "sm8150.h"
> +
> +DEFINE_QNODE(qhm_a1noc_cfg, SM8150_MASTER_A1NOC_CFG, 1, 4,
> SM8150_SLAVE_SERVICE_A1NOC);
> +DEFINE_QNODE(qhm_qup0, SM8150_MASTER_QUP_0, 1, 4, 
> SM8150_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_emac, SM8150_MASTER_EMAC, 1, 8, 
> SM8150_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_ufs_mem, SM8150_MASTER_UFS_MEM, 1, 8, 
> SM8150_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_usb3_0, SM8150_MASTER_USB3, 1, 8, 
> SM8150_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_usb3_1, SM8150_MASTER_USB3_1, 1, 8, 
> SM8150_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_a2noc_cfg, SM8150_MASTER_A2NOC_CFG, 1, 4,
> SM8150_SLAVE_SERVICE_A2NOC);
> +DEFINE_QNODE(qhm_qdss_bam, SM8150_MASTER_QDSS_BAM, 1, 4,
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_qspi, SM8150_MASTER_QSPI, 1, 4, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_qup1, SM8150_MASTER_QUP_1, 1, 4, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_qup2, SM8150_MASTER_QUP_2, 1, 4, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_sensorss_ahb, SM8150_MASTER_SENSORS_AHB, 1, 4,
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_tsif, SM8150_MASTER_TSIF, 1, 4, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qnm_cnoc, SM8150_MASTER_CNOC_A2NOC, 1, 8, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qxm_crypto, SM8150_MASTER_CRYPTO_CORE_0, 1, 8,
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qxm_ipa, SM8150_MASTER_IPA, 1, 8, SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_pcie3_0, SM8150_MASTER_PCIE, 1, 8,
> SM8150_SLAVE_ANOC_PCIE_GEM_NOC);
> +DEFINE_QNODE(xm_pcie3_1, SM8150_MASTER_PCIE_1, 1, 8,
> SM8150_SLAVE_ANOC_PCIE_GEM_NOC);
> +DEFINE_QNODE(xm_qdss_etr, SM8150_MASTER_QDSS_ETR, 1, 8, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_sdc2, SM8150_MASTER_SDCC_2, 1, 8, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_sdc4, SM8150_MASTER_SDCC_4, 1, 8, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qxm_camnoc_hf0_uncomp, SM8150_MASTER_CAMNOC_HF0_UNCOMP,
> 1, 32, SM8150_SLAVE_CAMNOC_UNCOMP);
> +DEFINE_QNODE(qxm_camnoc_hf1_uncomp, SM8150_MASTER_CAMNOC_HF1_UNCOMP,
> 1, 32, SM8150_SLAVE_CAMNOC_UNCOMP);
> +DEFINE_QNODE(qxm_camnoc_sf_uncomp, SM8150_MASTER_CAMNOC_SF_UNCOMP, 1,
> 32, SM8150_SLAVE_CAMNOC_UNCOMP);
> +DEFINE_QNODE(qnm_npu, SM8150_MASTER_NPU, 1, 32, 
> SM8150_SLAVE_CDSP_MEM_NOC);
> +DEFINE_QNODE(qhm_spdm, SM8150_MASTER_SPDM, 1, 4, 
> SM8150_SLAVE_CNOC_A2NOC);
> +DEFINE_QNODE(qnm_snoc, SM8150_SNOC_CNOC_MAS, 1, 8,
> SM8150_SLAVE_TLMM_SOUTH, SM8150_SLAVE_CDSP_CFG, SM8150_SLAVE_SPSS_CFG,
> SM8150_SLAVE_CAMERA_CFG, SM8150_SLAVE_SDCC_4, SM8150_SLAVE_SDCC_2,
> SM8150_SLAVE_CNOC_MNOC_CFG, SM8150_SLAVE_EMAC_CFG,
> SM8150_SLAVE_UFS_MEM_CFG, SM8150_SLAVE_TLMM_EAST,
> SM8150_SLAVE_SSC_CFG, SM8150_SLAVE_SNOC_CFG,
> SM8150_SLAVE_NORTH_PHY_CFG, SM8150_SLAVE_QUP_0, SM8150_SLAVE_GLM,
> SM8150_SLAVE_PCIE_1_CFG, SM8150_SLAVE_A2NOC_CFG,
> SM8150_SLAVE_QDSS_CFG, SM8150_SLAVE_DISPLAY_CFG, SM8150_SLAVE_TCSR,
> SM8150_SLAVE_CNOC_DDRSS, SM8150_SLAVE_RBCPR_MMCX_CFG,
> SM8150_SLAVE_NPU_CFG, SM8150_SLAVE_PCIE_0_CFG,
> SM8150_SLAVE_GRAPHICS_3D_CFG, SM8150_SLAVE_VENUS_CFG,
> SM8150_SLAVE_TSIF, SM8150_SLAVE_IPA_CFG, SM8150_SLAVE_CLK_CTL,
> SM8150_SLAVE_AOP, SM8150_SLAVE_QUP_1, SM8150_SLAVE_AHB2PHY_SOUTH,
> SM8150_SLAVE_USB3_1, SM8150_SLAVE_SERVICE_CNOC,
> SM8150_SLAVE_UFS_CARD_CFG, SM8150_SLAVE_QUP_2,
> SM8150_SLAVE_RBCPR_CX_CFG, SM8150_SLAVE_TLMM_WEST,
> SM8150_SLAVE_A1NOC_CFG, SM8150_SLAVE_AOSS, SM8150_SLAVE_PRNG,
> SM8150_SLAVE_VSENSE_CTRL_CFG, SM8150_SLAVE_QSPI, SM8150_SLAVE_USB3,
> SM8150_SLAVE_SPDM_WRAPPER, SM8150_SLAVE_CRYPTO_0_CFG,
> SM8150_SLAVE_PIMEM_CFG, SM8150_SLAVE_TLMM_NORTH,
> SM8150_SLAVE_RBCPR_MX_CFG, SM8150_SLAVE_IMEM_CFG);
> +DEFINE_QNODE(xm_qdss_dap, SM8150_MASTER_QDSS_DAP, 1, 8,
> SM8150_SLAVE_TLMM_SOUTH, SM8150_SLAVE_CDSP_CFG, SM8150_SLAVE_SPSS_CFG,
> SM8150_SLAVE_CAMERA_CFG, SM8150_SLAVE_SDCC_4, SM8150_SLAVE_SDCC_2,
> SM8150_SLAVE_CNOC_MNOC_CFG, SM8150_SLAVE_EMAC_CFG,
> SM8150_SLAVE_UFS_MEM_CFG, SM8150_SLAVE_TLMM_EAST,
> SM8150_SLAVE_SSC_CFG, SM8150_SLAVE_SNOC_CFG,
> SM8150_SLAVE_NORTH_PHY_CFG, SM8150_SLAVE_QUP_0, SM8150_SLAVE_GLM,
> SM8150_SLAVE_PCIE_1_CFG, SM8150_SLAVE_A2NOC_CFG,
> SM8150_SLAVE_QDSS_CFG, SM8150_SLAVE_DISPLAY_CFG, SM8150_SLAVE_TCSR,
> SM8150_SLAVE_CNOC_DDRSS, SM8150_SLAVE_CNOC_A2NOC,
> SM8150_SLAVE_RBCPR_MMCX_CFG, SM8150_SLAVE_NPU_CFG,
> SM8150_SLAVE_PCIE_0_CFG, SM8150_SLAVE_GRAPHICS_3D_CFG,
> SM8150_SLAVE_VENUS_CFG, SM8150_SLAVE_TSIF, SM8150_SLAVE_IPA_CFG,
> SM8150_SLAVE_CLK_CTL, SM8150_SLAVE_AOP, SM8150_SLAVE_QUP_1,
> SM8150_SLAVE_AHB2PHY_SOUTH, SM8150_SLAVE_USB3_1,
> SM8150_SLAVE_SERVICE_CNOC, SM8150_SLAVE_UFS_CARD_CFG,
> SM8150_SLAVE_QUP_2, SM8150_SLAVE_RBCPR_CX_CFG, SM8150_SLAVE_TLMM_WEST,
> SM8150_SLAVE_A1NOC_CFG, SM8150_SLAVE_AOSS, SM8150_SLAVE_PRNG,
> SM8150_SLAVE_VSENSE_CTRL_CFG, SM8150_SLAVE_QSPI, SM8150_SLAVE_USB3,
> SM8150_SLAVE_SPDM_WRAPPER, SM8150_SLAVE_CRYPTO_0_CFG,
> SM8150_SLAVE_PIMEM_CFG, SM8150_SLAVE_TLMM_NORTH,
> SM8150_SLAVE_RBCPR_MX_CFG, SM8150_SLAVE_IMEM_CFG);
> +DEFINE_QNODE(qhm_cnoc_dc_noc, SM8150_MASTER_CNOC_DC_NOC, 1, 4,
> SM8150_SLAVE_GEM_NOC_CFG, SM8150_SLAVE_LLCC_CFG);
> +DEFINE_QNODE(acm_apps, SM8150_MASTER_AMPSS_M0, 2, 32,
> SM8150_SLAVE_ECC, SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(acm_gpu_tcu, SM8150_MASTER_GPU_TCU, 1, 8,
> SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(acm_sys_tcu, SM8150_MASTER_SYS_TCU, 1, 8,
> SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qhm_gemnoc_cfg, SM8150_MASTER_GEM_NOC_CFG, 1, 4,
> SM8150_SLAVE_SERVICE_GEM_NOC, SM8150_SLAVE_MSS_PROC_MS_MPU_CFG);
> +DEFINE_QNODE(qnm_cmpnoc, SM8150_MASTER_COMPUTE_NOC, 2, 32,
> SM8150_SLAVE_ECC, SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_gpu, SM8150_MASTER_GRAPHICS_3D, 2, 32,
> SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_mnoc_hf, SM8150_MASTER_MNOC_HF_MEM_NOC, 2, 32,
> SM8150_SLAVE_LLCC);
> +DEFINE_QNODE(qnm_mnoc_sf, SM8150_MASTER_MNOC_SF_MEM_NOC, 1, 32,
> SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_pcie, SM8150_MASTER_GEM_NOC_PCIE_SNOC, 1, 16,
> SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_snoc_gc, SM8150_MASTER_SNOC_GC_MEM_NOC, 1, 8,
> SM8150_SLAVE_LLCC);
> +DEFINE_QNODE(qnm_snoc_sf, SM8150_MASTER_SNOC_SF_MEM_NOC, 1, 16,
> SM8150_SLAVE_LLCC);
> +DEFINE_QNODE(qxm_ecc, SM8150_MASTER_ECC, 2, 32, SM8150_SLAVE_LLCC);
> +DEFINE_QNODE(ipa_core_master, SM8150_MASTER_IPA_CORE, 1, 8,
> SM8150_SLAVE_IPA_CORE);
> +DEFINE_QNODE(llcc_mc, SM8150_MASTER_LLCC, 4, 4, SM8150_SLAVE_EBI_CH0);
> +DEFINE_QNODE(qhm_mnoc_cfg, SM8150_MASTER_CNOC_MNOC_CFG, 1, 4,
> SM8150_SLAVE_SERVICE_MNOC);
> +DEFINE_QNODE(qxm_camnoc_hf0, SM8150_MASTER_CAMNOC_HF0, 1, 32,
> SM8150_SLAVE_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qxm_camnoc_hf1, SM8150_MASTER_CAMNOC_HF1, 1, 32,
> SM8150_SLAVE_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qxm_camnoc_sf, SM8150_MASTER_CAMNOC_SF, 1, 32,
> SM8150_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qxm_mdp0, SM8150_MASTER_MDP_PORT0, 1, 32,
> SM8150_SLAVE_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qxm_mdp1, SM8150_MASTER_MDP_PORT1, 1, 32,
> SM8150_SLAVE_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qxm_rot, SM8150_MASTER_ROTATOR, 1, 32,
> SM8150_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qxm_venus0, SM8150_MASTER_VIDEO_P0, 1, 32,
> SM8150_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qxm_venus1, SM8150_MASTER_VIDEO_P1, 1, 32,
> SM8150_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qxm_venus_arm9, SM8150_MASTER_VIDEO_PROC, 1, 8,
> SM8150_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qhm_snoc_cfg, SM8150_MASTER_SNOC_CFG, 1, 4,
> SM8150_SLAVE_SERVICE_SNOC);
> +DEFINE_QNODE(qnm_aggre1_noc, SM8150_A1NOC_SNOC_MAS, 1, 16,
> SM8150_SLAVE_SNOC_GEM_NOC_SF, SM8150_SLAVE_PIMEM, SM8150_SLAVE_OCIMEM,
> SM8150_SLAVE_APPSS, SM8150_SNOC_CNOC_SLV, SM8150_SLAVE_QDSS_STM);
> +DEFINE_QNODE(qnm_aggre2_noc, SM8150_A2NOC_SNOC_MAS, 1, 16,
> SM8150_SLAVE_SNOC_GEM_NOC_SF, SM8150_SLAVE_PIMEM, SM8150_SLAVE_OCIMEM,
> SM8150_SLAVE_APPSS, SM8150_SNOC_CNOC_SLV, SM8150_SLAVE_PCIE_0,
> SM8150_SLAVE_PCIE_1, SM8150_SLAVE_TCU, SM8150_SLAVE_QDSS_STM);
> +DEFINE_QNODE(qnm_gemnoc, SM8150_MASTER_GEM_NOC_SNOC, 1, 8,
> SM8150_SLAVE_PIMEM, SM8150_SLAVE_OCIMEM, SM8150_SLAVE_APPSS,
> SM8150_SNOC_CNOC_SLV, SM8150_SLAVE_TCU, SM8150_SLAVE_QDSS_STM);
> +DEFINE_QNODE(qxm_pimem, SM8150_MASTER_PIMEM, 1, 8,
> SM8150_SLAVE_SNOC_GEM_NOC_GC, SM8150_SLAVE_OCIMEM);
> +DEFINE_QNODE(xm_gic, SM8150_MASTER_GIC, 1, 8,
> SM8150_SLAVE_SNOC_GEM_NOC_GC, SM8150_SLAVE_OCIMEM);
> +DEFINE_QNODE(alc, SM8150_MASTER_ALC, 1, 1);

You can safely remove the ^^ icc node
and the bcm_alc since it will not be
voted from kernel. We seem to do the
same for the SC7180 icc provider as
well.

> +DEFINE_QNODE(qns_a1noc_snoc, SM8150_A1NOC_SNOC_SLV, 1, 16,
> SM8150_A1NOC_SNOC_MAS);
> +DEFINE_QNODE(srvc_aggre1_noc, SM8150_SLAVE_SERVICE_A1NOC, 1, 4);
> +DEFINE_QNODE(qns_a2noc_snoc, SM8150_A2NOC_SNOC_SLV, 1, 16,
> SM8150_A2NOC_SNOC_MAS);
> +DEFINE_QNODE(qns_pcie_mem_noc, SM8150_SLAVE_ANOC_PCIE_GEM_NOC, 1, 16,
> SM8150_MASTER_GEM_NOC_PCIE_SNOC);
> +DEFINE_QNODE(srvc_aggre2_noc, SM8150_SLAVE_SERVICE_A2NOC, 1, 4);
> +DEFINE_QNODE(qns_camnoc_uncomp, SM8150_SLAVE_CAMNOC_UNCOMP, 1, 32);
> +DEFINE_QNODE(qns_cdsp_mem_noc, SM8150_SLAVE_CDSP_MEM_NOC, 2, 32,
> SM8150_MASTER_COMPUTE_NOC);
> +DEFINE_QNODE(qhs_a1_noc_cfg, SM8150_SLAVE_A1NOC_CFG, 1, 4,
> SM8150_MASTER_A1NOC_CFG);
> +DEFINE_QNODE(qhs_a2_noc_cfg, SM8150_SLAVE_A2NOC_CFG, 1, 4,
> SM8150_MASTER_A2NOC_CFG);
> +DEFINE_QNODE(qhs_ahb2phy_south, SM8150_SLAVE_AHB2PHY_SOUTH, 1, 4);
> +DEFINE_QNODE(qhs_aop, SM8150_SLAVE_AOP, 1, 4);
> +DEFINE_QNODE(qhs_aoss, SM8150_SLAVE_AOSS, 1, 4);
> +DEFINE_QNODE(qhs_camera_cfg, SM8150_SLAVE_CAMERA_CFG, 1, 4);
> +DEFINE_QNODE(qhs_clk_ctl, SM8150_SLAVE_CLK_CTL, 1, 4);
> +DEFINE_QNODE(qhs_compute_dsp, SM8150_SLAVE_CDSP_CFG, 1, 4);
> +DEFINE_QNODE(qhs_cpr_cx, SM8150_SLAVE_RBCPR_CX_CFG, 1, 4);
> +DEFINE_QNODE(qhs_cpr_mmcx, SM8150_SLAVE_RBCPR_MMCX_CFG, 1, 4);
> +DEFINE_QNODE(qhs_cpr_mx, SM8150_SLAVE_RBCPR_MX_CFG, 1, 4);
> +DEFINE_QNODE(qhs_crypto0_cfg, SM8150_SLAVE_CRYPTO_0_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ddrss_cfg, SM8150_SLAVE_CNOC_DDRSS, 1, 4,
> SM8150_MASTER_CNOC_DC_NOC);
> +DEFINE_QNODE(qhs_display_cfg, SM8150_SLAVE_DISPLAY_CFG, 1, 4);
> +DEFINE_QNODE(qhs_emac_cfg, SM8150_SLAVE_EMAC_CFG, 1, 4);
> +DEFINE_QNODE(qhs_glm, SM8150_SLAVE_GLM, 1, 4);
> +DEFINE_QNODE(qhs_gpuss_cfg, SM8150_SLAVE_GRAPHICS_3D_CFG, 1, 8);
> +DEFINE_QNODE(qhs_imem_cfg, SM8150_SLAVE_IMEM_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ipa, SM8150_SLAVE_IPA_CFG, 1, 4);
> +DEFINE_QNODE(qhs_mnoc_cfg, SM8150_SLAVE_CNOC_MNOC_CFG, 1, 4,
> SM8150_MASTER_CNOC_MNOC_CFG);
> +DEFINE_QNODE(qhs_npu_cfg, SM8150_SLAVE_NPU_CFG, 1, 4);
> +DEFINE_QNODE(qhs_pcie0_cfg, SM8150_SLAVE_PCIE_0_CFG, 1, 4);
> +DEFINE_QNODE(qhs_pcie1_cfg, SM8150_SLAVE_PCIE_1_CFG, 1, 4);
> +DEFINE_QNODE(qhs_phy_refgen_north, SM8150_SLAVE_NORTH_PHY_CFG, 1, 4);
> +DEFINE_QNODE(qhs_pimem_cfg, SM8150_SLAVE_PIMEM_CFG, 1, 4);
> +DEFINE_QNODE(qhs_prng, SM8150_SLAVE_PRNG, 1, 4);
> +DEFINE_QNODE(qhs_qdss_cfg, SM8150_SLAVE_QDSS_CFG, 1, 4);
> +DEFINE_QNODE(qhs_qspi, SM8150_SLAVE_QSPI, 1, 4);
> +DEFINE_QNODE(qhs_qupv3_east, SM8150_SLAVE_QUP_2, 1, 4);
> +DEFINE_QNODE(qhs_qupv3_north, SM8150_SLAVE_QUP_1, 1, 4);
> +DEFINE_QNODE(qhs_qupv3_south, SM8150_SLAVE_QUP_0, 1, 4);
> +DEFINE_QNODE(qhs_sdc2, SM8150_SLAVE_SDCC_2, 1, 4);
> +DEFINE_QNODE(qhs_sdc4, SM8150_SLAVE_SDCC_4, 1, 4);
> +DEFINE_QNODE(qhs_snoc_cfg, SM8150_SLAVE_SNOC_CFG, 1, 4,
> SM8150_MASTER_SNOC_CFG);
> +DEFINE_QNODE(qhs_spdm, SM8150_SLAVE_SPDM_WRAPPER, 1, 4);
> +DEFINE_QNODE(qhs_spss_cfg, SM8150_SLAVE_SPSS_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ssc_cfg, SM8150_SLAVE_SSC_CFG, 1, 4);
> +DEFINE_QNODE(qhs_tcsr, SM8150_SLAVE_TCSR, 1, 4);
> +DEFINE_QNODE(qhs_tlmm_east, SM8150_SLAVE_TLMM_EAST, 1, 4);
> +DEFINE_QNODE(qhs_tlmm_north, SM8150_SLAVE_TLMM_NORTH, 1, 4);
> +DEFINE_QNODE(qhs_tlmm_south, SM8150_SLAVE_TLMM_SOUTH, 1, 4);
> +DEFINE_QNODE(qhs_tlmm_west, SM8150_SLAVE_TLMM_WEST, 1, 4);
> +DEFINE_QNODE(qhs_tsif, SM8150_SLAVE_TSIF, 1, 4);
> +DEFINE_QNODE(qhs_ufs_card_cfg, SM8150_SLAVE_UFS_CARD_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ufs_mem_cfg, SM8150_SLAVE_UFS_MEM_CFG, 1, 4);
> +DEFINE_QNODE(qhs_usb3_0, SM8150_SLAVE_USB3, 1, 4);
> +DEFINE_QNODE(qhs_usb3_1, SM8150_SLAVE_USB3_1, 1, 4);
> +DEFINE_QNODE(qhs_venus_cfg, SM8150_SLAVE_VENUS_CFG, 1, 4);
> +DEFINE_QNODE(qhs_vsense_ctrl_cfg, SM8150_SLAVE_VSENSE_CTRL_CFG, 1, 4);
> +DEFINE_QNODE(qns_cnoc_a2noc, SM8150_SLAVE_CNOC_A2NOC, 1, 8,
> SM8150_MASTER_CNOC_A2NOC);
> +DEFINE_QNODE(srvc_cnoc, SM8150_SLAVE_SERVICE_CNOC, 1, 4);
> +DEFINE_QNODE(qhs_llcc, SM8150_SLAVE_LLCC_CFG, 1, 4);
> +DEFINE_QNODE(qhs_memnoc, SM8150_SLAVE_GEM_NOC_CFG, 1, 4,
> SM8150_MASTER_GEM_NOC_CFG);
> +DEFINE_QNODE(qhs_mdsp_ms_mpu_cfg, SM8150_SLAVE_MSS_PROC_MS_MPU_CFG, 1, 
> 4);
> +DEFINE_QNODE(qns_ecc, SM8150_SLAVE_ECC, 1, 32);
> +DEFINE_QNODE(qns_gem_noc_snoc, SM8150_SLAVE_GEM_NOC_SNOC, 1, 8,
> SM8150_MASTER_GEM_NOC_SNOC);
> +DEFINE_QNODE(qns_llcc, SM8150_SLAVE_LLCC, 4, 16, SM8150_MASTER_LLCC);
> +DEFINE_QNODE(srvc_gemnoc, SM8150_SLAVE_SERVICE_GEM_NOC, 1, 4);
> +DEFINE_QNODE(ipa_core_slave, SM8150_SLAVE_IPA_CORE, 1, 8);
> +DEFINE_QNODE(ebi, SM8150_SLAVE_EBI_CH0, 4, 4);
> +DEFINE_QNODE(qns2_mem_noc, SM8150_SLAVE_MNOC_SF_MEM_NOC, 1, 32,
> SM8150_MASTER_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qns_mem_noc_hf, SM8150_SLAVE_MNOC_HF_MEM_NOC, 2, 32,
> SM8150_MASTER_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(srvc_mnoc, SM8150_SLAVE_SERVICE_MNOC, 1, 4);
> +DEFINE_QNODE(qhs_apss, SM8150_SLAVE_APPSS, 1, 8);
> +DEFINE_QNODE(qns_cnoc, SM8150_SNOC_CNOC_SLV, 1, 8, 
> SM8150_SNOC_CNOC_MAS);
> +DEFINE_QNODE(qns_gemnoc_gc, SM8150_SLAVE_SNOC_GEM_NOC_GC, 1, 8,
> SM8150_MASTER_SNOC_GC_MEM_NOC);
> +DEFINE_QNODE(qns_gemnoc_sf, SM8150_SLAVE_SNOC_GEM_NOC_SF, 1, 16,
> SM8150_MASTER_SNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qxs_imem, SM8150_SLAVE_OCIMEM, 1, 8);
> +DEFINE_QNODE(qxs_pimem, SM8150_SLAVE_PIMEM, 1, 8);
> +DEFINE_QNODE(srvc_snoc, SM8150_SLAVE_SERVICE_SNOC, 1, 4);
> +DEFINE_QNODE(xs_pcie_0, SM8150_SLAVE_PCIE_0, 1, 8);
> +DEFINE_QNODE(xs_pcie_1, SM8150_SLAVE_PCIE_1, 1, 8);
> +DEFINE_QNODE(xs_qdss_stm, SM8150_SLAVE_QDSS_STM, 1, 4);
> +DEFINE_QNODE(xs_sys_tcu_cfg, SM8150_SLAVE_TCU, 1, 8);
> +

You can keepalive enabled for SH0,
MC0, MM0, SN0 and CN0.

> +DEFINE_QBCM(bcm_acv, "ACV", false, &ebi);
> +DEFINE_QBCM(bcm_alc, "ALC", false, &alc);
> +DEFINE_QBCM(bcm_mc0, "MC0", false, &ebi);
> +DEFINE_QBCM(bcm_sh0, "SH0", false, &qns_llcc);
> +DEFINE_QBCM(bcm_mm0, "MM0", false, &qns_mem_noc_hf);
> +DEFINE_QBCM(bcm_mm1, "MM1", false, &qxm_camnoc_hf0_uncomp,
> &qxm_camnoc_hf1_uncomp, &qxm_camnoc_sf_uncomp, &qxm_camnoc_hf0,
> &qxm_camnoc_hf1, &qxm_mdp0, &qxm_mdp1);
> +DEFINE_QBCM(bcm_sh2, "SH2", false, &qns_gem_noc_snoc);
> +DEFINE_QBCM(bcm_mm2, "MM2", false, &qxm_camnoc_sf, &qns2_mem_noc);
> +DEFINE_QBCM(bcm_sh3, "SH3", false, &acm_gpu_tcu, &acm_sys_tcu);
> +DEFINE_QBCM(bcm_mm3, "MM3", false, &qxm_rot, &qxm_venus0,
> &qxm_venus1, &qxm_venus_arm9);
> +DEFINE_QBCM(bcm_sh4, "SH4", false, &qnm_cmpnoc);
> +DEFINE_QBCM(bcm_sh5, "SH5", false, &acm_apps);
> +DEFINE_QBCM(bcm_sn0, "SN0", false, &qns_gemnoc_sf);
> +DEFINE_QBCM(bcm_co0, "CO0", false, &qns_cdsp_mem_noc);
> +DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto);
> +DEFINE_QBCM(bcm_sn1, "SN1", false, &qxs_imem);
> +DEFINE_QBCM(bcm_co1, "CO1", false, &qnm_npu);
> +DEFINE_QBCM(bcm_ip0, "IP0", false, &ipa_core_slave);
> +DEFINE_QBCM(bcm_cn0, "CN0", false, &qhm_spdm, &qnm_snoc,
> &qhs_a1_noc_cfg, &qhs_a2_noc_cfg, &qhs_ahb2phy_south, &qhs_aop,
> &qhs_aoss, &qhs_camera_cfg, &qhs_clk_ctl, &qhs_compute_dsp,
> &qhs_cpr_cx, &qhs_cpr_mmcx, &qhs_cpr_mx, &qhs_crypto0_cfg,
> &qhs_ddrss_cfg, &qhs_display_cfg, &qhs_emac_cfg, &qhs_glm,
> &qhs_gpuss_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_mnoc_cfg, &qhs_npu_cfg,
> &qhs_pcie0_cfg, &qhs_pcie1_cfg, &qhs_phy_refgen_north, &qhs_pimem_cfg,
> &qhs_prng, &qhs_qdss_cfg, &qhs_qspi, &qhs_qupv3_east,
> &qhs_qupv3_north, &qhs_qupv3_south, &qhs_sdc2, &qhs_sdc4,
> &qhs_snoc_cfg, &qhs_spdm, &qhs_spss_cfg, &qhs_ssc_cfg, &qhs_tcsr,
> &qhs_tlmm_east, &qhs_tlmm_north, &qhs_tlmm_south, &qhs_tlmm_west,
> &qhs_tsif, &qhs_ufs_card_cfg, &qhs_ufs_mem_cfg, &qhs_usb3_0,
> &qhs_usb3_1, &qhs_venus_cfg, &qhs_vsense_ctrl_cfg, &qns_cnoc_a2noc,
> &srvc_cnoc);
> +DEFINE_QBCM(bcm_qup0, "QUP0", false, &qhm_qup0, &qhm_qup1, &qhm_qup2);
> +DEFINE_QBCM(bcm_sn2, "SN2", false, &qns_gemnoc_gc);
> +DEFINE_QBCM(bcm_sn3, "SN3", false, &srvc_aggre1_noc,
> &srvc_aggre2_noc, &qns_cnoc);
> +DEFINE_QBCM(bcm_sn4, "SN4", false, &qxs_pimem);
> +DEFINE_QBCM(bcm_sn5, "SN5", false, &xs_qdss_stm);
> +DEFINE_QBCM(bcm_sn8, "SN8", false, &xs_pcie_0, &xs_pcie_1);
> +DEFINE_QBCM(bcm_sn9, "SN9", false, &qnm_aggre1_noc);
> +DEFINE_QBCM(bcm_sn11, "SN11", false, &qnm_aggre2_noc);
> +DEFINE_QBCM(bcm_sn12, "SN12", false, &qxm_pimem, &xm_gic);
> +DEFINE_QBCM(bcm_sn14, "SN14", false, &qns_pcie_mem_noc);
> +DEFINE_QBCM(bcm_sn15, "SN15", false, &qnm_gemnoc);
> +
> +static struct qcom_icc_bcm *aggre1_noc_bcms[] = {
> +	&bcm_qup0,
> +	&bcm_sn3,
> +};
> +
> +static struct qcom_icc_node *aggre1_noc_nodes[] = {
> +	[MASTER_A1NOC_CFG] = &qhm_a1noc_cfg,
> +	[MASTER_QUP_0] = &qhm_qup0,
> +	[MASTER_EMAC] = &xm_emac,
> +	[MASTER_UFS_MEM] = &xm_ufs_mem,
> +	[MASTER_USB3] = &xm_usb3_0,
> +	[MASTER_USB3_1] = &xm_usb3_1,
> +	[A1NOC_SNOC_SLV] = &qns_a1noc_snoc,
> +	[SLAVE_SERVICE_A1NOC] = &srvc_aggre1_noc,
> +};
> +
> +static struct qcom_icc_desc sm8150_aggre1_noc = {
> +	.nodes = aggre1_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(aggre1_noc_nodes),
> +	.bcms = aggre1_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(aggre1_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *aggre2_noc_bcms[] = {
> +	&bcm_ce0,
> +	&bcm_qup0,
> +	&bcm_sn14,
> +	&bcm_sn3,
> +};
> +
> +static struct qcom_icc_node *aggre2_noc_nodes[] = {
> +	[MASTER_A2NOC_CFG] = &qhm_a2noc_cfg,
> +	[MASTER_QDSS_BAM] = &qhm_qdss_bam,
> +	[MASTER_QSPI] = &qhm_qspi,
> +	[MASTER_QUP_1] = &qhm_qup1,
> +	[MASTER_QUP_2] = &qhm_qup2,
> +	[MASTER_SENSORS_AHB] = &qhm_sensorss_ahb,
> +	[MASTER_TSIF] = &qhm_tsif,
> +	[MASTER_CNOC_A2NOC] = &qnm_cnoc,
> +	[MASTER_CRYPTO_CORE_0] = &qxm_crypto,
> +	[MASTER_IPA] = &qxm_ipa,
> +	[MASTER_PCIE] = &xm_pcie3_0,
> +	[MASTER_PCIE_1] = &xm_pcie3_1,
> +	[MASTER_QDSS_ETR] = &xm_qdss_etr,
> +	[MASTER_SDCC_2] = &xm_sdc2,
> +	[MASTER_SDCC_4] = &xm_sdc4,
> +	[A2NOC_SNOC_SLV] = &qns_a2noc_snoc,
> +	[SLAVE_ANOC_PCIE_GEM_NOC] = &qns_pcie_mem_noc,
> +	[SLAVE_SERVICE_A2NOC] = &srvc_aggre2_noc,
> +};
> +
> +static struct qcom_icc_desc sm8150_aggre2_noc = {
> +	.nodes = aggre2_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(aggre2_noc_nodes),
> +	.bcms = aggre2_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(aggre2_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *camnoc_virt_bcms[] = {
> +	&bcm_mm1,
> +};
> +
> +static struct qcom_icc_node *camnoc_virt_nodes[] = {
> +	[MASTER_CAMNOC_HF0_UNCOMP] = &qxm_camnoc_hf0_uncomp,
> +	[MASTER_CAMNOC_HF1_UNCOMP] = &qxm_camnoc_hf1_uncomp,
> +	[MASTER_CAMNOC_SF_UNCOMP] = &qxm_camnoc_sf_uncomp,
> +	[SLAVE_CAMNOC_UNCOMP] = &qns_camnoc_uncomp,
> +};
> +
> +static struct qcom_icc_desc sm8150_camnoc_virt = {
> +	.nodes = camnoc_virt_nodes,
> +	.num_nodes = ARRAY_SIZE(camnoc_virt_nodes),
> +	.bcms = camnoc_virt_bcms,
> +	.num_bcms = ARRAY_SIZE(camnoc_virt_bcms),
> +};
> +
> +static struct qcom_icc_bcm *compute_noc_bcms[] = {
> +	&bcm_co0,
> +	&bcm_co1,
> +};
> +
> +static struct qcom_icc_node *compute_noc_nodes[] = {
> +	[MASTER_NPU] = &qnm_npu,
> +	[SLAVE_CDSP_MEM_NOC] = &qns_cdsp_mem_noc,
> +};
> +
> +static struct qcom_icc_desc sm8150_compute_noc = {
> +	.nodes = compute_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(compute_noc_nodes),
> +	.bcms = compute_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(compute_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *config_noc_bcms[] = {
> +	&bcm_cn0,
> +};
> +
> +static struct qcom_icc_node *config_noc_nodes[] = {
> +	[MASTER_SPDM] = &qhm_spdm,
> +	[SNOC_CNOC_MAS] = &qnm_snoc,
> +	[MASTER_QDSS_DAP] = &xm_qdss_dap,
> +	[SLAVE_A1NOC_CFG] = &qhs_a1_noc_cfg,
> +	[SLAVE_A2NOC_CFG] = &qhs_a2_noc_cfg,
> +	[SLAVE_AHB2PHY_SOUTH] = &qhs_ahb2phy_south,
> +	[SLAVE_AOP] = &qhs_aop,
> +	[SLAVE_AOSS] = &qhs_aoss,
> +	[SLAVE_CAMERA_CFG] = &qhs_camera_cfg,
> +	[SLAVE_CLK_CTL] = &qhs_clk_ctl,
> +	[SLAVE_CDSP_CFG] = &qhs_compute_dsp,
> +	[SLAVE_RBCPR_CX_CFG] = &qhs_cpr_cx,
> +	[SLAVE_RBCPR_MMCX_CFG] = &qhs_cpr_mmcx,
> +	[SLAVE_RBCPR_MX_CFG] = &qhs_cpr_mx,
> +	[SLAVE_CRYPTO_0_CFG] = &qhs_crypto0_cfg,
> +	[SLAVE_CNOC_DDRSS] = &qhs_ddrss_cfg,
> +	[SLAVE_DISPLAY_CFG] = &qhs_display_cfg,
> +	[SLAVE_EMAC_CFG] = &qhs_emac_cfg,
> +	[SLAVE_GLM] = &qhs_glm,
> +	[SLAVE_GRAPHICS_3D_CFG] = &qhs_gpuss_cfg,
> +	[SLAVE_IMEM_CFG] = &qhs_imem_cfg,
> +	[SLAVE_IPA_CFG] = &qhs_ipa,
> +	[SLAVE_CNOC_MNOC_CFG] = &qhs_mnoc_cfg,
> +	[SLAVE_NPU_CFG] = &qhs_npu_cfg,
> +	[SLAVE_PCIE_0_CFG] = &qhs_pcie0_cfg,
> +	[SLAVE_PCIE_1_CFG] = &qhs_pcie1_cfg,
> +	[SLAVE_NORTH_PHY_CFG] = &qhs_phy_refgen_north,
> +	[SLAVE_PIMEM_CFG] = &qhs_pimem_cfg,
> +	[SLAVE_PRNG] = &qhs_prng,
> +	[SLAVE_QDSS_CFG] = &qhs_qdss_cfg,
> +	[SLAVE_QSPI] = &qhs_qspi,
> +	[SLAVE_QUP_2] = &qhs_qupv3_east,
> +	[SLAVE_QUP_1] = &qhs_qupv3_north,
> +	[SLAVE_QUP_0] = &qhs_qupv3_south,
> +	[SLAVE_SDCC_2] = &qhs_sdc2,
> +	[SLAVE_SDCC_4] = &qhs_sdc4,
> +	[SLAVE_SNOC_CFG] = &qhs_snoc_cfg,
> +	[SLAVE_SPDM_WRAPPER] = &qhs_spdm,
> +	[SLAVE_SPSS_CFG] = &qhs_spss_cfg,
> +	[SLAVE_SSC_CFG] = &qhs_ssc_cfg,
> +	[SLAVE_TCSR] = &qhs_tcsr,
> +	[SLAVE_TLMM_EAST] = &qhs_tlmm_east,
> +	[SLAVE_TLMM_NORTH] = &qhs_tlmm_north,
> +	[SLAVE_TLMM_SOUTH] = &qhs_tlmm_south,
> +	[SLAVE_TLMM_WEST] = &qhs_tlmm_west,
> +	[SLAVE_TSIF] = &qhs_tsif,
> +	[SLAVE_UFS_CARD_CFG] = &qhs_ufs_card_cfg,
> +	[SLAVE_UFS_MEM_CFG] = &qhs_ufs_mem_cfg,
> +	[SLAVE_USB3] = &qhs_usb3_0,
> +	[SLAVE_USB3_1] = &qhs_usb3_1,
> +	[SLAVE_VENUS_CFG] = &qhs_venus_cfg,
> +	[SLAVE_VSENSE_CTRL_CFG] = &qhs_vsense_ctrl_cfg,
> +	[SLAVE_CNOC_A2NOC] = &qns_cnoc_a2noc,
> +	[SLAVE_SERVICE_CNOC] = &srvc_cnoc,
> +};
> +
> +static struct qcom_icc_desc sm8150_config_noc = {
> +	.nodes = config_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(config_noc_nodes),
> +	.bcms = config_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(config_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *dc_noc_bcms[] = {
> +};
> +
> +static struct qcom_icc_node *dc_noc_nodes[] = {
> +	[MASTER_CNOC_DC_NOC] = &qhm_cnoc_dc_noc,
> +	[SLAVE_LLCC_CFG] = &qhs_llcc,
> +	[SLAVE_GEM_NOC_CFG] = &qhs_memnoc,
> +};
> +
> +static struct qcom_icc_desc sm8150_dc_noc = {
> +	.nodes = dc_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(dc_noc_nodes),
> +	.bcms = dc_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(dc_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *gem_noc_bcms[] = {
> +	&bcm_sh0,
> +	&bcm_sh2,
> +	&bcm_sh3,
> +	&bcm_sh4,
> +	&bcm_sh5,
> +};
> +
> +static struct qcom_icc_node *gem_noc_nodes[] = {
> +	[MASTER_AMPSS_M0] = &acm_apps,
> +	[MASTER_GPU_TCU] = &acm_gpu_tcu,
> +	[MASTER_SYS_TCU] = &acm_sys_tcu,
> +	[MASTER_GEM_NOC_CFG] = &qhm_gemnoc_cfg,
> +	[MASTER_COMPUTE_NOC] = &qnm_cmpnoc,
> +	[MASTER_GRAPHICS_3D] = &qnm_gpu,
> +	[MASTER_MNOC_HF_MEM_NOC] = &qnm_mnoc_hf,
> +	[MASTER_MNOC_SF_MEM_NOC] = &qnm_mnoc_sf,
> +	[MASTER_GEM_NOC_PCIE_SNOC] = &qnm_pcie,
> +	[MASTER_SNOC_GC_MEM_NOC] = &qnm_snoc_gc,
> +	[MASTER_SNOC_SF_MEM_NOC] = &qnm_snoc_sf,
> +	[MASTER_ECC] = &qxm_ecc,
> +	[SLAVE_MSS_PROC_MS_MPU_CFG] = &qhs_mdsp_ms_mpu_cfg,
> +	[SLAVE_ECC] = &qns_ecc,
> +	[SLAVE_GEM_NOC_SNOC] = &qns_gem_noc_snoc,
> +	[SLAVE_LLCC] = &qns_llcc,
> +	[SLAVE_SERVICE_GEM_NOC] = &srvc_gemnoc,
> +};
> +
> +static struct qcom_icc_desc sm8150_gem_noc = {
> +	.nodes = gem_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(gem_noc_nodes),
> +	.bcms = gem_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(gem_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *ipa_virt_bcms[] = {
> +	&bcm_ip0,
> +};
> +
> +static struct qcom_icc_node *ipa_virt_nodes[] = {
> +	[MASTER_IPA_CORE] = &ipa_core_master,
> +	[SLAVE_IPA_CORE] = &ipa_core_slave,
> +};
> +
> +static struct qcom_icc_desc sm8150_ipa_virt = {
> +	.nodes = ipa_virt_nodes,
> +	.num_nodes = ARRAY_SIZE(ipa_virt_nodes),
> +	.bcms = ipa_virt_bcms,
> +	.num_bcms = ARRAY_SIZE(ipa_virt_bcms),
> +};
> +
> +static struct qcom_icc_bcm *mc_virt_bcms[] = {
> +	&bcm_acv,
> +	&bcm_alc,
> +	&bcm_mc0,
> +};
> +
> +static struct qcom_icc_node *mc_virt_nodes[] = {
> +	[MASTER_LLCC] = &llcc_mc,
> +	[MASTER_ALC] = &alc,
> +	[SLAVE_EBI_CH0] = &ebi,
> +};
> +
> +static struct qcom_icc_desc sm8150_mc_virt = {
> +	.nodes = mc_virt_nodes,
> +	.num_nodes = ARRAY_SIZE(mc_virt_nodes),
> +	.bcms = mc_virt_bcms,
> +	.num_bcms = ARRAY_SIZE(mc_virt_bcms),
> +};
> +
> +static struct qcom_icc_bcm *mmss_noc_bcms[] = {
> +	&bcm_mm0,
> +	&bcm_mm1,
> +	&bcm_mm2,
> +	&bcm_mm3,
> +};
> +
> +static struct qcom_icc_node *mmss_noc_nodes[] = {
> +	[MASTER_CNOC_MNOC_CFG] = &qhm_mnoc_cfg,
> +	[MASTER_CAMNOC_HF0] = &qxm_camnoc_hf0,
> +	[MASTER_CAMNOC_HF1] = &qxm_camnoc_hf1,
> +	[MASTER_CAMNOC_SF] = &qxm_camnoc_sf,
> +	[MASTER_MDP_PORT0] = &qxm_mdp0,
> +	[MASTER_MDP_PORT1] = &qxm_mdp1,
> +	[MASTER_ROTATOR] = &qxm_rot,
> +	[MASTER_VIDEO_P0] = &qxm_venus0,
> +	[MASTER_VIDEO_P1] = &qxm_venus1,
> +	[MASTER_VIDEO_PROC] = &qxm_venus_arm9,
> +	[SLAVE_MNOC_SF_MEM_NOC] = &qns2_mem_noc,
> +	[SLAVE_MNOC_HF_MEM_NOC] = &qns_mem_noc_hf,
> +	[SLAVE_SERVICE_MNOC] = &srvc_mnoc,
> +};
> +
> +static struct qcom_icc_desc sm8150_mmss_noc = {
> +	.nodes = mmss_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(mmss_noc_nodes),
> +	.bcms = mmss_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(mmss_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *system_noc_bcms[] = {
> +	&bcm_sn0,
> +	&bcm_sn1,
> +	&bcm_sn11,
> +	&bcm_sn12,
> +	&bcm_sn15,
> +	&bcm_sn2,
> +	&bcm_sn3,
> +	&bcm_sn4,
> +	&bcm_sn5,
> +	&bcm_sn8,
> +	&bcm_sn9,
> +};
> +
> +static struct qcom_icc_node *system_noc_nodes[] = {
> +	[MASTER_SNOC_CFG] = &qhm_snoc_cfg,
> +	[A1NOC_SNOC_MAS] = &qnm_aggre1_noc,
> +	[A2NOC_SNOC_MAS] = &qnm_aggre2_noc,
> +	[MASTER_GEM_NOC_SNOC] = &qnm_gemnoc,
> +	[MASTER_PIMEM] = &qxm_pimem,
> +	[MASTER_GIC] = &xm_gic,
> +	[SLAVE_APPSS] = &qhs_apss,
> +	[SNOC_CNOC_SLV] = &qns_cnoc,
> +	[SLAVE_SNOC_GEM_NOC_GC] = &qns_gemnoc_gc,
> +	[SLAVE_SNOC_GEM_NOC_SF] = &qns_gemnoc_sf,
> +	[SLAVE_OCIMEM] = &qxs_imem,
> +	[SLAVE_PIMEM] = &qxs_pimem,
> +	[SLAVE_SERVICE_SNOC] = &srvc_snoc,
> +	[SLAVE_PCIE_0] = &xs_pcie_0,
> +	[SLAVE_PCIE_1] = &xs_pcie_1,
> +	[SLAVE_QDSS_STM] = &xs_qdss_stm,
> +	[SLAVE_TCU] = &xs_sys_tcu_cfg,
> +};
> +
> +static struct qcom_icc_desc sm8150_system_noc = {
> +	.nodes = system_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(system_noc_nodes),
> +	.bcms = system_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(system_noc_bcms),
> +};
> +
> +static int qnoc_probe(struct platform_device *pdev)
> +{
> +	const struct qcom_icc_desc *desc;
> +	struct icc_onecell_data *data;
> +	struct icc_provider *provider;
> +	struct qcom_icc_node **qnodes;
> +	struct qcom_icc_provider *qp;
> +	struct icc_node *node;
> +	size_t num_nodes, i;
> +	int ret;
> +
> +	desc = device_get_match_data(&pdev->dev);
> +	if (!desc)
> +		return -EINVAL;
> +
> +	qnodes = desc->nodes;
> +	num_nodes = desc->num_nodes;
> +
> +	qp = devm_kzalloc(&pdev->dev, sizeof(*qp), GFP_KERNEL);
> +	if (!qp)
> +		return -ENOMEM;
> +
> +	data = devm_kcalloc(&pdev->dev, num_nodes, sizeof(*node), 
> GFP_KERNEL);
> +	if (!data)
> +		return -ENOMEM;
> +
> +	provider = &qp->provider;
> +	provider->dev = &pdev->dev;
> +	provider->set = qcom_icc_set;
> +	provider->pre_aggregate = qcom_icc_pre_aggregate;
> +	provider->aggregate = qcom_icc_aggregate;
> +	provider->xlate = of_icc_xlate_onecell;
> +	INIT_LIST_HEAD(&provider->nodes);
> +	provider->data = data;
> +
> +	qp->dev = &pdev->dev;
> +	qp->bcms = desc->bcms;
> +	qp->num_bcms = desc->num_bcms;
> +
> +	qp->voter = of_bcm_voter_get(qp->dev, NULL);
> +	if (IS_ERR(qp->voter))
> +		return PTR_ERR(qp->voter);
> +
> +	ret = icc_provider_add(provider);
> +	if (ret) {
> +		dev_err(&pdev->dev, "error adding interconnect provider\n");
> +		return ret;
> +	}
> +
> +	for (i = 0; i < num_nodes; i++) {
> +		size_t j;
> +
> +		if (!qnodes[i])
> +			continue;
> +
> +		node = icc_node_create(qnodes[i]->id);
> +		if (IS_ERR(node)) {
> +			ret = PTR_ERR(node);
> +			goto err;
> +		}
> +
> +		node->name = qnodes[i]->name;
> +		node->data = qnodes[i];
> +		icc_node_add(node, provider);
> +
> +		for (j = 0; j < qnodes[i]->num_links; j++)
> +			icc_link_create(node, qnodes[i]->links[j]);
> +
> +		data->nodes[i] = node;
> +	}
> +	data->num_nodes = num_nodes;
> +
> +	for (i = 0; i < qp->num_bcms; i++)
> +		qcom_icc_bcm_init(qp->bcms[i], &pdev->dev);
> +
> +	platform_set_drvdata(pdev, qp);
> +
> +	return 0;
> +err:
> +	icc_nodes_remove(provider);
> +	icc_provider_del(provider);
> +	return ret;
> +}
> +
> +static int qnoc_remove(struct platform_device *pdev)
> +{
> +	struct qcom_icc_provider *qp = platform_get_drvdata(pdev);
> +
> +	icc_nodes_remove(&qp->provider);
> +	return icc_provider_del(&qp->provider);
> +}
> +
> +static const struct of_device_id qnoc_of_match[] = {
> +	{ .compatible = "qcom,sm8150-aggre1-noc",
> +	  .data = &sm8150_aggre1_noc},
> +	{ .compatible = "qcom,sm8150-aggre2-noc",
> +	  .data = &sm8150_aggre2_noc},
> +	{ .compatible = "qcom,sm8150-camnoc-virt",
> +	  .data = &sm8150_camnoc_virt},
> +	{ .compatible = "qcom,sm8150-compute-noc",
> +	  .data = &sm8150_compute_noc},
> +	{ .compatible = "qcom,sm8150-config-noc",
> +	  .data = &sm8150_config_noc},
> +	{ .compatible = "qcom,sm8150-dc-noc",
> +	  .data = &sm8150_dc_noc},
> +	{ .compatible = "qcom,sm8150-gem-noc",
> +	  .data = &sm8150_gem_noc},
> +	{ .compatible = "qcom,sm8150-ipa-virt",
> +	  .data = &sm8150_ipa_virt},
> +	{ .compatible = "qcom,sm8150-mc-virt",
> +	  .data = &sm8150_mc_virt},
> +	{ .compatible = "qcom,sm8150-mmss-noc",
> +	  .data = &sm8150_mmss_noc},
> +	{ .compatible = "qcom,sm8150-system-noc",
> +	  .data = &sm8150_system_noc},
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(of, qnoc_of_match);
> +
> +static struct platform_driver qnoc_driver = {
> +	.probe = qnoc_probe,
> +	.remove = qnoc_remove,
> +	.driver = {
> +		.name = "qnoc-sm8150",
> +		.of_match_table = qnoc_of_match,
> +	},
> +};
> +module_platform_driver(qnoc_driver);
> +
> +MODULE_DESCRIPTION("Qualcomm SM8150 NoC driver");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/interconnect/qcom/sm8150.h
> b/drivers/interconnect/qcom/sm8150.h
> new file mode 100644
> index 000000000000..3a42b4b6ad12
> --- /dev/null
> +++ b/drivers/interconnect/qcom/sm8150.h
> @@ -0,0 +1,153 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Qualcomm #define SM8250 interconnect IDs
> + *
> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> + */
> +
> +#ifndef __DRIVERS_INTERCONNECT_QCOM_SM8150_H
> +#define __DRIVERS_INTERCONNECT_QCOM_SM8150_H
> +
> +#define SM8150_A1NOC_SNOC_MAS			0
> +#define SM8150_A1NOC_SNOC_SLV			1
> +#define SM8150_A2NOC_SNOC_MAS			2
> +#define SM8150_A2NOC_SNOC_SLV			3
> +#define SM8150_MASTER_A1NOC_CFG			4
> +#define SM8150_MASTER_A2NOC_CFG			5
> +#define SM8150_MASTER_ALC			6
> +#define SM8150_MASTER_AMPSS_M0			7
> +#define SM8150_MASTER_CAMNOC_HF0		8
> +#define SM8150_MASTER_CAMNOC_HF0_UNCOMP		9
> +#define SM8150_MASTER_CAMNOC_HF1		10
> +#define SM8150_MASTER_CAMNOC_HF1_UNCOMP		11
> +#define SM8150_MASTER_CAMNOC_SF			12
> +#define SM8150_MASTER_CAMNOC_SF_UNCOMP		13
> +#define SM8150_MASTER_CNOC_A2NOC		14
> +#define SM8150_MASTER_CNOC_DC_NOC		15
> +#define SM8150_MASTER_CNOC_MNOC_CFG		16
> +#define SM8150_MASTER_COMPUTE_NOC		17
> +#define SM8150_MASTER_CRYPTO_CORE_0		18
> +#define SM8150_MASTER_ECC			19
> +#define SM8150_MASTER_EMAC			20
> +#define SM8150_MASTER_GEM_NOC_CFG		21
> +#define SM8150_MASTER_GEM_NOC_PCIE_SNOC		22
> +#define SM8150_MASTER_GEM_NOC_SNOC		23
> +#define SM8150_MASTER_GIC			24
> +#define SM8150_MASTER_GPU_TCU			25
> +#define SM8150_MASTER_GRAPHICS_3D		26
> +#define SM8150_MASTER_IPA			27
> +#define SM8150_MASTER_IPA_CORE			28
> +#define SM8150_MASTER_LLCC			29
> +#define SM8150_MASTER_MDP_PORT0			30
> +#define SM8150_MASTER_MDP_PORT1			31
> +#define SM8150_MASTER_MNOC_HF_MEM_NOC		32
> +#define SM8150_MASTER_MNOC_SF_MEM_NOC		33
> +#define SM8150_MASTER_NPU			34
> +#define SM8150_MASTER_PCIE			35
> +#define SM8150_MASTER_PCIE_1			36
> +#define SM8150_MASTER_PIMEM			37
> +#define SM8150_MASTER_QDSS_BAM			38
> +#define SM8150_MASTER_QDSS_DAP			39
> +#define SM8150_MASTER_QDSS_ETR			40
> +#define SM8150_MASTER_QSPI			41
> +#define SM8150_MASTER_QUP_0			42
> +#define SM8150_MASTER_QUP_1			43
> +#define SM8150_MASTER_QUP_2			44
> +#define SM8150_MASTER_ROTATOR			45
> +#define SM8150_MASTER_SDCC_2			46
> +#define SM8150_MASTER_SDCC_4			47
> +#define SM8150_MASTER_SENSORS_AHB		48
> +#define SM8150_MASTER_SNOC_CFG			49
> +#define SM8150_MASTER_SNOC_GC_MEM_NOC		50
> +#define SM8150_MASTER_SNOC_SF_MEM_NOC		51
> +#define SM8150_MASTER_SPDM			52
> +#define SM8150_MASTER_SYS_TCU			53
> +#define SM8150_MASTER_TSIF			54
> +#define SM8150_MASTER_UFS_MEM			55
> +#define SM8150_MASTER_USB3			56
> +#define SM8150_MASTER_USB3_1			57
> +#define SM8150_MASTER_VIDEO_P0			58
> +#define SM8150_MASTER_VIDEO_P1			59
> +#define SM8150_MASTER_VIDEO_PROC		60
> +#define SM8150_SLAVE_A1NOC_CFG			61
> +#define SM8150_SLAVE_A2NOC_CFG			62
> +#define SM8150_SLAVE_AHB2PHY_SOUTH		63
> +#define SM8150_SLAVE_ANOC_PCIE_GEM_NOC		64
> +#define SM8150_SLAVE_AOP			65
> +#define SM8150_SLAVE_AOSS			66
> +#define SM8150_SLAVE_APPSS			67
> +#define SM8150_SLAVE_CAMERA_CFG			68
> +#define SM8150_SLAVE_CAMNOC_UNCOMP		69
> +#define SM8150_SLAVE_CDSP_CFG			70
> +#define SM8150_SLAVE_CDSP_MEM_NOC		71
> +#define SM8150_SLAVE_CLK_CTL			72
> +#define SM8150_SLAVE_CNOC_A2NOC			73
> +#define SM8150_SLAVE_CNOC_DDRSS			74
> +#define SM8150_SLAVE_CNOC_MNOC_CFG		75
> +#define SM8150_SLAVE_CRYPTO_0_CFG		76
> +#define SM8150_SLAVE_DISPLAY_CFG		77
> +#define SM8150_SLAVE_EBI_CH0			78
> +#define SM8150_SLAVE_ECC			79
> +#define SM8150_SLAVE_EMAC_CFG			80
> +#define SM8150_SLAVE_GEM_NOC_CFG		81
> +#define SM8150_SLAVE_GEM_NOC_SNOC		82
> +#define SM8150_SLAVE_GLM			83
> +#define SM8150_SLAVE_GRAPHICS_3D_CFG		84
> +#define SM8150_SLAVE_IMEM_CFG			85
> +#define SM8150_SLAVE_IPA_CFG			86
> +#define SM8150_SLAVE_IPA_CORE			87
> +#define SM8150_SLAVE_LLCC			88
> +#define SM8150_SLAVE_LLCC_CFG			89
> +#define SM8150_SLAVE_MNOC_HF_MEM_NOC		90
> +#define SM8150_SLAVE_MNOC_SF_MEM_NOC		91
> +#define SM8150_SLAVE_MSS_PROC_MS_MPU_CFG	92
> +#define SM8150_SLAVE_NORTH_PHY_CFG		93
> +#define SM8150_SLAVE_NPU_CFG			94
> +#define SM8150_SLAVE_OCIMEM			95
> +#define SM8150_SLAVE_PCIE_0			96
> +#define SM8150_SLAVE_PCIE_0_CFG			97
> +#define SM8150_SLAVE_PCIE_1			98
> +#define SM8150_SLAVE_PCIE_1_CFG			99
> +#define SM8150_SLAVE_PIMEM			100
> +#define SM8150_SLAVE_PIMEM_CFG			101
> +#define SM8150_SLAVE_PRNG			102
> +#define SM8150_SLAVE_QDSS_CFG			103
> +#define SM8150_SLAVE_QDSS_STM			104
> +#define SM8150_SLAVE_QSPI			105
> +#define SM8150_SLAVE_QUP_0			106
> +#define SM8150_SLAVE_QUP_1			107
> +#define SM8150_SLAVE_QUP_2			108
> +#define SM8150_SLAVE_RBCPR_CX_CFG		109
> +#define SM8150_SLAVE_RBCPR_MMCX_CFG		110
> +#define SM8150_SLAVE_RBCPR_MX_CFG		111
> +#define SM8150_SLAVE_SDCC_2			112
> +#define SM8150_SLAVE_SDCC_4			113
> +#define SM8150_SLAVE_SERVICE_A1NOC		114
> +#define SM8150_SLAVE_SERVICE_A2NOC		115
> +#define SM8150_SLAVE_SERVICE_CNOC		116
> +#define SM8150_SLAVE_SERVICE_GEM_NOC		117
> +#define SM8150_SLAVE_SERVICE_MNOC		118
> +#define SM8150_SLAVE_SERVICE_SNOC		119
> +#define SM8150_SLAVE_SNOC_CFG			120
> +#define SM8150_SLAVE_SNOC_GEM_NOC_GC		121
> +#define SM8150_SLAVE_SNOC_GEM_NOC_SF		122
> +#define SM8150_SLAVE_SPDM_WRAPPER		123
> +#define SM8150_SLAVE_SPSS_CFG			124
> +#define SM8150_SLAVE_SSC_CFG			125
> +#define SM8150_SLAVE_TCSR			126
> +#define SM8150_SLAVE_TCU			127
> +#define SM8150_SLAVE_TLMM_EAST			128
> +#define SM8150_SLAVE_TLMM_NORTH			129
> +#define SM8150_SLAVE_TLMM_SOUTH			130
> +#define SM8150_SLAVE_TLMM_WEST			131
> +#define SM8150_SLAVE_TSIF			132
> +#define SM8150_SLAVE_UFS_CARD_CFG		133
> +#define SM8150_SLAVE_UFS_MEM_CFG		134
> +#define SM8150_SLAVE_USB3			135
> +#define SM8150_SLAVE_USB3_1			136
> +#define SM8150_SLAVE_VENUS_CFG			137
> +#define SM8150_SLAVE_VSENSE_CTRL_CFG		138
> +#define SM8150_SNOC_CNOC_MAS			139
> +#define SM8150_SNOC_CNOC_SLV			140
> +
> +#endif

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* Re: [PATCH v2 5/7] interconnect: qcom: Add SM8250 interconnect provider driver
  @ 2020-07-24 14:29  6%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-24 14:29 UTC (permalink / raw)
  To: Jonathan Marek
  Cc: linux-arm-msm, Andy Gross, Bjorn Andersson, Georgi Djakov,
	linux-kernel, linux-pm, linux-kernel-owner

Hey Jonathan,
Thanks for the patch!

On 2020-07-13 21:11, Jonathan Marek wrote:
> Add driver for the Qualcomm interconnect buses found in SM8250 based
> platforms. The topology consists of several NoCs that are controlled by
> a remote processor that collects the aggregated bandwidth for each
> master-slave pairs.
> 
> Based on SC7180 driver and generated from downstream dts.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  drivers/interconnect/qcom/Kconfig  |  10 +
>  drivers/interconnect/qcom/Makefile |   2 +
>  drivers/interconnect/qcom/sm8250.c | 655 +++++++++++++++++++++++++++++
>  drivers/interconnect/qcom/sm8250.h | 163 +++++++
>  4 files changed, 830 insertions(+)
>  create mode 100644 drivers/interconnect/qcom/sm8250.c
>  create mode 100644 drivers/interconnect/qcom/sm8250.h
> 
> diff --git a/drivers/interconnect/qcom/Kconfig
> b/drivers/interconnect/qcom/Kconfig
> index 25486de5a38d..a8f93ba265f8 100644
> --- a/drivers/interconnect/qcom/Kconfig
> +++ b/drivers/interconnect/qcom/Kconfig
> @@ -75,5 +75,15 @@ config INTERCONNECT_QCOM_SM8150
>  	  This is a driver for the Qualcomm Network-on-Chip on sm8150-based
>  	  platforms.
> 
> +config INTERCONNECT_QCOM_SM8250
> +	tristate "Qualcomm SM8250 interconnect driver"
> +	depends on INTERCONNECT_QCOM
> +	depends on (QCOM_RPMH && QCOM_COMMAND_DB && OF) || COMPILE_TEST
> +	select INTERCONNECT_QCOM_RPMH
> +	select INTERCONNECT_QCOM_BCM_VOTER
> +	help
> +	  This is a driver for the Qualcomm Network-on-Chip on sm8250-based
> +	  platforms.
> +
>  config INTERCONNECT_QCOM_SMD_RPM
>  	tristate
> diff --git a/drivers/interconnect/qcom/Makefile
> b/drivers/interconnect/qcom/Makefile
> index 1702ece67dc5..cf628f7990cd 100644
> --- a/drivers/interconnect/qcom/Makefile
> +++ b/drivers/interconnect/qcom/Makefile
> @@ -9,6 +9,7 @@ icc-rpmh-obj				:= icc-rpmh.o
>  qnoc-sc7180-objs			:= sc7180.o
>  qnoc-sdm845-objs			:= sdm845.o
>  qnoc-sm8150-objs			:= sm8150.o
> +qnoc-sm8250-objs			:= sm8250.o
>  icc-smd-rpm-objs			:= smd-rpm.o
> 
>  obj-$(CONFIG_INTERCONNECT_QCOM_BCM_VOTER) += icc-bcm-voter.o
> @@ -20,4 +21,5 @@ obj-$(CONFIG_INTERCONNECT_QCOM_RPMH) += icc-rpmh.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_SC7180) += qnoc-sc7180.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_SDM845) += qnoc-sdm845.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_SM8150) += qnoc-sm8150.o
> +obj-$(CONFIG_INTERCONNECT_QCOM_SM8250) += qnoc-sm8250.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_SMD_RPM) += icc-smd-rpm.o
> diff --git a/drivers/interconnect/qcom/sm8250.c
> b/drivers/interconnect/qcom/sm8250.c
> new file mode 100644
> index 000000000000..8e63c19e01c0
> --- /dev/null
> +++ b/drivers/interconnect/qcom/sm8250.c
> @@ -0,0 +1,655 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> + *
> + */
> +
> +#include <linux/device.h>
> +#include <linux/interconnect.h>
> +#include <linux/interconnect-provider.h>
> +#include <linux/module.h>
> +#include <linux/of_platform.h>
> +#include <dt-bindings/interconnect/qcom,sm8250.h>
> +
> +#include "bcm-voter.h"
> +#include "icc-rpmh.h"
> +#include "sm8250.h"
> +
> +DEFINE_QNODE(qhm_a1noc_cfg, SM8250_MASTER_A1NOC_CFG, 1, 4,
> SM8250_SLAVE_SERVICE_A1NOC);
> +DEFINE_QNODE(qhm_qspi, SM8250_MASTER_QSPI_0, 1, 4, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_qup1, SM8250_MASTER_QUP_1, 1, 4, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_qup2, SM8250_MASTER_QUP_2, 1, 4, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_tsif, SM8250_MASTER_TSIF, 1, 4, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_pcie3_modem, SM8250_MASTER_PCIE_2, 1, 8,
> SM8250_SLAVE_ANOC_PCIE_GEM_NOC_1);
> +DEFINE_QNODE(xm_sdc4, SM8250_MASTER_SDCC_4, 1, 8, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_ufs_mem, SM8250_MASTER_UFS_MEM, 1, 8, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_usb3_0, SM8250_MASTER_USB3, 1, 8, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_usb3_1, SM8250_MASTER_USB3_1, 1, 8, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_a2noc_cfg, SM8250_MASTER_A2NOC_CFG, 1, 4,
> SM8250_SLAVE_SERVICE_A2NOC);
> +DEFINE_QNODE(qhm_qdss_bam, SM8250_MASTER_QDSS_BAM, 1, 4,
> SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_qup0, SM8250_MASTER_QUP_0, 1, 4, 
> SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qnm_cnoc, SM8250_MASTER_CNOC_A2NOC, 1, 8, 
> SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qxm_crypto, SM8250_MASTER_CRYPTO_CORE_0, 1, 8,
> SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qxm_ipa, SM8250_MASTER_IPA, 1, 8, SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_pcie3_0, SM8250_MASTER_PCIE, 1, 8,
> SM8250_SLAVE_ANOC_PCIE_GEM_NOC);
> +DEFINE_QNODE(xm_pcie3_1, SM8250_MASTER_PCIE_1, 1, 8,
> SM8250_SLAVE_ANOC_PCIE_GEM_NOC);
> +DEFINE_QNODE(xm_qdss_etr, SM8250_MASTER_QDSS_ETR, 1, 8, 
> SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_sdc2, SM8250_MASTER_SDCC_2, 1, 8, 
> SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_ufs_card, SM8250_MASTER_UFS_CARD, 1, 8, 
> SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qnm_npu, SM8250_MASTER_NPU, 2, 32, 
> SM8250_SLAVE_CDSP_MEM_NOC);
> +DEFINE_QNODE(qnm_snoc, SM8250_SNOC_CNOC_MAS, 1, 8,
> SM8250_SLAVE_CDSP_CFG, SM8250_SLAVE_CAMERA_CFG,
> SM8250_SLAVE_TLMM_SOUTH, SM8250_SLAVE_TLMM_NORTH, SM8250_SLAVE_SDCC_4,
> SM8250_SLAVE_TLMM_WEST, SM8250_SLAVE_SDCC_2,
> SM8250_SLAVE_CNOC_MNOC_CFG, SM8250_SLAVE_UFS_MEM_CFG,
> SM8250_SLAVE_SNOC_CFG, SM8250_SLAVE_PDM, SM8250_SLAVE_CX_RDPM,
> SM8250_SLAVE_PCIE_1_CFG, SM8250_SLAVE_A2NOC_CFG,
> SM8250_SLAVE_QDSS_CFG, SM8250_SLAVE_DISPLAY_CFG,
> SM8250_SLAVE_PCIE_2_CFG, SM8250_SLAVE_TCSR, SM8250_SLAVE_DCC_CFG,
> SM8250_SLAVE_CNOC_DDRSS, SM8250_SLAVE_IPC_ROUTER_CFG,
> SM8250_SLAVE_PCIE_0_CFG, SM8250_SLAVE_RBCPR_MMCX_CFG,
> SM8250_SLAVE_NPU_CFG, SM8250_SLAVE_AHB2PHY_SOUTH,
> SM8250_SLAVE_AHB2PHY_NORTH, SM8250_SLAVE_GRAPHICS_3D_CFG,
> SM8250_SLAVE_VENUS_CFG, SM8250_SLAVE_TSIF, SM8250_SLAVE_IPA_CFG,
> SM8250_SLAVE_IMEM_CFG, SM8250_SLAVE_USB3, SM8250_SLAVE_SERVICE_CNOC,
> SM8250_SLAVE_UFS_CARD_CFG, SM8250_SLAVE_USB3_1, SM8250_SLAVE_LPASS,
> SM8250_SLAVE_RBCPR_CX_CFG, SM8250_SLAVE_A1NOC_CFG, SM8250_SLAVE_AOSS,
> SM8250_SLAVE_PRNG, SM8250_SLAVE_VSENSE_CTRL_CFG, SM8250_SLAVE_QSPI_0,
> SM8250_SLAVE_CRYPTO_0_CFG, SM8250_SLAVE_PIMEM_CFG,
> SM8250_SLAVE_RBCPR_MX_CFG, SM8250_SLAVE_QUP_0, SM8250_SLAVE_QUP_1,
> SM8250_SLAVE_QUP_2, SM8250_SLAVE_CLK_CTL);
> +DEFINE_QNODE(xm_qdss_dap, SM8250_MASTER_QDSS_DAP, 1, 8,
> SM8250_SLAVE_CDSP_CFG, SM8250_SLAVE_CAMERA_CFG,
> SM8250_SLAVE_TLMM_SOUTH, SM8250_SLAVE_TLMM_NORTH, SM8250_SLAVE_SDCC_4,
> SM8250_SLAVE_TLMM_WEST, SM8250_SLAVE_SDCC_2,
> SM8250_SLAVE_CNOC_MNOC_CFG, SM8250_SLAVE_UFS_MEM_CFG,
> SM8250_SLAVE_SNOC_CFG, SM8250_SLAVE_PDM, SM8250_SLAVE_CX_RDPM,
> SM8250_SLAVE_PCIE_1_CFG, SM8250_SLAVE_A2NOC_CFG,
> SM8250_SLAVE_QDSS_CFG, SM8250_SLAVE_DISPLAY_CFG,
> SM8250_SLAVE_PCIE_2_CFG, SM8250_SLAVE_TCSR, SM8250_SLAVE_DCC_CFG,
> SM8250_SLAVE_CNOC_DDRSS, SM8250_SLAVE_IPC_ROUTER_CFG,
> SM8250_SLAVE_CNOC_A2NOC, SM8250_SLAVE_PCIE_0_CFG,
> SM8250_SLAVE_RBCPR_MMCX_CFG, SM8250_SLAVE_NPU_CFG,
> SM8250_SLAVE_AHB2PHY_SOUTH, SM8250_SLAVE_AHB2PHY_NORTH,
> SM8250_SLAVE_GRAPHICS_3D_CFG, SM8250_SLAVE_VENUS_CFG,
> SM8250_SLAVE_TSIF, SM8250_SLAVE_IPA_CFG, SM8250_SLAVE_IMEM_CFG,
> SM8250_SLAVE_USB3, SM8250_SLAVE_SERVICE_CNOC,
> SM8250_SLAVE_UFS_CARD_CFG, SM8250_SLAVE_USB3_1, SM8250_SLAVE_LPASS,
> SM8250_SLAVE_RBCPR_CX_CFG, SM8250_SLAVE_A1NOC_CFG, SM8250_SLAVE_AOSS,
> SM8250_SLAVE_PRNG, SM8250_SLAVE_VSENSE_CTRL_CFG, SM8250_SLAVE_QSPI_0,
> SM8250_SLAVE_CRYPTO_0_CFG, SM8250_SLAVE_PIMEM_CFG,
> SM8250_SLAVE_RBCPR_MX_CFG, SM8250_SLAVE_QUP_0, SM8250_SLAVE_QUP_1,
> SM8250_SLAVE_QUP_2, SM8250_SLAVE_CLK_CTL);
> +DEFINE_QNODE(qhm_cnoc_dc_noc, SM8250_MASTER_CNOC_DC_NOC, 1, 4,
> SM8250_SLAVE_GEM_NOC_CFG, SM8250_SLAVE_LLCC_CFG);
> +DEFINE_QNODE(alm_gpu_tcu, SM8250_MASTER_GPU_TCU, 1, 8,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(alm_sys_tcu, SM8250_MASTER_SYS_TCU, 1, 8,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(chm_apps, SM8250_MASTER_AMPSS_M0, 2, 32,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC,
> SM8250_SLAVE_MEM_NOC_PCIE_SNOC);
> +DEFINE_QNODE(qhm_gemnoc_cfg, SM8250_MASTER_GEM_NOC_CFG, 1, 4,
> SM8250_SLAVE_SERVICE_GEM_NOC_2, SM8250_SLAVE_SERVICE_GEM_NOC_1,
> SM8250_SLAVE_SERVICE_GEM_NOC);
> +DEFINE_QNODE(qnm_cmpnoc, SM8250_MASTER_COMPUTE_NOC, 2, 32,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_gpu, SM8250_MASTER_GRAPHICS_3D, 2, 32,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_mnoc_hf, SM8250_MASTER_MNOC_HF_MEM_NOC, 2, 32,
> SM8250_SLAVE_LLCC);
> +DEFINE_QNODE(qnm_mnoc_sf, SM8250_MASTER_MNOC_SF_MEM_NOC, 2, 32,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_pcie, SM8250_MASTER_ANOC_PCIE_GEM_NOC, 1, 16,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_snoc_gc, SM8250_MASTER_SNOC_GC_MEM_NOC, 1, 8,
> SM8250_SLAVE_LLCC);
> +DEFINE_QNODE(qnm_snoc_sf, SM8250_MASTER_SNOC_SF_MEM_NOC, 1, 16,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC,
> SM8250_SLAVE_MEM_NOC_PCIE_SNOC);
> +DEFINE_QNODE(ipa_core_master, SM8250_MASTER_IPA_CORE, 1, 8,
> SM8250_SLAVE_IPA_CORE);
> +DEFINE_QNODE(llcc_mc, SM8250_MASTER_LLCC, 4, 4, SM8250_SLAVE_EBI_CH0);
> +DEFINE_QNODE(qhm_mnoc_cfg, SM8250_MASTER_CNOC_MNOC_CFG, 1, 4,
> SM8250_SLAVE_SERVICE_MNOC);
> +DEFINE_QNODE(qnm_camnoc_hf, SM8250_MASTER_CAMNOC_HF, 2, 32,
> SM8250_SLAVE_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qnm_camnoc_icp, SM8250_MASTER_CAMNOC_ICP, 1, 8,
> SM8250_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qnm_camnoc_sf, SM8250_MASTER_CAMNOC_SF, 2, 32,
> SM8250_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qnm_video0, SM8250_MASTER_VIDEO_P0, 1, 32,
> SM8250_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qnm_video1, SM8250_MASTER_VIDEO_P1, 1, 32,
> SM8250_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qnm_video_cvp, SM8250_MASTER_VIDEO_PROC, 1, 32,
> SM8250_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qxm_mdp0, SM8250_MASTER_MDP_PORT0, 1, 32,
> SM8250_SLAVE_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qxm_mdp1, SM8250_MASTER_MDP_PORT1, 1, 32,
> SM8250_SLAVE_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qxm_rot, SM8250_MASTER_ROTATOR, 1, 32,
> SM8250_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(amm_npu_sys, SM8250_MASTER_NPU_SYS, 4, 32,
> SM8250_SLAVE_NPU_COMPUTE_NOC);
> +DEFINE_QNODE(amm_npu_sys_cdp_w, SM8250_MASTER_NPU_CDP, 2, 16,
> SM8250_SLAVE_NPU_COMPUTE_NOC);
> +DEFINE_QNODE(qhm_cfg, SM8250_MASTER_NPU_NOC_CFG, 1, 4,
> SM8250_SLAVE_SERVICE_NPU_NOC, SM8250_SLAVE_ISENSE_CFG,
> SM8250_SLAVE_NPU_LLM_CFG, SM8250_SLAVE_NPU_INT_DMA_BWMON_CFG,
> SM8250_SLAVE_NPU_CP, SM8250_SLAVE_NPU_TCM, SM8250_SLAVE_NPU_CAL_DP0,
> SM8250_SLAVE_NPU_CAL_DP1, SM8250_SLAVE_NPU_DPM);
> +DEFINE_QNODE(qhm_snoc_cfg, SM8250_MASTER_SNOC_CFG, 1, 4,
> SM8250_SLAVE_SERVICE_SNOC);
> +DEFINE_QNODE(qnm_aggre1_noc, SM8250_A1NOC_SNOC_MAS, 1, 16,
> SM8250_SLAVE_SNOC_GEM_NOC_SF);
> +DEFINE_QNODE(qnm_aggre2_noc, SM8250_A2NOC_SNOC_MAS, 1, 16,
> SM8250_SLAVE_SNOC_GEM_NOC_SF);
> +DEFINE_QNODE(qnm_gemnoc, SM8250_MASTER_GEM_NOC_SNOC, 1, 16,
> SM8250_SLAVE_PIMEM, SM8250_SLAVE_OCIMEM, SM8250_SLAVE_APPSS,
> SM8250_SNOC_CNOC_SLV, SM8250_SLAVE_TCU, SM8250_SLAVE_QDSS_STM);
> +DEFINE_QNODE(qnm_gemnoc_pcie, SM8250_MASTER_GEM_NOC_PCIE_SNOC, 1, 8,
> SM8250_SLAVE_PCIE_2, SM8250_SLAVE_PCIE_0, SM8250_SLAVE_PCIE_1);
> +DEFINE_QNODE(qxm_pimem, SM8250_MASTER_PIMEM, 1, 8,
> SM8250_SLAVE_SNOC_GEM_NOC_GC);
> +DEFINE_QNODE(xm_gic, SM8250_MASTER_GIC, 1, 8, 
> SM8250_SLAVE_SNOC_GEM_NOC_GC);
> +DEFINE_QNODE(alc, SM8250_MASTER_ALC, 1, 1);

You can safely remove the ^^ icc node
and the bcm_alc since it will not be
voted from kernel. We seem to do the
same for the SC7180 icc provider as
well.

> +DEFINE_QNODE(qns_a1noc_snoc, SM8250_A1NOC_SNOC_SLV, 1, 16,
> SM8250_A1NOC_SNOC_MAS);
> +DEFINE_QNODE(qns_pcie_modem_mem_noc,
> SM8250_SLAVE_ANOC_PCIE_GEM_NOC_1, 1, 16,
> SM8250_MASTER_ANOC_PCIE_GEM_NOC);
> +DEFINE_QNODE(srvc_aggre1_noc, SM8250_SLAVE_SERVICE_A1NOC, 1, 4);
> +DEFINE_QNODE(qns_a2noc_snoc, SM8250_A2NOC_SNOC_SLV, 1, 16,
> SM8250_A2NOC_SNOC_MAS);
> +DEFINE_QNODE(qns_pcie_mem_noc, SM8250_SLAVE_ANOC_PCIE_GEM_NOC, 1, 16,
> SM8250_MASTER_ANOC_PCIE_GEM_NOC);
> +DEFINE_QNODE(srvc_aggre2_noc, SM8250_SLAVE_SERVICE_A2NOC, 1, 4);
> +DEFINE_QNODE(qns_cdsp_mem_noc, SM8250_SLAVE_CDSP_MEM_NOC, 2, 32,
> SM8250_MASTER_COMPUTE_NOC);
> +DEFINE_QNODE(qhs_a1_noc_cfg, SM8250_SLAVE_A1NOC_CFG, 1, 4,
> SM8250_MASTER_A1NOC_CFG);
> +DEFINE_QNODE(qhs_a2_noc_cfg, SM8250_SLAVE_A2NOC_CFG, 1, 4,
> SM8250_MASTER_A2NOC_CFG);
> +DEFINE_QNODE(qhs_ahb2phy0, SM8250_SLAVE_AHB2PHY_SOUTH, 1, 4);
> +DEFINE_QNODE(qhs_ahb2phy1, SM8250_SLAVE_AHB2PHY_NORTH, 1, 4);
> +DEFINE_QNODE(qhs_aoss, SM8250_SLAVE_AOSS, 1, 4);
> +DEFINE_QNODE(qhs_camera_cfg, SM8250_SLAVE_CAMERA_CFG, 1, 4);
> +DEFINE_QNODE(qhs_clk_ctl, SM8250_SLAVE_CLK_CTL, 1, 4);
> +DEFINE_QNODE(qhs_compute_dsp, SM8250_SLAVE_CDSP_CFG, 1, 4);
> +DEFINE_QNODE(qhs_cpr_cx, SM8250_SLAVE_RBCPR_CX_CFG, 1, 4);
> +DEFINE_QNODE(qhs_cpr_mmcx, SM8250_SLAVE_RBCPR_MMCX_CFG, 1, 4);
> +DEFINE_QNODE(qhs_cpr_mx, SM8250_SLAVE_RBCPR_MX_CFG, 1, 4);
> +DEFINE_QNODE(qhs_crypto0_cfg, SM8250_SLAVE_CRYPTO_0_CFG, 1, 4);
> +DEFINE_QNODE(qhs_cx_rdpm, SM8250_SLAVE_CX_RDPM, 1, 4);
> +DEFINE_QNODE(qhs_dcc_cfg, SM8250_SLAVE_DCC_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ddrss_cfg, SM8250_SLAVE_CNOC_DDRSS, 1, 4,
> SM8250_MASTER_CNOC_DC_NOC);
> +DEFINE_QNODE(qhs_display_cfg, SM8250_SLAVE_DISPLAY_CFG, 1, 4);
> +DEFINE_QNODE(qhs_gpuss_cfg, SM8250_SLAVE_GRAPHICS_3D_CFG, 1, 8);
> +DEFINE_QNODE(qhs_imem_cfg, SM8250_SLAVE_IMEM_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ipa, SM8250_SLAVE_IPA_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ipc_router, SM8250_SLAVE_IPC_ROUTER_CFG, 1, 4);
> +DEFINE_QNODE(qhs_lpass_cfg, SM8250_SLAVE_LPASS, 1, 4);
> +DEFINE_QNODE(qhs_mnoc_cfg, SM8250_SLAVE_CNOC_MNOC_CFG, 1, 4,
> SM8250_MASTER_CNOC_MNOC_CFG);
> +DEFINE_QNODE(qhs_npu_cfg, SM8250_SLAVE_NPU_CFG, 1, 4,
> SM8250_MASTER_NPU_NOC_CFG);
> +DEFINE_QNODE(qhs_pcie0_cfg, SM8250_SLAVE_PCIE_0_CFG, 1, 4);
> +DEFINE_QNODE(qhs_pcie1_cfg, SM8250_SLAVE_PCIE_1_CFG, 1, 4);
> +DEFINE_QNODE(qhs_pcie_modem_cfg, SM8250_SLAVE_PCIE_2_CFG, 1, 4);
> +DEFINE_QNODE(qhs_pdm, SM8250_SLAVE_PDM, 1, 4);
> +DEFINE_QNODE(qhs_pimem_cfg, SM8250_SLAVE_PIMEM_CFG, 1, 4);
> +DEFINE_QNODE(qhs_prng, SM8250_SLAVE_PRNG, 1, 4);
> +DEFINE_QNODE(qhs_qdss_cfg, SM8250_SLAVE_QDSS_CFG, 1, 4);
> +DEFINE_QNODE(qhs_qspi, SM8250_SLAVE_QSPI_0, 1, 4);
> +DEFINE_QNODE(qhs_qup0, SM8250_SLAVE_QUP_0, 1, 4);
> +DEFINE_QNODE(qhs_qup1, SM8250_SLAVE_QUP_1, 1, 4);
> +DEFINE_QNODE(qhs_qup2, SM8250_SLAVE_QUP_2, 1, 4);
> +DEFINE_QNODE(qhs_sdc2, SM8250_SLAVE_SDCC_2, 1, 4);
> +DEFINE_QNODE(qhs_sdc4, SM8250_SLAVE_SDCC_4, 1, 4);
> +DEFINE_QNODE(qhs_snoc_cfg, SM8250_SLAVE_SNOC_CFG, 1, 4,
> SM8250_MASTER_SNOC_CFG);
> +DEFINE_QNODE(qhs_tcsr, SM8250_SLAVE_TCSR, 1, 4);
> +DEFINE_QNODE(qhs_tlmm0, SM8250_SLAVE_TLMM_NORTH, 1, 4);
> +DEFINE_QNODE(qhs_tlmm1, SM8250_SLAVE_TLMM_SOUTH, 1, 4);
> +DEFINE_QNODE(qhs_tlmm2, SM8250_SLAVE_TLMM_WEST, 1, 4);
> +DEFINE_QNODE(qhs_tsif, SM8250_SLAVE_TSIF, 1, 4);
> +DEFINE_QNODE(qhs_ufs_card_cfg, SM8250_SLAVE_UFS_CARD_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ufs_mem_cfg, SM8250_SLAVE_UFS_MEM_CFG, 1, 4);
> +DEFINE_QNODE(qhs_usb3_0, SM8250_SLAVE_USB3, 1, 4);
> +DEFINE_QNODE(qhs_usb3_1, SM8250_SLAVE_USB3_1, 1, 4);
> +DEFINE_QNODE(qhs_venus_cfg, SM8250_SLAVE_VENUS_CFG, 1, 4);
> +DEFINE_QNODE(qhs_vsense_ctrl_cfg, SM8250_SLAVE_VSENSE_CTRL_CFG, 1, 4);
> +DEFINE_QNODE(qns_cnoc_a2noc, SM8250_SLAVE_CNOC_A2NOC, 1, 8,
> SM8250_MASTER_CNOC_A2NOC);
> +DEFINE_QNODE(srvc_cnoc, SM8250_SLAVE_SERVICE_CNOC, 1, 4);
> +DEFINE_QNODE(qhs_llcc, SM8250_SLAVE_LLCC_CFG, 1, 4);
> +DEFINE_QNODE(qhs_memnoc, SM8250_SLAVE_GEM_NOC_CFG, 1, 4,
> SM8250_MASTER_GEM_NOC_CFG);
> +DEFINE_QNODE(qns_gem_noc_snoc, SM8250_SLAVE_GEM_NOC_SNOC, 1, 16,
> SM8250_MASTER_GEM_NOC_SNOC);
> +DEFINE_QNODE(qns_llcc, SM8250_SLAVE_LLCC, 4, 16, SM8250_MASTER_LLCC);
> +DEFINE_QNODE(qns_sys_pcie, SM8250_SLAVE_MEM_NOC_PCIE_SNOC, 1, 8,
> SM8250_MASTER_GEM_NOC_PCIE_SNOC);
> +DEFINE_QNODE(srvc_even_gemnoc, SM8250_SLAVE_SERVICE_GEM_NOC_1, 1, 4);
> +DEFINE_QNODE(srvc_odd_gemnoc, SM8250_SLAVE_SERVICE_GEM_NOC_2, 1, 4);
> +DEFINE_QNODE(srvc_sys_gemnoc, SM8250_SLAVE_SERVICE_GEM_NOC, 1, 4);
> +DEFINE_QNODE(ipa_core_slave, SM8250_SLAVE_IPA_CORE, 1, 8);
> +DEFINE_QNODE(ebi, SM8250_SLAVE_EBI_CH0, 4, 4);
> +DEFINE_QNODE(qns_mem_noc_hf, SM8250_SLAVE_MNOC_HF_MEM_NOC, 2, 32,
> SM8250_MASTER_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qns_mem_noc_sf, SM8250_SLAVE_MNOC_SF_MEM_NOC, 2, 32,
> SM8250_MASTER_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(srvc_mnoc, SM8250_SLAVE_SERVICE_MNOC, 1, 4);
> +DEFINE_QNODE(qhs_cal_dp0, SM8250_SLAVE_NPU_CAL_DP0, 1, 4);
> +DEFINE_QNODE(qhs_cal_dp1, SM8250_SLAVE_NPU_CAL_DP1, 1, 4);
> +DEFINE_QNODE(qhs_cp, SM8250_SLAVE_NPU_CP, 1, 4);
> +DEFINE_QNODE(qhs_dma_bwmon, SM8250_SLAVE_NPU_INT_DMA_BWMON_CFG, 1, 4);
> +DEFINE_QNODE(qhs_dpm, SM8250_SLAVE_NPU_DPM, 1, 4);
> +DEFINE_QNODE(qhs_isense, SM8250_SLAVE_ISENSE_CFG, 1, 4);
> +DEFINE_QNODE(qhs_llm, SM8250_SLAVE_NPU_LLM_CFG, 1, 4);
> +DEFINE_QNODE(qhs_tcm, SM8250_SLAVE_NPU_TCM, 1, 4);
> +DEFINE_QNODE(qns_npu_sys, SM8250_SLAVE_NPU_COMPUTE_NOC, 2, 32);
> +DEFINE_QNODE(srvc_noc, SM8250_SLAVE_SERVICE_NPU_NOC, 1, 4);
> +DEFINE_QNODE(qhs_apss, SM8250_SLAVE_APPSS, 1, 8);
> +DEFINE_QNODE(qns_cnoc, SM8250_SNOC_CNOC_SLV, 1, 8, 
> SM8250_SNOC_CNOC_MAS);
> +DEFINE_QNODE(qns_gemnoc_gc, SM8250_SLAVE_SNOC_GEM_NOC_GC, 1, 8,
> SM8250_MASTER_SNOC_GC_MEM_NOC);
> +DEFINE_QNODE(qns_gemnoc_sf, SM8250_SLAVE_SNOC_GEM_NOC_SF, 1, 16,
> SM8250_MASTER_SNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qxs_imem, SM8250_SLAVE_OCIMEM, 1, 8);
> +DEFINE_QNODE(qxs_pimem, SM8250_SLAVE_PIMEM, 1, 8);
> +DEFINE_QNODE(srvc_snoc, SM8250_SLAVE_SERVICE_SNOC, 1, 4);
> +DEFINE_QNODE(xs_pcie_0, SM8250_SLAVE_PCIE_0, 1, 8);
> +DEFINE_QNODE(xs_pcie_1, SM8250_SLAVE_PCIE_1, 1, 8);
> +DEFINE_QNODE(xs_pcie_modem, SM8250_SLAVE_PCIE_2, 1, 8);
> +DEFINE_QNODE(xs_qdss_stm, SM8250_SLAVE_QDSS_STM, 1, 4);
> +DEFINE_QNODE(xs_sys_tcu_cfg, SM8250_SLAVE_TCU, 1, 8);
> +

You can keepalive enabled for SH0,
MC0, MM0, SN0 and CN0.

> +DEFINE_QBCM(bcm_acv, "ACV", false, &ebi);
> +DEFINE_QBCM(bcm_alc, "ALC", false, &alc);
> +DEFINE_QBCM(bcm_mc0, "MC0", false, &ebi);
> +DEFINE_QBCM(bcm_sh0, "SH0", false, &qns_llcc);
> +DEFINE_QBCM(bcm_mm0, "MM0", false, &qns_mem_noc_hf);
> +DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto);
> +DEFINE_QBCM(bcm_ip0, "IP0", false, &ipa_core_slave);
> +DEFINE_QBCM(bcm_mm1, "MM1", false, &qnm_camnoc_hf, &qxm_mdp0, 
> &qxm_mdp1);
> +DEFINE_QBCM(bcm_sh2, "SH2", false, &alm_gpu_tcu, &alm_sys_tcu);
> +DEFINE_QBCM(bcm_mm2, "MM2", false, &qns_mem_noc_sf);
> +DEFINE_QBCM(bcm_qup0, "QUP0", false, &qhm_qup1, &qhm_qup2, &qhm_qup0);
> +DEFINE_QBCM(bcm_sh3, "SH3", false, &qnm_cmpnoc);
> +DEFINE_QBCM(bcm_mm3, "MM3", false, &qnm_camnoc_icp, &qnm_camnoc_sf,
> &qnm_video0, &qnm_video1, &qnm_video_cvp);
> +DEFINE_QBCM(bcm_sh4, "SH4", false, &chm_apps);
> +DEFINE_QBCM(bcm_sn0, "SN0", false, &qns_gemnoc_sf);
> +DEFINE_QBCM(bcm_co0, "CO0", false, &qns_cdsp_mem_noc);
> +DEFINE_QBCM(bcm_cn0, "CN0", false, &qnm_snoc, &xm_qdss_dap,
> &qhs_a1_noc_cfg, &qhs_a2_noc_cfg, &qhs_ahb2phy0, &qhs_ahb2phy1,
> &qhs_aoss, &qhs_camera_cfg, &qhs_clk_ctl, &qhs_compute_dsp,
> &qhs_cpr_cx, &qhs_cpr_mmcx, &qhs_cpr_mx, &qhs_crypto0_cfg,
> &qhs_cx_rdpm, &qhs_dcc_cfg, &qhs_ddrss_cfg, &qhs_display_cfg,
> &qhs_gpuss_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_ipc_router,
> &qhs_lpass_cfg, &qhs_mnoc_cfg, &qhs_npu_cfg, &qhs_pcie0_cfg,
> &qhs_pcie1_cfg, &qhs_pcie_modem_cfg, &qhs_pdm, &qhs_pimem_cfg,
> &qhs_prng, &qhs_qdss_cfg, &qhs_qspi, &qhs_qup0, &qhs_qup1, &qhs_qup2,
> &qhs_sdc2, &qhs_sdc4, &qhs_snoc_cfg, &qhs_tcsr, &qhs_tlmm0,
> &qhs_tlmm1, &qhs_tlmm2, &qhs_tsif, &qhs_ufs_card_cfg,
> &qhs_ufs_mem_cfg, &qhs_usb3_0, &qhs_usb3_1, &qhs_venus_cfg,
> &qhs_vsense_ctrl_cfg, &qns_cnoc_a2noc, &srvc_cnoc);
> +DEFINE_QBCM(bcm_sn1, "SN1", false, &qxs_imem);
> +DEFINE_QBCM(bcm_sn2, "SN2", false, &qns_gemnoc_gc);
> +DEFINE_QBCM(bcm_co2, "CO2", false, &qnm_npu);
> +DEFINE_QBCM(bcm_sn3, "SN3", false, &qxs_pimem);
> +DEFINE_QBCM(bcm_sn4, "SN4", false, &xs_qdss_stm);
> +DEFINE_QBCM(bcm_sn5, "SN5", false, &xs_pcie_modem);
> +DEFINE_QBCM(bcm_sn6, "SN6", false, &xs_pcie_0, &xs_pcie_1);
> +DEFINE_QBCM(bcm_sn7, "SN7", false, &qnm_aggre1_noc);
> +DEFINE_QBCM(bcm_sn8, "SN8", false, &qnm_aggre2_noc);
> +DEFINE_QBCM(bcm_sn9, "SN9", false, &qnm_gemnoc_pcie);
> +DEFINE_QBCM(bcm_sn11, "SN11", false, &qnm_gemnoc);
> +DEFINE_QBCM(bcm_sn12, "SN12", false, &qns_pcie_modem_mem_noc,
> &qns_pcie_mem_noc);
> +
> +static struct qcom_icc_bcm *aggre1_noc_bcms[] = {
> +	&bcm_qup0,
> +	&bcm_sn12,
> +};
> +
> +static struct qcom_icc_node *aggre1_noc_nodes[] = {
> +	[MASTER_A1NOC_CFG] = &qhm_a1noc_cfg,
> +	[MASTER_QSPI_0] = &qhm_qspi,
> +	[MASTER_QUP_1] = &qhm_qup1,
> +	[MASTER_QUP_2] = &qhm_qup2,
> +	[MASTER_TSIF] = &qhm_tsif,
> +	[MASTER_PCIE_2] = &xm_pcie3_modem,
> +	[MASTER_SDCC_4] = &xm_sdc4,
> +	[MASTER_UFS_MEM] = &xm_ufs_mem,
> +	[MASTER_USB3] = &xm_usb3_0,
> +	[MASTER_USB3_1] = &xm_usb3_1,
> +	[A1NOC_SNOC_SLV] = &qns_a1noc_snoc,
> +	[SLAVE_ANOC_PCIE_GEM_NOC_1] = &qns_pcie_modem_mem_noc,
> +	[SLAVE_SERVICE_A1NOC] = &srvc_aggre1_noc,
> +};
> +
> +static struct qcom_icc_desc sm8250_aggre1_noc = {
> +	.nodes = aggre1_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(aggre1_noc_nodes),
> +	.bcms = aggre1_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(aggre1_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *aggre2_noc_bcms[] = {
> +	&bcm_ce0,
> +	&bcm_qup0,
> +	&bcm_sn12,
> +};
> +
> +static struct qcom_icc_node *aggre2_noc_nodes[] = {
> +	[MASTER_A2NOC_CFG] = &qhm_a2noc_cfg,
> +	[MASTER_QDSS_BAM] = &qhm_qdss_bam,
> +	[MASTER_QUP_0] = &qhm_qup0,
> +	[MASTER_CNOC_A2NOC] = &qnm_cnoc,
> +	[MASTER_CRYPTO_CORE_0] = &qxm_crypto,
> +	[MASTER_IPA] = &qxm_ipa,
> +	[MASTER_PCIE] = &xm_pcie3_0,
> +	[MASTER_PCIE_1] = &xm_pcie3_1,
> +	[MASTER_QDSS_ETR] = &xm_qdss_etr,
> +	[MASTER_SDCC_2] = &xm_sdc2,
> +	[MASTER_UFS_CARD] = &xm_ufs_card,
> +	[A2NOC_SNOC_SLV] = &qns_a2noc_snoc,
> +	[SLAVE_ANOC_PCIE_GEM_NOC] = &qns_pcie_mem_noc,
> +	[SLAVE_SERVICE_A2NOC] = &srvc_aggre2_noc,
> +};
> +
> +static struct qcom_icc_desc sm8250_aggre2_noc = {
> +	.nodes = aggre2_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(aggre2_noc_nodes),
> +	.bcms = aggre2_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(aggre2_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *compute_noc_bcms[] = {
> +	&bcm_co0,
> +	&bcm_co2,
> +};
> +
> +static struct qcom_icc_node *compute_noc_nodes[] = {
> +	[MASTER_NPU] = &qnm_npu,
> +	[SLAVE_CDSP_MEM_NOC] = &qns_cdsp_mem_noc,
> +};
> +
> +static struct qcom_icc_desc sm8250_compute_noc = {
> +	.nodes = compute_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(compute_noc_nodes),
> +	.bcms = compute_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(compute_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *config_noc_bcms[] = {
> +	&bcm_cn0,
> +};
> +
> +static struct qcom_icc_node *config_noc_nodes[] = {
> +	[SNOC_CNOC_MAS] = &qnm_snoc,
> +	[MASTER_QDSS_DAP] = &xm_qdss_dap,
> +	[SLAVE_A1NOC_CFG] = &qhs_a1_noc_cfg,
> +	[SLAVE_A2NOC_CFG] = &qhs_a2_noc_cfg,
> +	[SLAVE_AHB2PHY_SOUTH] = &qhs_ahb2phy0,
> +	[SLAVE_AHB2PHY_NORTH] = &qhs_ahb2phy1,
> +	[SLAVE_AOSS] = &qhs_aoss,
> +	[SLAVE_CAMERA_CFG] = &qhs_camera_cfg,
> +	[SLAVE_CLK_CTL] = &qhs_clk_ctl,
> +	[SLAVE_CDSP_CFG] = &qhs_compute_dsp,
> +	[SLAVE_RBCPR_CX_CFG] = &qhs_cpr_cx,
> +	[SLAVE_RBCPR_MMCX_CFG] = &qhs_cpr_mmcx,
> +	[SLAVE_RBCPR_MX_CFG] = &qhs_cpr_mx,
> +	[SLAVE_CRYPTO_0_CFG] = &qhs_crypto0_cfg,
> +	[SLAVE_CX_RDPM] = &qhs_cx_rdpm,
> +	[SLAVE_DCC_CFG] = &qhs_dcc_cfg,
> +	[SLAVE_CNOC_DDRSS] = &qhs_ddrss_cfg,
> +	[SLAVE_DISPLAY_CFG] = &qhs_display_cfg,
> +	[SLAVE_GRAPHICS_3D_CFG] = &qhs_gpuss_cfg,
> +	[SLAVE_IMEM_CFG] = &qhs_imem_cfg,
> +	[SLAVE_IPA_CFG] = &qhs_ipa,
> +	[SLAVE_IPC_ROUTER_CFG] = &qhs_ipc_router,
> +	[SLAVE_LPASS] = &qhs_lpass_cfg,
> +	[SLAVE_CNOC_MNOC_CFG] = &qhs_mnoc_cfg,
> +	[SLAVE_NPU_CFG] = &qhs_npu_cfg,
> +	[SLAVE_PCIE_0_CFG] = &qhs_pcie0_cfg,
> +	[SLAVE_PCIE_1_CFG] = &qhs_pcie1_cfg,
> +	[SLAVE_PCIE_2_CFG] = &qhs_pcie_modem_cfg,
> +	[SLAVE_PDM] = &qhs_pdm,
> +	[SLAVE_PIMEM_CFG] = &qhs_pimem_cfg,
> +	[SLAVE_PRNG] = &qhs_prng,
> +	[SLAVE_QDSS_CFG] = &qhs_qdss_cfg,
> +	[SLAVE_QSPI_0] = &qhs_qspi,
> +	[SLAVE_QUP_0] = &qhs_qup0,
> +	[SLAVE_QUP_1] = &qhs_qup1,
> +	[SLAVE_QUP_2] = &qhs_qup2,
> +	[SLAVE_SDCC_2] = &qhs_sdc2,
> +	[SLAVE_SDCC_4] = &qhs_sdc4,
> +	[SLAVE_SNOC_CFG] = &qhs_snoc_cfg,
> +	[SLAVE_TCSR] = &qhs_tcsr,
> +	[SLAVE_TLMM_NORTH] = &qhs_tlmm0,
> +	[SLAVE_TLMM_SOUTH] = &qhs_tlmm1,
> +	[SLAVE_TLMM_WEST] = &qhs_tlmm2,
> +	[SLAVE_TSIF] = &qhs_tsif,
> +	[SLAVE_UFS_CARD_CFG] = &qhs_ufs_card_cfg,
> +	[SLAVE_UFS_MEM_CFG] = &qhs_ufs_mem_cfg,
> +	[SLAVE_USB3] = &qhs_usb3_0,
> +	[SLAVE_USB3_1] = &qhs_usb3_1,
> +	[SLAVE_VENUS_CFG] = &qhs_venus_cfg,
> +	[SLAVE_VSENSE_CTRL_CFG] = &qhs_vsense_ctrl_cfg,
> +	[SLAVE_CNOC_A2NOC] = &qns_cnoc_a2noc,
> +	[SLAVE_SERVICE_CNOC] = &srvc_cnoc,
> +};
> +
> +static struct qcom_icc_desc sm8250_config_noc = {
> +	.nodes = config_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(config_noc_nodes),
> +	.bcms = config_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(config_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *dc_noc_bcms[] = {
> +};
> +
> +static struct qcom_icc_node *dc_noc_nodes[] = {
> +	[MASTER_CNOC_DC_NOC] = &qhm_cnoc_dc_noc,
> +	[SLAVE_LLCC_CFG] = &qhs_llcc,
> +	[SLAVE_GEM_NOC_CFG] = &qhs_memnoc,
> +};
> +
> +static struct qcom_icc_desc sm8250_dc_noc = {
> +	.nodes = dc_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(dc_noc_nodes),
> +	.bcms = dc_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(dc_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *gem_noc_bcms[] = {
> +	&bcm_sh0,
> +	&bcm_sh2,
> +	&bcm_sh3,
> +	&bcm_sh4,
> +};
> +
> +static struct qcom_icc_node *gem_noc_nodes[] = {
> +	[MASTER_GPU_TCU] = &alm_gpu_tcu,
> +	[MASTER_SYS_TCU] = &alm_sys_tcu,
> +	[MASTER_AMPSS_M0] = &chm_apps,
> +	[MASTER_GEM_NOC_CFG] = &qhm_gemnoc_cfg,
> +	[MASTER_COMPUTE_NOC] = &qnm_cmpnoc,
> +	[MASTER_GRAPHICS_3D] = &qnm_gpu,
> +	[MASTER_MNOC_HF_MEM_NOC] = &qnm_mnoc_hf,
> +	[MASTER_MNOC_SF_MEM_NOC] = &qnm_mnoc_sf,
> +	[MASTER_ANOC_PCIE_GEM_NOC] = &qnm_pcie,
> +	[MASTER_SNOC_GC_MEM_NOC] = &qnm_snoc_gc,
> +	[MASTER_SNOC_SF_MEM_NOC] = &qnm_snoc_sf,
> +	[SLAVE_GEM_NOC_SNOC] = &qns_gem_noc_snoc,
> +	[SLAVE_LLCC] = &qns_llcc,
> +	[SLAVE_MEM_NOC_PCIE_SNOC] = &qns_sys_pcie,
> +	[SLAVE_SERVICE_GEM_NOC_1] = &srvc_even_gemnoc,
> +	[SLAVE_SERVICE_GEM_NOC_2] = &srvc_odd_gemnoc,
> +	[SLAVE_SERVICE_GEM_NOC] = &srvc_sys_gemnoc,
> +};
> +
> +static struct qcom_icc_desc sm8250_gem_noc = {
> +	.nodes = gem_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(gem_noc_nodes),
> +	.bcms = gem_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(gem_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *ipa_virt_bcms[] = {
> +	&bcm_ip0,
> +};
> +
> +static struct qcom_icc_node *ipa_virt_nodes[] = {
> +	[MASTER_IPA_CORE] = &ipa_core_master,
> +	[SLAVE_IPA_CORE] = &ipa_core_slave,
> +};
> +
> +static struct qcom_icc_desc sm8250_ipa_virt = {
> +	.nodes = ipa_virt_nodes,
> +	.num_nodes = ARRAY_SIZE(ipa_virt_nodes),
> +	.bcms = ipa_virt_bcms,
> +	.num_bcms = ARRAY_SIZE(ipa_virt_bcms),
> +};
> +
> +static struct qcom_icc_bcm *mc_virt_bcms[] = {
> +	&bcm_acv,
> +	&bcm_alc,
> +	&bcm_mc0,
> +};
> +
> +static struct qcom_icc_node *mc_virt_nodes[] = {
> +	[MASTER_LLCC] = &llcc_mc,
> +	[MASTER_ALC] = &alc,
> +	[SLAVE_EBI_CH0] = &ebi,
> +};
> +
> +static struct qcom_icc_desc sm8250_mc_virt = {
> +	.nodes = mc_virt_nodes,
> +	.num_nodes = ARRAY_SIZE(mc_virt_nodes),
> +	.bcms = mc_virt_bcms,
> +	.num_bcms = ARRAY_SIZE(mc_virt_bcms),
> +};
> +
> +static struct qcom_icc_bcm *mmss_noc_bcms[] = {
> +	&bcm_mm0,
> +	&bcm_mm1,
> +	&bcm_mm2,
> +	&bcm_mm3,
> +};
> +
> +static struct qcom_icc_node *mmss_noc_nodes[] = {
> +	[MASTER_CNOC_MNOC_CFG] = &qhm_mnoc_cfg,
> +	[MASTER_CAMNOC_HF] = &qnm_camnoc_hf,
> +	[MASTER_CAMNOC_ICP] = &qnm_camnoc_icp,
> +	[MASTER_CAMNOC_SF] = &qnm_camnoc_sf,
> +	[MASTER_VIDEO_P0] = &qnm_video0,
> +	[MASTER_VIDEO_P1] = &qnm_video1,
> +	[MASTER_VIDEO_PROC] = &qnm_video_cvp,
> +	[MASTER_MDP_PORT0] = &qxm_mdp0,
> +	[MASTER_MDP_PORT1] = &qxm_mdp1,
> +	[MASTER_ROTATOR] = &qxm_rot,
> +	[SLAVE_MNOC_HF_MEM_NOC] = &qns_mem_noc_hf,
> +	[SLAVE_MNOC_SF_MEM_NOC] = &qns_mem_noc_sf,
> +	[SLAVE_SERVICE_MNOC] = &srvc_mnoc,
> +};
> +
> +static struct qcom_icc_desc sm8250_mmss_noc = {
> +	.nodes = mmss_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(mmss_noc_nodes),
> +	.bcms = mmss_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(mmss_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *npu_noc_bcms[] = {
> +};
> +
> +static struct qcom_icc_node *npu_noc_nodes[] = {
> +	[MASTER_NPU_SYS] = &amm_npu_sys,
> +	[MASTER_NPU_CDP] = &amm_npu_sys_cdp_w,
> +	[MASTER_NPU_NOC_CFG] = &qhm_cfg,
> +	[SLAVE_NPU_CAL_DP0] = &qhs_cal_dp0,
> +	[SLAVE_NPU_CAL_DP1] = &qhs_cal_dp1,
> +	[SLAVE_NPU_CP] = &qhs_cp,
> +	[SLAVE_NPU_INT_DMA_BWMON_CFG] = &qhs_dma_bwmon,
> +	[SLAVE_NPU_DPM] = &qhs_dpm,
> +	[SLAVE_ISENSE_CFG] = &qhs_isense,
> +	[SLAVE_NPU_LLM_CFG] = &qhs_llm,
> +	[SLAVE_NPU_TCM] = &qhs_tcm,
> +	[SLAVE_NPU_COMPUTE_NOC] = &qns_npu_sys,
> +	[SLAVE_SERVICE_NPU_NOC] = &srvc_noc,
> +};
> +
> +static struct qcom_icc_desc sm8250_npu_noc = {
> +	.nodes = npu_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(npu_noc_nodes),
> +	.bcms = npu_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(npu_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *system_noc_bcms[] = {
> +	&bcm_sn0,
> +	&bcm_sn1,
> +	&bcm_sn11,
> +	&bcm_sn2,
> +	&bcm_sn3,
> +	&bcm_sn4,
> +	&bcm_sn5,
> +	&bcm_sn6,
> +	&bcm_sn7,
> +	&bcm_sn8,
> +	&bcm_sn9,
> +};
> +
> +static struct qcom_icc_node *system_noc_nodes[] = {
> +	[MASTER_SNOC_CFG] = &qhm_snoc_cfg,
> +	[A1NOC_SNOC_MAS] = &qnm_aggre1_noc,
> +	[A2NOC_SNOC_MAS] = &qnm_aggre2_noc,
> +	[MASTER_GEM_NOC_SNOC] = &qnm_gemnoc,
> +	[MASTER_GEM_NOC_PCIE_SNOC] = &qnm_gemnoc_pcie,
> +	[MASTER_PIMEM] = &qxm_pimem,
> +	[MASTER_GIC] = &xm_gic,
> +	[SLAVE_APPSS] = &qhs_apss,
> +	[SNOC_CNOC_SLV] = &qns_cnoc,
> +	[SLAVE_SNOC_GEM_NOC_GC] = &qns_gemnoc_gc,
> +	[SLAVE_SNOC_GEM_NOC_SF] = &qns_gemnoc_sf,
> +	[SLAVE_OCIMEM] = &qxs_imem,
> +	[SLAVE_PIMEM] = &qxs_pimem,
> +	[SLAVE_SERVICE_SNOC] = &srvc_snoc,
> +	[SLAVE_PCIE_0] = &xs_pcie_0,
> +	[SLAVE_PCIE_1] = &xs_pcie_1,
> +	[SLAVE_PCIE_2] = &xs_pcie_modem,
> +	[SLAVE_QDSS_STM] = &xs_qdss_stm,
> +	[SLAVE_TCU] = &xs_sys_tcu_cfg,
> +};
> +
> +static struct qcom_icc_desc sm8250_system_noc = {
> +	.nodes = system_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(system_noc_nodes),
> +	.bcms = system_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(system_noc_bcms),
> +};
> +
> +static int qnoc_probe(struct platform_device *pdev)
> +{
> +	const struct qcom_icc_desc *desc;
> +	struct icc_onecell_data *data;
> +	struct icc_provider *provider;
> +	struct qcom_icc_node **qnodes;
> +	struct qcom_icc_provider *qp;
> +	struct icc_node *node;
> +	size_t num_nodes, i;
> +	int ret;
> +
> +	desc = device_get_match_data(&pdev->dev);
> +	if (!desc)
> +		return -EINVAL;
> +
> +	qnodes = desc->nodes;
> +	num_nodes = desc->num_nodes;
> +
> +	qp = devm_kzalloc(&pdev->dev, sizeof(*qp), GFP_KERNEL);
> +	if (!qp)
> +		return -ENOMEM;
> +
> +	data = devm_kcalloc(&pdev->dev, num_nodes, sizeof(*node), 
> GFP_KERNEL);
> +	if (!data)
> +		return -ENOMEM;
> +
> +	provider = &qp->provider;
> +	provider->dev = &pdev->dev;
> +	provider->set = qcom_icc_set;
> +	provider->pre_aggregate = qcom_icc_pre_aggregate;
> +	provider->aggregate = qcom_icc_aggregate;
> +	provider->xlate = of_icc_xlate_onecell;
> +	INIT_LIST_HEAD(&provider->nodes);
> +	provider->data = data;
> +
> +	qp->dev = &pdev->dev;
> +	qp->bcms = desc->bcms;
> +	qp->num_bcms = desc->num_bcms;
> +
> +	qp->voter = of_bcm_voter_get(qp->dev, NULL);
> +	if (IS_ERR(qp->voter))
> +		return PTR_ERR(qp->voter);
> +
> +	ret = icc_provider_add(provider);
> +	if (ret) {
> +		dev_err(&pdev->dev, "error adding interconnect provider\n");
> +		return ret;
> +	}
> +
> +	for (i = 0; i < num_nodes; i++) {
> +		size_t j;
> +
> +		if (!qnodes[i])
> +			continue;
> +
> +		node = icc_node_create(qnodes[i]->id);
> +		if (IS_ERR(node)) {
> +			ret = PTR_ERR(node);
> +			goto err;
> +		}
> +
> +		node->name = qnodes[i]->name;
> +		node->data = qnodes[i];
> +		icc_node_add(node, provider);
> +
> +		for (j = 0; j < qnodes[i]->num_links; j++)
> +			icc_link_create(node, qnodes[i]->links[j]);
> +
> +		data->nodes[i] = node;
> +	}
> +	data->num_nodes = num_nodes;
> +
> +	for (i = 0; i < qp->num_bcms; i++)
> +		qcom_icc_bcm_init(qp->bcms[i], &pdev->dev);
> +
> +	platform_set_drvdata(pdev, qp);
> +
> +	return 0;
> +err:
> +	icc_nodes_remove(provider);
> +	icc_provider_del(provider);
> +	return ret;
> +}
> +
> +static int qnoc_remove(struct platform_device *pdev)
> +{
> +	struct qcom_icc_provider *qp = platform_get_drvdata(pdev);
> +
> +	icc_nodes_remove(&qp->provider);
> +	return icc_provider_del(&qp->provider);
> +}
> +
> +static const struct of_device_id qnoc_of_match[] = {
> +	{ .compatible = "qcom,sm8250-aggre1-noc",
> +	  .data = &sm8250_aggre1_noc},
> +	{ .compatible = "qcom,sm8250-aggre2-noc",
> +	  .data = &sm8250_aggre2_noc},
> +	{ .compatible = "qcom,sm8250-compute-noc",
> +	  .data = &sm8250_compute_noc},
> +	{ .compatible = "qcom,sm8250-config-noc",
> +	  .data = &sm8250_config_noc},
> +	{ .compatible = "qcom,sm8250-dc-noc",
> +	  .data = &sm8250_dc_noc},
> +	{ .compatible = "qcom,sm8250-gem-noc",
> +	  .data = &sm8250_gem_noc},
> +	{ .compatible = "qcom,sm8250-ipa-virt",
> +	  .data = &sm8250_ipa_virt},
> +	{ .compatible = "qcom,sm8250-mc-virt",
> +	  .data = &sm8250_mc_virt},
> +	{ .compatible = "qcom,sm8250-mmss-noc",
> +	  .data = &sm8250_mmss_noc},
> +	{ .compatible = "qcom,sm8250-npu-noc",
> +	  .data = &sm8250_npu_noc},
> +	{ .compatible = "qcom,sm8250-system-noc",
> +	  .data = &sm8250_system_noc},
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(of, qnoc_of_match);
> +
> +static struct platform_driver qnoc_driver = {
> +	.probe = qnoc_probe,
> +	.remove = qnoc_remove,
> +	.driver = {
> +		.name = "qnoc-sm8250",
> +		.of_match_table = qnoc_of_match,
> +	},
> +};
> +module_platform_driver(qnoc_driver);
> +
> +MODULE_DESCRIPTION("Qualcomm SM8250 NoC driver");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/interconnect/qcom/sm8250.h
> b/drivers/interconnect/qcom/sm8250.h
> new file mode 100644
> index 000000000000..af4b0b47146f
> --- /dev/null
> +++ b/drivers/interconnect/qcom/sm8250.h
> @@ -0,0 +1,163 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Qualcomm #define SM8250 interconnect IDs
> + *
> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> + */
> +
> +#ifndef __DRIVERS_INTERCONNECT_QCOM_SM8250_H
> +#define __DRIVERS_INTERCONNECT_QCOM_SM8250_H
> +
> +#define SM8250_A1NOC_SNOC_MAS			0
> +#define SM8250_A1NOC_SNOC_SLV			1
> +#define SM8250_A2NOC_SNOC_MAS			2
> +#define SM8250_A2NOC_SNOC_SLV			3
> +#define SM8250_MASTER_A1NOC_CFG			4
> +#define SM8250_MASTER_A2NOC_CFG			5
> +#define SM8250_MASTER_ALC			6
> +#define SM8250_MASTER_AMPSS_M0			7
> +#define SM8250_MASTER_ANOC_PCIE_GEM_NOC		8
> +#define SM8250_MASTER_CAMNOC_HF			9
> +#define SM8250_MASTER_CAMNOC_ICP		10
> +#define SM8250_MASTER_CAMNOC_SF			11
> +#define SM8250_MASTER_CNOC_A2NOC		12
> +#define SM8250_MASTER_CNOC_DC_NOC		13
> +#define SM8250_MASTER_CNOC_MNOC_CFG		14
> +#define SM8250_MASTER_COMPUTE_NOC		15
> +#define SM8250_MASTER_CRYPTO_CORE_0		16
> +#define SM8250_MASTER_GEM_NOC_CFG		17
> +#define SM8250_MASTER_GEM_NOC_PCIE_SNOC		18
> +#define SM8250_MASTER_GEM_NOC_SNOC		19
> +#define SM8250_MASTER_GIC			20
> +#define SM8250_MASTER_GPU_TCU			21
> +#define SM8250_MASTER_GRAPHICS_3D		22
> +#define SM8250_MASTER_IPA			23
> +#define SM8250_MASTER_IPA_CORE			24
> +#define SM8250_MASTER_LLCC			25
> +#define SM8250_MASTER_MDP_PORT0			26
> +#define SM8250_MASTER_MDP_PORT1			27
> +#define SM8250_MASTER_MNOC_HF_MEM_NOC		28
> +#define SM8250_MASTER_MNOC_SF_MEM_NOC		29
> +#define SM8250_MASTER_NPU			30
> +#define SM8250_MASTER_NPU_CDP			31
> +#define SM8250_MASTER_NPU_NOC_CFG		32
> +#define SM8250_MASTER_NPU_SYS			33
> +#define SM8250_MASTER_PCIE			34
> +#define SM8250_MASTER_PCIE_1			35
> +#define SM8250_MASTER_PCIE_2			36
> +#define SM8250_MASTER_PIMEM			37
> +#define SM8250_MASTER_QDSS_BAM			38
> +#define SM8250_MASTER_QDSS_DAP			39
> +#define SM8250_MASTER_QDSS_ETR			40
> +#define SM8250_MASTER_QSPI_0			41
> +#define SM8250_MASTER_QUP_0			42
> +#define SM8250_MASTER_QUP_1			43
> +#define SM8250_MASTER_QUP_2			44
> +#define SM8250_MASTER_ROTATOR			45
> +#define SM8250_MASTER_SDCC_2			46
> +#define SM8250_MASTER_SDCC_4			47
> +#define SM8250_MASTER_SNOC_CFG			48
> +#define SM8250_MASTER_SNOC_GC_MEM_NOC		49
> +#define SM8250_MASTER_SNOC_SF_MEM_NOC		50
> +#define SM8250_MASTER_SYS_TCU			51
> +#define SM8250_MASTER_TSIF			52
> +#define SM8250_MASTER_UFS_CARD			53
> +#define SM8250_MASTER_UFS_MEM			54
> +#define SM8250_MASTER_USB3			55
> +#define SM8250_MASTER_USB3_1			56
> +#define SM8250_MASTER_VIDEO_P0			57
> +#define SM8250_MASTER_VIDEO_P1			58
> +#define SM8250_MASTER_VIDEO_PROC		59
> +#define SM8250_SLAVE_A1NOC_CFG			60
> +#define SM8250_SLAVE_A2NOC_CFG			61
> +#define SM8250_SLAVE_AHB2PHY_NORTH		62
> +#define SM8250_SLAVE_AHB2PHY_SOUTH		63
> +#define SM8250_SLAVE_ANOC_PCIE_GEM_NOC		64
> +#define SM8250_SLAVE_ANOC_PCIE_GEM_NOC_1	65
> +#define SM8250_SLAVE_AOSS			66
> +#define SM8250_SLAVE_APPSS			67
> +#define SM8250_SLAVE_CAMERA_CFG			68
> +#define SM8250_SLAVE_CDSP_CFG			69
> +#define SM8250_SLAVE_CDSP_MEM_NOC		70
> +#define SM8250_SLAVE_CLK_CTL			71
> +#define SM8250_SLAVE_CNOC_A2NOC			72
> +#define SM8250_SLAVE_CNOC_DDRSS			73
> +#define SM8250_SLAVE_CNOC_MNOC_CFG		74
> +#define SM8250_SLAVE_CRYPTO_0_CFG		75
> +#define SM8250_SLAVE_CX_RDPM			76
> +#define SM8250_SLAVE_DCC_CFG			77
> +#define SM8250_SLAVE_DISPLAY_CFG		78
> +#define SM8250_SLAVE_EBI_CH0			79
> +#define SM8250_SLAVE_GEM_NOC_CFG		80
> +#define SM8250_SLAVE_GEM_NOC_SNOC		81
> +#define SM8250_SLAVE_GRAPHICS_3D_CFG		82
> +#define SM8250_SLAVE_IMEM_CFG			83
> +#define SM8250_SLAVE_IPA_CFG			84
> +#define SM8250_SLAVE_IPA_CORE			85
> +#define SM8250_SLAVE_IPC_ROUTER_CFG		86
> +#define SM8250_SLAVE_ISENSE_CFG			87
> +#define SM8250_SLAVE_LLCC			88
> +#define SM8250_SLAVE_LLCC_CFG			89
> +#define SM8250_SLAVE_LPASS			90
> +#define SM8250_SLAVE_MEM_NOC_PCIE_SNOC		91
> +#define SM8250_SLAVE_MNOC_HF_MEM_NOC		92
> +#define SM8250_SLAVE_MNOC_SF_MEM_NOC		93
> +#define SM8250_SLAVE_NPU_CAL_DP0		94
> +#define SM8250_SLAVE_NPU_CAL_DP1		95
> +#define SM8250_SLAVE_NPU_CFG			96
> +#define SM8250_SLAVE_NPU_COMPUTE_NOC		97
> +#define SM8250_SLAVE_NPU_CP			98
> +#define SM8250_SLAVE_NPU_DPM			99
> +#define SM8250_SLAVE_NPU_INT_DMA_BWMON_CFG	100
> +#define SM8250_SLAVE_NPU_LLM_CFG		101
> +#define SM8250_SLAVE_NPU_TCM			102
> +#define SM8250_SLAVE_OCIMEM			103
> +#define SM8250_SLAVE_PCIE_0			104
> +#define SM8250_SLAVE_PCIE_0_CFG			105
> +#define SM8250_SLAVE_PCIE_1			106
> +#define SM8250_SLAVE_PCIE_1_CFG			107
> +#define SM8250_SLAVE_PCIE_2			108
> +#define SM8250_SLAVE_PCIE_2_CFG			109
> +#define SM8250_SLAVE_PDM			110
> +#define SM8250_SLAVE_PIMEM			111
> +#define SM8250_SLAVE_PIMEM_CFG			112
> +#define SM8250_SLAVE_PRNG			113
> +#define SM8250_SLAVE_QDSS_CFG			114
> +#define SM8250_SLAVE_QDSS_STM			115
> +#define SM8250_SLAVE_QSPI_0			116
> +#define SM8250_SLAVE_QUP_0			117
> +#define SM8250_SLAVE_QUP_1			118
> +#define SM8250_SLAVE_QUP_2			119
> +#define SM8250_SLAVE_RBCPR_CX_CFG		120
> +#define SM8250_SLAVE_RBCPR_MMCX_CFG		121
> +#define SM8250_SLAVE_RBCPR_MX_CFG		122
> +#define SM8250_SLAVE_SDCC_2			123
> +#define SM8250_SLAVE_SDCC_4			124
> +#define SM8250_SLAVE_SERVICE_A1NOC		125
> +#define SM8250_SLAVE_SERVICE_A2NOC		126
> +#define SM8250_SLAVE_SERVICE_CNOC		127
> +#define SM8250_SLAVE_SERVICE_GEM_NOC		128
> +#define SM8250_SLAVE_SERVICE_GEM_NOC_1		129
> +#define SM8250_SLAVE_SERVICE_GEM_NOC_2		130
> +#define SM8250_SLAVE_SERVICE_MNOC		131
> +#define SM8250_SLAVE_SERVICE_NPU_NOC		132
> +#define SM8250_SLAVE_SERVICE_SNOC		133
> +#define SM8250_SLAVE_SNOC_CFG			134
> +#define SM8250_SLAVE_SNOC_GEM_NOC_GC		135
> +#define SM8250_SLAVE_SNOC_GEM_NOC_SF		136
> +#define SM8250_SLAVE_TCSR			137
> +#define SM8250_SLAVE_TCU			138
> +#define SM8250_SLAVE_TLMM_NORTH			139
> +#define SM8250_SLAVE_TLMM_SOUTH			140
> +#define SM8250_SLAVE_TLMM_WEST			141
> +#define SM8250_SLAVE_TSIF			142
> +#define SM8250_SLAVE_UFS_CARD_CFG		143
> +#define SM8250_SLAVE_UFS_MEM_CFG		144
> +#define SM8250_SLAVE_USB3			145
> +#define SM8250_SLAVE_USB3_1			146
> +#define SM8250_SLAVE_VENUS_CFG			147
> +#define SM8250_SLAVE_VSENSE_CTRL_CFG		148
> +#define SM8250_SNOC_CNOC_MAS			149
> +#define SM8250_SNOC_CNOC_SLV			150
> +
> +#endif

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* Re: [PATCH v2 7/7] arm64: dts: qcom: sm8250: add interconnect nodes
  @ 2020-07-24 16:55  6%       ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-24 16:55 UTC (permalink / raw)
  To: Jonathan Marek
  Cc: linux-arm-msm, Andy Gross, Bjorn Andersson, Rob Herring,
	devicetree, linux-kernel, linux-kernel-owner

On 2020-07-24 20:06, Jonathan Marek wrote:
> On 7/24/20 10:13 AM, Sibi Sankar wrote:
>> Hey Jonathan,
>> 
>> Thanks for the patch! Please use the
>> suggested register space definitions
>> instead.
>> 
> 
> Thanks for the suggestions, I was unsure what to use for the sizes.
> The reg field is unused by the upstream driver so it is hard to figure
> out.
> 
> However, I'm not sure about some of your suggestions for the base
> address. For example, for "mc_virt" you suggest 0x0163d000, and I have
> 0x09100000. In the downstream dts, "mc_virt-base" is 0x9100000 and
> qcom,base-offset for fab_mc_virt is 0. Do you have an explanation for
> why your suggestion is so different?

AFAIK for providers with virt suffix the
register space definition is just an
arbitrary choice and doesn't matter.
Since mc_virt was just re-using gem_noc
address space I suggested we stick to
how it was done on sc7180 i.e place it
between system_noc and aggre1_noc.

> 
>> On 2020-07-13 21:11, Jonathan Marek wrote:
>>> Add the interconnect dts nodes for sm8250.
>>> 
>>> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
>>> ---
>>>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 82 
>>> ++++++++++++++++++++++++++++
>>>  1 file changed, 82 insertions(+)
>>> 
>>> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi
>>> b/arch/arm64/boot/dts/qcom/sm8250.dtsi
>>> index 636e2196138c..dfc1b7fa7d85 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
>>> @@ -11,6 +11,7 @@
>>>  #include <dt-bindings/power/qcom-aoss-qmp.h>
>>>  #include <dt-bindings/power/qcom-rpmpd.h>
>>>  #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>>> +#include <dt-bindings/interconnect/qcom,sm8250.h>
>> 
>> please fix ^^ sort order
>> 
>>> 
>>>  / {
>>>      interrupt-parent = <&intc>;
>>> @@ -978,6 +979,55 @@ spi13: spi@a94000 {
>>>              };
>>>          };
>>> 
>>> +        config_noc: interconnect@1500000 {
>>> +            compatible = "qcom,sm8250-config-noc";
>>> +            reg = <0 0x01500000 0 0x1000>;
>> 
>> 0x01500000 0xa580
>> 
>>> +            #interconnect-cells = <1>;
>>> +            qcom,bcm-voters = <&apps_bcm_voter>;
>>> +        };
>>> +
>>> +        ipa_virt: interconnect@1620000 {
>>> +            compatible = "qcom,sm8250-ipa-virt";
>>> +            reg = <0 0x01620000 0 0x1000>;
>> 
>> 0x01e00000 0x1000
>> 
>>> +            #interconnect-cells = <1>;
>>> +            qcom,bcm-voters = <&apps_bcm_voter>;
>>> +        };
>>> +
>>> +        system_noc: interconnect@1632000 {
>>> +            compatible = "qcom,sm8250-system-noc";
>>> +            reg = <0 0x01632000 0 0x1000>;
>> 
>> 0x01620000 0x1C200
>> 
>>> +            #interconnect-cells = <1>;
>>> +            qcom,bcm-voters = <&apps_bcm_voter>;
>>> +        };
>>> +
>>> +        aggre1_noc: interconnect@16e2000 {
>>> +            compatible = "qcom,sm8250-aggre1-noc";
>>> +            reg = <0 0x016e2000 0 0x1000>;
>> 
>> 0x016e0000 0x1f180
>> 
>>> +            #interconnect-cells = <1>;
>>> +            qcom,bcm-voters = <&apps_bcm_voter>;
>>> +        };
>>> +
>>> +        aggre2_noc: interconnect@1703000 {
>>> +            compatible = "qcom,sm8250-aggre2-noc";
>>> +            reg = <0 0x01703000 0 0x1000>;
>> 
>> 0x01700000 0x33000
>> 
>>> +            #interconnect-cells = <1>;
>>> +            qcom,bcm-voters = <&apps_bcm_voter>;
>>> +        };
>>> +
>>> +        compute_noc: interconnect@1733000 {
>>> +            compatible = "qcom,sm8250-compute-noc";
>>> +            reg = <0 0x01733000 0 0x1000>;
>> 
>> 0x01733000 0xd180
>> 
>>> +            #interconnect-cells = <1>;
>>> +            qcom,bcm-voters = <&apps_bcm_voter>;
>>> +        };
>>> +
>>> +        mmss_noc: interconnect@174a000 {
>>> +            compatible = "qcom,sm8250-mmss-noc";
>>> +            reg = <0 0x0174a000 0 0x1000>;
>> 
>> 0x01740000 0x1f080
>> 
>>> +            #interconnect-cells = <1>;
>>> +            qcom,bcm-voters = <&apps_bcm_voter>;
>>> +        };
>>> +
>>>          ufs_mem_hc: ufshc@1d84000 {
>>>              compatible = "qcom,sm8250-ufshc", "qcom,ufshc",
>>>                       "jedec,ufs-2.0";
>>> @@ -1364,6 +1414,34 @@ usb_2_ssphy: lane@88eb200 {
>>>              };
>>>          };
>>> 
>>> +        dc_noc: interconnect@90c0000 {
>>> +            compatible = "qcom,sm8250-dc-noc";
>>> +            reg = <0 0x090c0000 0 0x1000>;
>> 
>> 0x090c0000 0x4200
>> 
>>> +            #interconnect-cells = <1>;
>>> +            qcom,bcm-voters = <&apps_bcm_voter>;
>>> +        };
>>> +
>>> +        mc_virt: interconnect@9100000 {
>>> +            compatible = "qcom,sm8250-mc-virt";
>>> +            reg = <0 0x09100000 0 0x1000>;
>> 
>> 0x0163d000 0x1000
>> 
>>> +            #interconnect-cells = <1>;
>>> +            qcom,bcm-voters = <&apps_bcm_voter>;
>>> +        };
>>> +
>>> +        gem_noc: interconnect@9121000 {
>>> +            compatible = "qcom,sm8250-gem-noc";
>>> +            reg = <0 0x09121000 0 0x1000>;
>> 
>> 0x09100000 0xb4000
>> 
>>> +            #interconnect-cells = <1>;
>>> +            qcom,bcm-voters = <&apps_bcm_voter>;
>>> +        };
>>> +
>>> +        npu_noc: interconnect@9990000 {
>>> +            compatible = "qcom,sm8250-npu-noc";
>>> +            reg = <0 0x09990000 0 0x1000>;
>> 
>> 0x09990000 0x1600
>> 
>>> +            #interconnect-cells = <1>;
>>> +            qcom,bcm-voters = <&apps_bcm_voter>;
>>> +        };
>>> +
>>>          usb_1: usb@a6f8800 {
>>>              compatible = "qcom,sm8250-dwc3", "qcom,dwc3";
>>>              reg = <0 0x0a6f8800 0 0x400>;
>>> @@ -2359,6 +2437,10 @@ rpmhpd_opp_turbo_l1: opp10 {
>>>                      };
>>>                  };
>>>              };
>>> +
>>> +            apps_bcm_voter: bcm_voter {
>>> +                compatible = "qcom,bcm-voter";
>>> +            };
>>>          };
>>>      };
>> 

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* Re: [PATCH 1/6] interconnect: Introduce xlate_extended() callback
  @ 2020-07-27 10:51 15%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-27 10:51 UTC (permalink / raw)
  To: Georgi Djakov
  Cc: linux-pm, devicetree, bjorn.andersson, robh+dt, mka, dianders,
	linux-kernel

Hey Georgi,

Thanks for the patch!

On 2020-07-23 18:39, Georgi Djakov wrote:
> Currently there is the xlate() callback, which is provider-specific is

nit: currently xlate callback isn't
provider specific.

> used for mapping the nodes from phandle arguments. This is fine for 
> simple
> mappings, but the phandle arguments could contain an additional data, 
> such
> as tag information. Let's create another callback xlate_extended() for 
> the
> cases where providers want also populate the tagging data.
> 
> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>

Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>

> ---
>  drivers/interconnect/core.c           | 73 ++++++++++++++++++---------
>  include/linux/interconnect-provider.h | 17 ++++++-
>  2 files changed, 65 insertions(+), 25 deletions(-)
> 
> diff --git a/drivers/interconnect/core.c b/drivers/interconnect/core.c
> index befd111049c0..6ccf55818e68 100644
> --- a/drivers/interconnect/core.c
> +++ b/drivers/interconnect/core.c
> @@ -336,12 +336,13 @@ EXPORT_SYMBOL_GPL(of_icc_xlate_onecell);
>   * Looks for interconnect provider under the node specified by @spec 
> and if
>   * found, uses xlate function of the provider to map phandle args to 
> node.
>   *
> - * Returns a valid pointer to struct icc_node on success or ERR_PTR()
> + * Returns a valid pointer to struct icc_node_data on success or 
> ERR_PTR()
>   * on failure.
>   */
> -struct icc_node *of_icc_get_from_provider(struct of_phandle_args 
> *spec)
> +struct icc_node_data *of_icc_get_from_provider(struct of_phandle_args 
> *spec)
>  {
>  	struct icc_node *node = ERR_PTR(-EPROBE_DEFER);
> +	struct icc_node_data *data = NULL;
>  	struct icc_provider *provider;
> 
>  	if (!spec)
> @@ -349,14 +350,33 @@ struct icc_node *of_icc_get_from_provider(struct
> of_phandle_args *spec)
> 
>  	mutex_lock(&icc_lock);
>  	list_for_each_entry(provider, &icc_providers, provider_list) {
> -		if (provider->dev->of_node == spec->np)
> -			node = provider->xlate(spec, provider->data);
> -		if (!IS_ERR(node))
> -			break;
> +		if (provider->dev->of_node == spec->np) {
> +			if (provider->xlate_extended) {
> +				data = provider->xlate_extended(spec, provider->data);
> +				if (!IS_ERR(data)) {
> +					node = data->node;
> +					break;
> +				}
> +			} else {
> +				node = provider->xlate(spec, provider->data);
> +				if (!IS_ERR(node))
> +					break;
> +			}
> +		}
>  	}
>  	mutex_unlock(&icc_lock);
> 
> -	return node;
> +	if (IS_ERR(node))
> +		return ERR_CAST(node);
> +
> +	if (!data) {
> +		data = kzalloc(sizeof(*data), GFP_KERNEL);
> +		if (!data)
> +			return ERR_PTR(-ENOMEM);
> +		data->node = node;
> +	}
> +
> +	return data;
>  }
>  EXPORT_SYMBOL_GPL(of_icc_get_from_provider);
> 
> @@ -403,7 +423,7 @@ EXPORT_SYMBOL_GPL(devm_of_icc_get);
>  struct icc_path *of_icc_get_by_index(struct device *dev, int idx)
>  {
>  	struct icc_path *path;
> -	struct icc_node *src_node, *dst_node;
> +	struct icc_node_data *src_data, *dst_data;
>  	struct device_node *np;
>  	struct of_phandle_args src_args, dst_args;
>  	int ret;
> @@ -441,39 +461,46 @@ struct icc_path *of_icc_get_by_index(struct
> device *dev, int idx)
> 
>  	of_node_put(dst_args.np);
> 
> -	src_node = of_icc_get_from_provider(&src_args);
> +	src_data = of_icc_get_from_provider(&src_args);
> 
> -	if (IS_ERR(src_node)) {
> -		if (PTR_ERR(src_node) != -EPROBE_DEFER)
> +	if (IS_ERR(src_data)) {
> +		if (PTR_ERR(src_data) != -EPROBE_DEFER)
>  			dev_err(dev, "error finding src node: %ld\n",
> -				PTR_ERR(src_node));
> -		return ERR_CAST(src_node);
> +				PTR_ERR(src_data));
> +		return ERR_CAST(src_data);
>  	}
> 
> -	dst_node = of_icc_get_from_provider(&dst_args);
> +	dst_data = of_icc_get_from_provider(&dst_args);
> 
> -	if (IS_ERR(dst_node)) {
> -		if (PTR_ERR(dst_node) != -EPROBE_DEFER)
> +	if (IS_ERR(dst_data)) {
> +		if (PTR_ERR(dst_data) != -EPROBE_DEFER)
>  			dev_err(dev, "error finding dst node: %ld\n",
> -				PTR_ERR(dst_node));
> -		return ERR_CAST(dst_node);
> +				PTR_ERR(dst_data));
> +		kfree(src_data);
> +		return ERR_CAST(dst_data);
>  	}
> 
>  	mutex_lock(&icc_lock);
> -	path = path_find(dev, src_node, dst_node);
> +	path = path_find(dev, src_data->node, dst_data->node);
>  	mutex_unlock(&icc_lock);
>  	if (IS_ERR(path)) {
>  		dev_err(dev, "%s: invalid path=%ld\n", __func__, PTR_ERR(path));
> -		return path;
> +		goto free_icc_data;
>  	}
> 
> +	if (src_data->tag && src_data->tag == dst_data->tag)
> +		icc_set_tag(path, src_data->tag);
> +
>  	path->name = kasprintf(GFP_KERNEL, "%s-%s",
> -			       src_node->name, dst_node->name);
> +			       src_data->node->name, dst_data->node->name);
>  	if (!path->name) {
>  		kfree(path);
> -		return ERR_PTR(-ENOMEM);
> +		path = ERR_PTR(-ENOMEM);
>  	}
> 
> +free_icc_data:
> +	kfree(src_data);
> +	kfree(dst_data);
>  	return path;
>  }
>  EXPORT_SYMBOL_GPL(of_icc_get_by_index);
> @@ -975,7 +1002,7 @@ int icc_provider_add(struct icc_provider 
> *provider)
>  {
>  	if (WARN_ON(!provider->set))
>  		return -EINVAL;
> -	if (WARN_ON(!provider->xlate))
> +	if (WARN_ON(!provider->xlate && !provider->xlate_extended))
>  		return -EINVAL;
> 
>  	mutex_lock(&icc_lock);
> diff --git a/include/linux/interconnect-provider.h
> b/include/linux/interconnect-provider.h
> index 4735518de515..4d535fddd5d3 100644
> --- a/include/linux/interconnect-provider.h
> +++ b/include/linux/interconnect-provider.h
> @@ -14,6 +14,17 @@
>  struct icc_node;
>  struct of_phandle_args;
> 
> +/**
> + * struct icc_node_data - icc node data
> + *
> + * @node: icc node
> + * @tag: tag
> + */
> +struct icc_node_data {
> +	struct icc_node *node;
> +	u32 tag;
> +};
> +
>  /**
>   * struct icc_onecell_data - driver data for onecell interconnect 
> providers
>   *
> @@ -39,6 +50,7 @@ struct icc_node *of_icc_xlate_onecell(struct
> of_phandle_args *spec,
>   * @pre_aggregate: pointer to device specific function that is called
>   *		   before the aggregation begins (optional)
>   * @xlate: provider-specific callback for mapping nodes from phandle 
> arguments
> + * @xlate_extended: vendor-specific callback for mapping node data
> from phandle arguments
>   * @dev: the device this interconnect provider belongs to
>   * @users: count of active users
>   * @inter_set: whether inter-provider pairs will be configured with 
> @set
> @@ -52,6 +64,7 @@ struct icc_provider {
>  			 u32 peak_bw, u32 *agg_avg, u32 *agg_peak);
>  	void (*pre_aggregate)(struct icc_node *node);
>  	struct icc_node* (*xlate)(struct of_phandle_args *spec, void *data);
> +	struct icc_node_data* (*xlate_extended)(struct of_phandle_args
> *spec, void *data);
>  	struct device		*dev;
>  	int			users;
>  	bool			inter_set;
> @@ -105,7 +118,7 @@ void icc_node_del(struct icc_node *node);
>  int icc_nodes_remove(struct icc_provider *provider);
>  int icc_provider_add(struct icc_provider *provider);
>  int icc_provider_del(struct icc_provider *provider);
> -struct icc_node *of_icc_get_from_provider(struct of_phandle_args 
> *spec);
> +struct icc_node_data *of_icc_get_from_provider(struct of_phandle_args 
> *spec);
> 
>  #else
> 
> @@ -157,7 +170,7 @@ static inline int icc_provider_del(struct
> icc_provider *provider)
>  	return -ENOTSUPP;
>  }
> 
> -static inline struct icc_node *of_icc_get_from_provider(struct
> of_phandle_args *spec)
> +static inline struct icc_node_data *of_icc_get_from_provider(struct
> of_phandle_args *spec)
>  {
>  	return ERR_PTR(-ENOTSUPP);
>  }

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 15%]

* Re: [PATCH 3/6] interconnect: qcom: sdm845: Replace xlate with xlate_extended
  @ 2020-07-27 10:54 15%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-27 10:54 UTC (permalink / raw)
  To: Georgi Djakov
  Cc: linux-pm, devicetree, bjorn.andersson, robh+dt, mka, dianders,
	linux-kernel, linux-kernel-owner

On 2020-07-23 18:39, Georgi Djakov wrote:
> Use the qcom_icc_xlate_extended() in order to parse tags, that are
> specified as an additional arguments to the path endpoints in DT.
> 
> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>

Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>

> ---
>  drivers/interconnect/qcom/sdm845.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/interconnect/qcom/sdm845.c
> b/drivers/interconnect/qcom/sdm845.c
> index f6c7b969520d..3b81dbb71b0b 100644
> --- a/drivers/interconnect/qcom/sdm845.c
> +++ b/drivers/interconnect/qcom/sdm845.c
> @@ -469,7 +469,7 @@ static int qnoc_probe(struct platform_device *pdev)
>  	provider->set = qcom_icc_set;
>  	provider->pre_aggregate = qcom_icc_pre_aggregate;
>  	provider->aggregate = qcom_icc_aggregate;
> -	provider->xlate = of_icc_xlate_onecell;
> +	provider->xlate_extended = qcom_icc_xlate_extended;
>  	INIT_LIST_HEAD(&provider->nodes);
>  	provider->data = data;

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 15%]

* Re: [PATCH 4/6] arm64: dts: qcom: sdm845: Increase the number of interconnect cells
  @ 2020-07-27 10:58 15%   ` Sibi Sankar
  2020-07-27 20:55  0%     ` Matthias Kaehlcke
  0 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-07-27 10:58 UTC (permalink / raw)
  To: Georgi Djakov
  Cc: linux-pm, devicetree, bjorn.andersson, robh+dt, mka, dianders,
	linux-kernel, linux-kernel-owner

On 2020-07-23 18:39, Georgi Djakov wrote:
> Increase the number of interconnect-cells, as now we can include
> the tag information. The consumers can specify the path tag as an
> additional argument to the endpoints.

Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>

https://patchwork.kernel.org/patch/11655409/
I'll replace the tag ids with the
macros once ^^ lands.

> 
> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sdm845.dtsi | 44 ++++++++++++++--------------
>  1 file changed, 22 insertions(+), 22 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index e506793407d8..94f5d27f2927 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -200,7 +200,7 @@ &LITTLE_CPU_SLEEP_1
>  			dynamic-power-coefficient = <100>;
>  			qcom,freq-domain = <&cpufreq_hw 0>;
>  			operating-points-v2 = <&cpu0_opp_table>;
> -			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc 
> SLAVE_EBI1>,
> +			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc 
> SLAVE_EBI1 3>,
>  					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
>  			#cooling-cells = <2>;
>  			next-level-cache = <&L2_0>;
> @@ -225,7 +225,7 @@ &LITTLE_CPU_SLEEP_1
>  			dynamic-power-coefficient = <100>;
>  			qcom,freq-domain = <&cpufreq_hw 0>;
>  			operating-points-v2 = <&cpu0_opp_table>;
> -			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc 
> SLAVE_EBI1>,
> +			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc 
> SLAVE_EBI1 3>,
>  					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
>  			#cooling-cells = <2>;
>  			next-level-cache = <&L2_100>;
> @@ -247,7 +247,7 @@ &LITTLE_CPU_SLEEP_1
>  			dynamic-power-coefficient = <100>;
>  			qcom,freq-domain = <&cpufreq_hw 0>;
>  			operating-points-v2 = <&cpu0_opp_table>;
> -			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc 
> SLAVE_EBI1>,
> +			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc 
> SLAVE_EBI1 3>,
>  					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
>  			#cooling-cells = <2>;
>  			next-level-cache = <&L2_200>;
> @@ -269,7 +269,7 @@ &LITTLE_CPU_SLEEP_1
>  			dynamic-power-coefficient = <100>;
>  			qcom,freq-domain = <&cpufreq_hw 0>;
>  			operating-points-v2 = <&cpu0_opp_table>;
> -			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc 
> SLAVE_EBI1>,
> +			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc 
> SLAVE_EBI1 3>,
>  					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
>  			#cooling-cells = <2>;
>  			next-level-cache = <&L2_300>;
> @@ -291,7 +291,7 @@ &BIG_CPU_SLEEP_1
>  			dynamic-power-coefficient = <396>;
>  			qcom,freq-domain = <&cpufreq_hw 1>;
>  			operating-points-v2 = <&cpu4_opp_table>;
> -			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc 
> SLAVE_EBI1>,
> +			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc 
> SLAVE_EBI1 3>,
>  					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
>  			#cooling-cells = <2>;
>  			next-level-cache = <&L2_400>;
> @@ -313,7 +313,7 @@ &BIG_CPU_SLEEP_1
>  			dynamic-power-coefficient = <396>;
>  			qcom,freq-domain = <&cpufreq_hw 1>;
>  			operating-points-v2 = <&cpu4_opp_table>;
> -			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc 
> SLAVE_EBI1>,
> +			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc 
> SLAVE_EBI1 3>,
>  					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
>  			#cooling-cells = <2>;
>  			next-level-cache = <&L2_500>;
> @@ -335,7 +335,7 @@ &BIG_CPU_SLEEP_1
>  			dynamic-power-coefficient = <396>;
>  			qcom,freq-domain = <&cpufreq_hw 1>;
>  			operating-points-v2 = <&cpu4_opp_table>;
> -			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc 
> SLAVE_EBI1>,
> +			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc 
> SLAVE_EBI1 3>,
>  					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
>  			#cooling-cells = <2>;
>  			next-level-cache = <&L2_600>;
> @@ -357,7 +357,7 @@ &BIG_CPU_SLEEP_1
>  			dynamic-power-coefficient = <396>;
>  			qcom,freq-domain = <&cpufreq_hw 1>;
>  			operating-points-v2 = <&cpu4_opp_table>;
> -			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc 
> SLAVE_EBI1>,
> +			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc 
> SLAVE_EBI1 3>,
>  					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
>  			#cooling-cells = <2>;
>  			next-level-cache = <&L2_700>;
> @@ -2011,49 +2011,49 @@ pcie1_lane: lanes@1c06200 {
>  		mem_noc: interconnect@1380000 {
>  			compatible = "qcom,sdm845-mem-noc";
>  			reg = <0 0x01380000 0 0x27200>;
> -			#interconnect-cells = <1>;
> +			#interconnect-cells = <2>;
>  			qcom,bcm-voters = <&apps_bcm_voter>;
>  		};
> 
>  		dc_noc: interconnect@14e0000 {
>  			compatible = "qcom,sdm845-dc-noc";
>  			reg = <0 0x014e0000 0 0x400>;
> -			#interconnect-cells = <1>;
> +			#interconnect-cells = <2>;
>  			qcom,bcm-voters = <&apps_bcm_voter>;
>  		};
> 
>  		config_noc: interconnect@1500000 {
>  			compatible = "qcom,sdm845-config-noc";
>  			reg = <0 0x01500000 0 0x5080>;
> -			#interconnect-cells = <1>;
> +			#interconnect-cells = <2>;
>  			qcom,bcm-voters = <&apps_bcm_voter>;
>  		};
> 
>  		system_noc: interconnect@1620000 {
>  			compatible = "qcom,sdm845-system-noc";
>  			reg = <0 0x01620000 0 0x18080>;
> -			#interconnect-cells = <1>;
> +			#interconnect-cells = <2>;
>  			qcom,bcm-voters = <&apps_bcm_voter>;
>  		};
> 
>  		aggre1_noc: interconnect@16e0000 {
>  			compatible = "qcom,sdm845-aggre1-noc";
>  			reg = <0 0x016e0000 0 0x15080>;
> -			#interconnect-cells = <1>;
> +			#interconnect-cells = <2>;
>  			qcom,bcm-voters = <&apps_bcm_voter>;
>  		};
> 
>  		aggre2_noc: interconnect@1700000 {
>  			compatible = "qcom,sdm845-aggre2-noc";
>  			reg = <0 0x01700000 0 0x1f300>;
> -			#interconnect-cells = <1>;
> +			#interconnect-cells = <2>;
>  			qcom,bcm-voters = <&apps_bcm_voter>;
>  		};
> 
>  		mmss_noc: interconnect@1740000 {
>  			compatible = "qcom,sdm845-mmss-noc";
>  			reg = <0 0x01740000 0 0x1c100>;
> -			#interconnect-cells = <1>;
> +			#interconnect-cells = <2>;
>  			qcom,bcm-voters = <&apps_bcm_voter>;
>  		};
> 
> @@ -2156,8 +2156,8 @@ ipa: ipa@1e40000 {
>  			clocks = <&rpmhcc RPMH_IPA_CLK>;
>  			clock-names = "core";
> 
> -			interconnects = <&aggre2_noc MASTER_IPA &mem_noc SLAVE_EBI1>,
> -				        <&aggre2_noc MASTER_IPA &system_noc SLAVE_IMEM>,
> +			interconnects = <&aggre2_noc MASTER_IPA 0 &mem_noc SLAVE_EBI1 0>,
> +					<&aggre2_noc MASTER_IPA 0 &system_noc SLAVE_IMEM 0>,
>  					<&gladiator_noc MASTER_APPSS_PROC &config_noc SLAVE_IPA_CFG>;
>  			interconnect-names = "memory",
>  					     "imem",
> @@ -3561,8 +3561,8 @@ usb_1: usb@a6f8800 {
> 
>  			resets = <&gcc GCC_USB30_PRIM_BCR>;
> 
> -			interconnects = <&aggre2_noc MASTER_USB3_0 &mem_noc SLAVE_EBI1>,
> -					<&gladiator_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3_0>;
> +			interconnects = <&aggre2_noc MASTER_USB3_0 0 &mem_noc SLAVE_EBI1 
> 0>,
> +					<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
>  			interconnect-names = "usb-ddr", "apps-usb";
> 
>  			usb_1_dwc3: dwc3@a600000 {
> @@ -3609,8 +3609,8 @@ usb_2: usb@a8f8800 {
> 
>  			resets = <&gcc GCC_USB30_SEC_BCR>;
> 
> -			interconnects = <&aggre2_noc MASTER_USB3_1 &mem_noc SLAVE_EBI1>,
> -					<&gladiator_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3_1>;
> +			interconnects = <&aggre2_noc MASTER_USB3_1 0 &mem_noc SLAVE_EBI1 
> 0>,
> +					<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>;
>  			interconnect-names = "usb-ddr", "apps-usb";
> 
>  			usb_2_dwc3: dwc3@a800000 {
> @@ -4306,7 +4306,7 @@ lpasscc: clock-controller@17014000 {
>  		gladiator_noc: interconnect@17900000 {
>  			compatible = "qcom,sdm845-gladiator-noc";
>  			reg = <0 0x17900000 0 0xd080>;
> -			#interconnect-cells = <1>;
> +			#interconnect-cells = <2>;
>  			qcom,bcm-voters = <&apps_bcm_voter>;
>  		};

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 15%]

* Re: [PATCH 2/6] interconnect: qcom: Implement xlate_extended() to parse tags
  @ 2020-07-27 14:47 15%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-27 14:47 UTC (permalink / raw)
  To: Georgi Djakov
  Cc: linux-pm, devicetree, bjorn.andersson, robh+dt, mka, dianders,
	linux-kernel

Hey Georgi,

Thanks for the patch!

On 7/23/20 6:39 PM, Georgi Djakov wrote:
> Implement a function to parse the arguments of the "interconnects" DT
> property and populate the interconnect path tags if this information
> is available.
> 
> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
> ---
>   drivers/interconnect/qcom/icc-rpmh.c | 27 +++++++++++++++++++++++++++
>   drivers/interconnect/qcom/icc-rpmh.h |  1 +
>   2 files changed, 28 insertions(+)
> 
> diff --git a/drivers/interconnect/qcom/icc-rpmh.c b/drivers/interconnect/qcom/icc-rpmh.c
> index 3ac5182c9ab2..44144fabec32 100644
> --- a/drivers/interconnect/qcom/icc-rpmh.c
> +++ b/drivers/interconnect/qcom/icc-rpmh.c
> @@ -6,6 +6,8 @@
>   #include <linux/interconnect.h>
>   #include <linux/interconnect-provider.h>
>   #include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/slab.h>
>   
>   #include "bcm-voter.h"
>   #include "icc-rpmh.h"
> @@ -92,6 +94,31 @@ int qcom_icc_set(struct icc_node *src, struct icc_node *dst)
>   }
>   EXPORT_SYMBOL_GPL(qcom_icc_set);
>   
> +struct icc_node_data *qcom_icc_xlate_extended(struct of_phandle_args *spec, void *data)
> +{
> +	struct icc_node_data *ndata;
> +	struct icc_node *node;
> +
> +	if (!spec)
> +		return ERR_PTR(-EINVAL);
> +

you could probably skip ^^ check

Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>

> +	node = of_icc_xlate_onecell(spec, data);
> +	if (IS_ERR(node))
> +		return ERR_CAST(node);
> +
> +	ndata = kzalloc(sizeof(*ndata), GFP_KERNEL);
> +	if (!ndata)
> +		return ERR_PTR(-ENOMEM);
> +
> +	ndata->node = node;
> +
> +	if (spec->args_count == 2)
> +		ndata->tag = spec->args[1];
> +
> +	return ndata;
> +}
> +EXPORT_SYMBOL_GPL(qcom_icc_xlate_extended);
> +
>   /**
>    * qcom_icc_bcm_init - populates bcm aux data and connect qnodes
>    * @bcm: bcm to be initialized
> diff --git a/drivers/interconnect/qcom/icc-rpmh.h b/drivers/interconnect/qcom/icc-rpmh.h
> index 903d25e61984..1dac39bc255d 100644
> --- a/drivers/interconnect/qcom/icc-rpmh.h
> +++ b/drivers/interconnect/qcom/icc-rpmh.h
> @@ -143,6 +143,7 @@ struct qcom_icc_desc {
>   int qcom_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
>   		       u32 peak_bw, u32 *agg_avg, u32 *agg_peak);
>   int qcom_icc_set(struct icc_node *src, struct icc_node *dst);
> +struct icc_node_data *qcom_icc_xlate_extended(struct of_phandle_args *spec, void *data);
>   int qcom_icc_bcm_init(struct qcom_icc_bcm *bcm, struct device *dev);
>   void qcom_icc_pre_aggregate(struct icc_node *node);
>   
> 
> 
> 

-- 
Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc, is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

^ permalink raw reply	[relevance 15%]

* Re: [PATCH 4/6] arm64: dts: qcom: sdm845: Increase the number of interconnect cells
  2020-07-27 10:58 15%   ` Sibi Sankar
@ 2020-07-27 20:55  0%     ` Matthias Kaehlcke
  0 siblings, 0 replies; 200+ results
From: Matthias Kaehlcke @ 2020-07-27 20:55 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: Georgi Djakov, linux-pm, devicetree, bjorn.andersson, robh+dt,
	dianders, linux-kernel, linux-kernel-owner

On Mon, Jul 27, 2020 at 04:28:35PM +0530, Sibi Sankar wrote:
> On 2020-07-23 18:39, Georgi Djakov wrote:
> > Increase the number of interconnect-cells, as now we can include
> > the tag information. The consumers can specify the path tag as an
> > additional argument to the endpoints.
> 
> Tested-by: Sibi Sankar <sibis@codeaurora.org>
> Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
> 
> https://patchwork.kernel.org/patch/11655409/
> I'll replace the tag ids with the
> macros once ^^ lands.

Great, I was going to ask about that :)

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>

^ permalink raw reply	[relevance 0%]

* Re: [PATCH 5/6] interconnect: qcom: sc7180: Replace xlate with xlate_extended
  2020-07-23 13:09  8% ` [PATCH 5/6] interconnect: qcom: sc7180: Replace xlate with xlate_extended Georgi Djakov
@ 2020-07-27 20:58  0%   ` Matthias Kaehlcke
  0 siblings, 0 replies; 200+ results
From: Matthias Kaehlcke @ 2020-07-27 20:58 UTC (permalink / raw)
  To: Georgi Djakov
  Cc: linux-pm, devicetree, bjorn.andersson, robh+dt, sibis, dianders,
	linux-kernel

On Thu, Jul 23, 2020 at 04:09:41PM +0300, Georgi Djakov wrote:
> From: Sibi Sankar <sibis@codeaurora.org>
> 
> Use the qcom_icc_xlate_extended() in order to parse tags, that are
> specified as an additional arguments to the path endpoints in DT.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>

Tested-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>

^ permalink raw reply	[relevance 0%]

* Re: [PATCH 6/6] arm64: dts: qcom: sc7180: Increase the number of interconnect cells
  2020-07-23 13:09  4% ` [PATCH 6/6] arm64: dts: qcom: sc7180: Increase the number of interconnect cells Georgi Djakov
@ 2020-07-27 21:06  0%   ` Matthias Kaehlcke
  0 siblings, 0 replies; 200+ results
From: Matthias Kaehlcke @ 2020-07-27 21:06 UTC (permalink / raw)
  To: Georgi Djakov
  Cc: linux-pm, devicetree, bjorn.andersson, robh+dt, sibis, dianders,
	linux-kernel

On Thu, Jul 23, 2020 at 04:09:42PM +0300, Georgi Djakov wrote:
> From: Sibi Sankar <sibis@codeaurora.org>
> 
> Increase the number of interconnect-cells, as now we can include
> the tag information. The consumers can specify the path tag as an
> additional argument to the endpoints.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>

Tested-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>

^ permalink raw reply	[relevance 0%]

* Re: [PATCH v3 1/3] remoteproc: qcom_q6v5_mss: Validate MBA firmware size before load
  2020-07-22 20:10 21% ` [PATCH v3 1/3] remoteproc: qcom_q6v5_mss: Validate MBA firmware size before load Sibi Sankar
@ 2020-07-28  5:45  0%   ` Bjorn Andersson
  0 siblings, 0 replies; 200+ results
From: Bjorn Andersson @ 2020-07-28  5:45 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, stable

On Wed 22 Jul 13:10 PDT 2020, Sibi Sankar wrote:

> The following mem abort is observed when the mba firmware size exceeds
> the allocated mba region. MBA firmware size is restricted to a maximum
> size of 1M and remaining memory region is used by modem debug policy
> firmware when available. Hence verify whether the MBA firmware size lies
> within the allocated memory region and is not greater than 1M before
> loading.
> 
> Err Logs:
> Unable to handle kernel paging request at virtual address
> Mem abort info:
> ...
> Call trace:
>   __memcpy+0x110/0x180
>   rproc_start+0x40/0x218
>   rproc_boot+0x5b4/0x608
>   state_store+0x54/0xf8
>   dev_attr_store+0x44/0x60
>   sysfs_kf_write+0x58/0x80
>   kernfs_fop_write+0x140/0x230
>   vfs_write+0xc4/0x208
>   ksys_write+0x74/0xf8
>   __arm64_sys_write+0x24/0x30
> ...
> 
> Fixes: 051fb70fd4ea4 ("remoteproc: qcom: Driver for the self-authenticating Hexagon v5")
> Cc: stable@vger.kernel.org

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> ---
>  drivers/remoteproc/qcom_q6v5_mss.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> index 718acebae777f..4e72c9e30426c 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> @@ -412,6 +412,12 @@ static int q6v5_load(struct rproc *rproc, const struct firmware *fw)
>  {
>  	struct q6v5 *qproc = rproc->priv;
>  
> +	/* MBA is restricted to a maximum size of 1M */
> +	if (fw->size > qproc->mba_size || fw->size > SZ_1M) {
> +		dev_err(qproc->dev, "MBA firmware load failed\n");

I'll change this to "MBA firmware exceeds size limit\n". Please let me
know if you object.

Regards,
Bjorn

> +		return -EINVAL;
> +	}
> +
>  	memcpy(qproc->mba_region, fw->data, fw->size);
>  
>  	return 0;
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* Re: [PATCH v3 3/3] remoteproc: qcom_q6v5_mss: Add modem debug policy support
  2020-07-22 20:10 20% ` [PATCH v3 3/3] remoteproc: qcom_q6v5_mss: Add modem debug policy support Sibi Sankar
@ 2020-07-28  5:48  0%   ` Bjorn Andersson
  0 siblings, 0 replies; 200+ results
From: Bjorn Andersson @ 2020-07-28  5:48 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen, ohad

On Wed 22 Jul 13:10 PDT 2020, Sibi Sankar wrote:

> Add modem debug policy support which will enable coredumps and live
> debug support when the msadp firmware is present on secure devices.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> ---
> 
> v3:
>  * Fix dp_fw leak and create a separate func for dp load [Bjorn]
>  * Reset dp_size on mba_reclaim
> 
> v2:
>  * Use request_firmware_direct [Bjorn]
>  * Use Bjorn's template to show if debug policy is present
>  * Add size check to prevent memcpy out of bounds [Bjorn]
> 
>  drivers/remoteproc/qcom_q6v5_mss.c | 25 ++++++++++++++++++++++++-
>  1 file changed, 24 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> index f4aa61ba220dc..da99c8504a346 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> @@ -191,6 +191,7 @@ struct q6v5 {
>  	phys_addr_t mba_phys;
>  	void *mba_region;
>  	size_t mba_size;
> +	size_t dp_size;
>  
>  	phys_addr_t mpss_phys;
>  	phys_addr_t mpss_reloc;
> @@ -408,6 +409,21 @@ static int q6v5_xfer_mem_ownership(struct q6v5 *qproc, int *current_perm,
>  				   current_perm, next, perms);
>  }
>  
> +static void q6v5_debug_policy_load(struct q6v5 *qproc)
> +{
> +	const struct firmware *dp_fw;
> +
> +	if (request_firmware_direct(&dp_fw, "msadp", qproc->dev))
> +		return;
> +
> +	if (SZ_1M + dp_fw->size <= qproc->mba_size) {
> +		memcpy(qproc->mba_region + SZ_1M, dp_fw->data, dp_fw->size);
> +		qproc->dp_size = dp_fw->size;
> +	}
> +
> +	release_firmware(dp_fw);
> +}
> +
>  static int q6v5_load(struct rproc *rproc, const struct firmware *fw)
>  {
>  	struct q6v5 *qproc = rproc->priv;
> @@ -419,6 +435,7 @@ static int q6v5_load(struct rproc *rproc, const struct firmware *fw)
>  	}
>  
>  	memcpy(qproc->mba_region, fw->data, fw->size);
> +	q6v5_debug_policy_load(qproc);
>  
>  	return 0;
>  }
> @@ -928,6 +945,10 @@ static int q6v5_mba_load(struct q6v5 *qproc)
>  	}
>  
>  	writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG);
> +	if (qproc->dp_size) {
> +		writel(qproc->mba_phys + SZ_1M, qproc->rmb_base + RMB_PMI_CODE_START_REG);
> +		writel(qproc->dp_size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG);
> +	}
>  
>  	ret = q6v5proc_reset(qproc);
>  	if (ret)
> @@ -996,6 +1017,7 @@ static void q6v5_mba_reclaim(struct q6v5 *qproc)
>  	u32 val;
>  
>  	qproc->dump_mba_loaded = false;
> +	qproc->dp_size = 0;
>  
>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
>  	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
> @@ -1290,7 +1312,8 @@ static int q6v5_start(struct rproc *rproc)
>  	if (ret)
>  		return ret;
>  
> -	dev_info(qproc->dev, "MBA booted, loading mpss\n");
> +	dev_info(qproc->dev, "MBA booted with%s debug policy, loading mpss\n",
> +		 qproc->dp_size ? "" : "out");
>  
>  	ret = q6v5_mpss_load(qproc);
>  	if (ret)
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* Re: [PATCH v3 2/3] remoteproc: qcom_q6v5_mss: Validate modem blob firmware size before load
  2020-07-22 20:10 21% ` [PATCH v3 2/3] remoteproc: qcom_q6v5_mss: Validate modem blob " Sibi Sankar
@ 2020-07-28  6:04  0%   ` Bjorn Andersson
  0 siblings, 0 replies; 200+ results
From: Bjorn Andersson @ 2020-07-28  6:04 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, stable

On Wed 22 Jul 13:10 PDT 2020, Sibi Sankar wrote:

> The following mem abort is observed when one of the modem blob firmware
> size exceeds the allocated mpss region. Fix this by restricting the copy
> size to segment size using request_firmware_into_buf before load.
> 
> Err Logs:
> Unable to handle kernel paging request at virtual address
> Mem abort info:
> ...
> Call trace:
>   __memcpy+0x110/0x180
>   rproc_start+0xd0/0x190
>   rproc_boot+0x404/0x550
>   state_store+0x54/0xf8
>   dev_attr_store+0x44/0x60
>   sysfs_kf_write+0x58/0x80
>   kernfs_fop_write+0x140/0x230
>   vfs_write+0xc4/0x208
>   ksys_write+0x74/0xf8
> ...
> 
> Fixes: 051fb70fd4ea4 ("remoteproc: qcom: Driver for the self-authenticating Hexagon v5")
> Cc: stable@vger.kernel.org
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> ---
>  drivers/remoteproc/qcom_q6v5_mss.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> index 4e72c9e30426c..f4aa61ba220dc 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> @@ -1174,15 +1174,14 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
>  		} else if (phdr->p_filesz) {
>  			/* Replace "xxx.xxx" with "xxx.bxx" */
>  			sprintf(fw_name + fw_name_len - 3, "b%02d", i);
> -			ret = request_firmware(&seg_fw, fw_name, qproc->dev);
> +			ret = request_firmware_into_buf(&seg_fw, fw_name, qproc->dev,
> +							ptr, phdr->p_filesz);
>  			if (ret) {
>  				dev_err(qproc->dev, "failed to load %s\n", fw_name);
>  				iounmap(ptr);
>  				goto release_firmware;
>  			}
>  
> -			memcpy(ptr, seg_fw->data, seg_fw->size);
> -
>  			release_firmware(seg_fw);
>  		}
>  
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* Re: [RESEND v1] soc: qcom: pdr: Reorder the PD state indication ack
  @ 2020-07-28  6:08  0% ` Bjorn Andersson
  0 siblings, 0 replies; 200+ results
From: Bjorn Andersson @ 2020-07-28  6:08 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: rishabhb, agross, linux-arm-msm, linux-kernel, tsoni, sidgup, stable

On Wed 01 Jul 12:59 PDT 2020, Sibi Sankar wrote:

> The Protection Domains (PD) have a mechanism to keep its resources
> enabled until the PD down indication is acked. Reorder the PD state
> indication ack so that clients get to release the relevant resources
> before the PD goes down.
> 
> Fixes: fbe639b44a82 ("soc: qcom: Introduce Protection Domain Restart helpers")
> Reported-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> ---
> 
> I couldn't find the previous patch on patchworks. Resending the patch
> since it would need to land on stable trees as well
> 
>  drivers/soc/qcom/pdr_interface.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/soc/qcom/pdr_interface.c b/drivers/soc/qcom/pdr_interface.c
> index a90d707da6894..088dc99f77f3f 100644
> --- a/drivers/soc/qcom/pdr_interface.c
> +++ b/drivers/soc/qcom/pdr_interface.c
> @@ -279,13 +279,15 @@ static void pdr_indack_work(struct work_struct *work)
>  
>  	list_for_each_entry_safe(ind, tmp, &pdr->indack_list, node) {
>  		pds = ind->pds;
> -		pdr_send_indack_msg(pdr, pds, ind->transaction_id);
>  
>  		mutex_lock(&pdr->status_lock);
>  		pds->state = ind->curr_state;
>  		pdr->status(pds->state, pds->service_path, pdr->priv);
>  		mutex_unlock(&pdr->status_lock);
>  
> +		/* Ack the indication after clients release the PD resources */
> +		pdr_send_indack_msg(pdr, pds, ind->transaction_id);
> +
>  		mutex_lock(&pdr->list_lock);
>  		list_del(&ind->node);
>  		mutex_unlock(&pdr->list_lock);
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* Re: [PATCH 1/2] remoteproc: qcom: q6v5: Update running state before requesting stop
  @ 2020-07-28  6:19  0%       ` Bjorn Andersson
  0 siblings, 0 replies; 200+ results
From: Bjorn Andersson @ 2020-07-28  6:19 UTC (permalink / raw)
  To: Evan Green
  Cc: Sibi Sankar, Andy Gross, linux-arm-msm, linux-remoteproc, LKML,
	Ohad Ben Cohen, rohitkr, stable, linux-kernel-owner

On Wed 03 Jun 15:33 PDT 2020, Evan Green wrote:

> On Tue, Jun 2, 2020 at 10:29 PM Sibi Sankar <sibis@codeaurora.org> wrote:
> >
> > Evan,
> > Thanks for taking time to review
> > the series.
> >
> > On 2020-06-02 23:14, Evan Green wrote:
> > > On Tue, Jun 2, 2020 at 9:33 AM Sibi Sankar <sibis@codeaurora.org>
> > > wrote:
> > >>
> > >> Sometimes the stop triggers a watchdog rather than a stop-ack. Update
> > >> the running state to false on requesting stop to skip the watchdog
> > >> instead.
> > >>
> > >> Error Logs:
> > >> $ echo stop > /sys/class/remoteproc/remoteproc0/state
> > >> ipa 1e40000.ipa: received modem stopping event
> > >> remoteproc-modem: watchdog received: sys_m_smsm_mpss.c:291:APPS force
> > >> stop
> > >> qcom-q6v5-mss 4080000.remoteproc-modem: port failed halt
> > >> ipa 1e40000.ipa: received modem offline event
> > >> remoteproc0: stopped remote processor 4080000.remoteproc-modem
> > >>
> > >> Fixes: 3b415c8fb263 ("remoteproc: q6v5: Extract common resource
> > >> handling")
> > >> Cc: stable@vger.kernel.org
> > >> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> > >> ---
> > >
> > > Are you sure you want to tolerate this behavior from MSS? This is a
> > > graceful shutdown, modem shouldn't have a problem completing the
> > > proper handshake. If they do, isn't that a bug on the modem side?
> >
> > The graceful shutdown is achieved
> > though sysmon (enabled using
> > CONFIG_QCOM_SYSMON). When sysmon is
> > enabled we get a shutdown-ack when we
> > try to stop the modem, post which
> > request stop is a basically a nop.
> > Request stop is done to force stop
> > the modem during failure cases (like
> > rmtfs is not running and so on) and
> > we do want to mask the wdog that we get
> > during this scenario ( The locking
> > already prevents the servicing of the
> > wdog during shutdown, the check just
> > prevents the scheduling of crash handler
> > and err messages associated with it).
> > Also this check was always present and
> > was missed during common q6v5 resource
> > helper migration, hence the unused
> > running state in mss driver.
> 
> So you're saying that the intention of the ->running check already in
> q6v5_wdog_interrupt() was to allow either the stop-ack or wdog
> interrupt to complete the stop. This patch just fixes a regression
> introduced during the refactor.
> This patch seems ok to me then. It still sort of seems like a bug that
> the modem responds arbitrarily in one of two ways, even to a "harsh"
> shutdown request.
> 

I think the patch properly fixes this regression, but I share your
concern about the fact that we omit an entire category of
shutdown-related crashes from being reported.

The problem I presume with the current behavior is that the shutdown
will race against the crash handler - which might boot the remoteproc up
again while the shutdown is progressing.

So I'm okay with this fix for the immediate problem, but think it would
be nice if we could report the issue appropriately and then finalize the
shutdown.

> I wasn't aware of QCOM_SYSMON. Reading it now, It seems like kind of a
> lot... do I really need all this? Can I get by with just remoteproc
> stops?

It used to be that we set one bit in shared memory and sent an
interrupt and the modem would set another bit and interrupt us back when
it was done shutting down...

> Anyway, for this patch:
> 
> Reviewed-by: Evan Green <evgreen@chromium.org>

Thanks,
Bjorn

^ permalink raw reply	[relevance 0%]

* Re: [PATCH 2/2] remoteproc: qcom_q6v5_mss: Remove redundant running state
  @ 2020-07-28  6:20  0%   ` Bjorn Andersson
  0 siblings, 0 replies; 200+ results
From: Bjorn Andersson @ 2020-07-28  6:20 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: agross, linux-arm-msm, linux-remoteproc, linux-kernel, evgreen,
	ohad, rohitkr

On Tue 02 Jun 09:32 PDT 2020, Sibi Sankar wrote:

> Remove the redundant running state, as an equivalent is maintained in
> the common q6v5 resource handling helpers.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> ---
>  drivers/remoteproc/qcom_q6v5_mss.c | 5 -----
>  1 file changed, 5 deletions(-)
> 
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> index feb70283b6a21..702352cd66188 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
> @@ -178,8 +178,6 @@ struct q6v5 {
>  	int active_reg_count;
>  	int proxy_reg_count;
>  
> -	bool running;
> -
>  	bool dump_mba_loaded;
>  	unsigned long dump_segment_mask;
>  	unsigned long dump_complete_mask;
> @@ -1275,7 +1273,6 @@ static int q6v5_start(struct rproc *rproc)
>  
>  	/* Reset Dump Segment Mask */
>  	qproc->dump_segment_mask = 0;
> -	qproc->running = true;
>  
>  	return 0;
>  
> @@ -1290,8 +1287,6 @@ static int q6v5_stop(struct rproc *rproc)
>  	struct q6v5 *qproc = (struct q6v5 *)rproc->priv;
>  	int ret;
>  
> -	qproc->running = false;
> -
>  	ret = qcom_q6v5_request_stop(&qproc->q6v5);
>  	if (ret == -ETIMEDOUT)
>  		dev_err(qproc->dev, "timed out on wait\n");
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[relevance 0%]

* Re: [PATCH v3 1/7] dt-bindings: interconnect: single yaml file for RPMh interconnect drivers
  @ 2020-07-28 11:25 13%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-28 11:25 UTC (permalink / raw)
  To: Jonathan Marek
  Cc: linux-arm-msm, Andy Gross, Bjorn Andersson, Georgi Djakov,
	Rob Herring, Odelu Kukatla, linux-pm, devicetree, linux-kernel,
	linux-kernel-owner

On 2020-07-28 08:08, Jonathan Marek wrote:
> These two bindings are almost identical, so combine them into one. This
> will make it easier to add the sm8150 and sm8250 interconnect bindings.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>

Reviewed-by: Sibi Sankar <sibis@codeaurora.org>

> ---
>  .../{qcom,sdm845.yaml => qcom,rpmh.yaml}      | 20 ++++-
>  .../bindings/interconnect/qcom,sc7180.yaml    | 85 -------------------
>  2 files changed, 17 insertions(+), 88 deletions(-)
>  rename
> Documentation/devicetree/bindings/interconnect/{qcom,sdm845.yaml =>
> qcom,rpmh.yaml} (76%)
>  delete mode 100644
> Documentation/devicetree/bindings/interconnect/qcom,sc7180.yaml
> 
> diff --git
> a/Documentation/devicetree/bindings/interconnect/qcom,sdm845.yaml
> b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
> similarity index 76%
> rename from 
> Documentation/devicetree/bindings/interconnect/qcom,sdm845.yaml
> rename to Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
> index 74536747b51d..6a457f914bb5 100644
> --- a/Documentation/devicetree/bindings/interconnect/qcom,sdm845.yaml
> +++ b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
> @@ -1,16 +1,17 @@
>  # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>  %YAML 1.2
>  ---
> -$id: http://devicetree.org/schemas/interconnect/qcom,sdm845.yaml#
> +$id: http://devicetree.org/schemas/interconnect/qcom,rpmh.yaml#
>  $schema: http://devicetree.org/meta-schemas/core.yaml#
> 
> -title:  Qualcomm SDM845 Network-On-Chip Interconnect
> +title:  Qualcomm RPMh Network-On-Chip Interconnect
> 
>  maintainers:
>    - Georgi Djakov <georgi.djakov@linaro.org>
> +  - Odelu Kukatla <okukatla@codeaurora.org>
> 
>  description: |
> -   SDM845 interconnect providers support system bandwidth requirements 
> through
> +   RPMh interconnect providers support system bandwidth requirements 
> through
>     RPMh hardware accelerators known as Bus Clock Manager (BCM). The 
> provider is
>     able to communicate with the BCM through the Resource State
> Coordinator (RSC)
>     associated with each execution environment. Provider nodes must 
> point to at
> @@ -23,6 +24,19 @@ properties:
> 
>    compatible:
>      enum:
> +      - qcom,sc7180-aggre1-noc
> +      - qcom,sc7180-aggre2-noc
> +      - qcom,sc7180-camnoc-virt
> +      - qcom,sc7180-compute-noc
> +      - qcom,sc7180-config-noc
> +      - qcom,sc7180-dc-noc
> +      - qcom,sc7180-gem-noc
> +      - qcom,sc7180-ipa-virt
> +      - qcom,sc7180-mc-virt
> +      - qcom,sc7180-mmss-noc
> +      - qcom,sc7180-npu-noc
> +      - qcom,sc7180-qup-virt
> +      - qcom,sc7180-system-noc
>        - qcom,sdm845-aggre1-noc
>        - qcom,sdm845-aggre2-noc
>        - qcom,sdm845-config-noc
> diff --git
> a/Documentation/devicetree/bindings/interconnect/qcom,sc7180.yaml
> b/Documentation/devicetree/bindings/interconnect/qcom,sc7180.yaml
> deleted file mode 100644
> index d01bac80d416..000000000000
> --- a/Documentation/devicetree/bindings/interconnect/qcom,sc7180.yaml
> +++ /dev/null
> @@ -1,85 +0,0 @@
> -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> -%YAML 1.2
> ----
> -$id: http://devicetree.org/schemas/interconnect/qcom,sc7180.yaml#
> -$schema: http://devicetree.org/meta-schemas/core.yaml#
> -
> -title:  Qualcomm SC7180 Network-On-Chip Interconnect
> -
> -maintainers:
> -  - Odelu Kukatla <okukatla@codeaurora.org>
> -
> -description: |
> -   SC7180 interconnect providers support system bandwidth requirements 
> through
> -   RPMh hardware accelerators known as Bus Clock Manager (BCM). The 
> provider is
> -   able to communicate with the BCM through the Resource State
> Coordinator (RSC)
> -   associated with each execution environment. Provider nodes must 
> point to at
> -   least one RPMh device child node pertaining to their RSC and each 
> provider
> -   can map to multiple RPMh resources.
> -
> -properties:
> -  reg:
> -    maxItems: 1
> -
> -  compatible:
> -    enum:
> -      - qcom,sc7180-aggre1-noc
> -      - qcom,sc7180-aggre2-noc
> -      - qcom,sc7180-camnoc-virt
> -      - qcom,sc7180-compute-noc
> -      - qcom,sc7180-config-noc
> -      - qcom,sc7180-dc-noc
> -      - qcom,sc7180-gem-noc
> -      - qcom,sc7180-ipa-virt
> -      - qcom,sc7180-mc-virt
> -      - qcom,sc7180-mmss-noc
> -      - qcom,sc7180-npu-noc
> -      - qcom,sc7180-qup-virt
> -      - qcom,sc7180-system-noc
> -
> -  '#interconnect-cells':
> -    const: 1
> -
> -  qcom,bcm-voters:
> -    $ref: /schemas/types.yaml#/definitions/phandle-array
> -    description: |
> -      List of phandles to qcom,bcm-voter nodes that are required by
> -      this interconnect to send RPMh commands.
> -
> -  qcom,bcm-voter-names:
> -    $ref: /schemas/types.yaml#/definitions/string-array
> -    description: |
> -      Names for each of the qcom,bcm-voters specified.
> -
> -required:
> -  - compatible
> -  - reg
> -  - '#interconnect-cells'
> -  - qcom,bcm-voters
> -
> -additionalProperties: false
> -
> -examples:
> -  - |
> -      #include <dt-bindings/interconnect/qcom,sc7180.h>
> -
> -      config_noc: interconnect@1500000 {
> -            compatible = "qcom,sc7180-config-noc";
> -            reg = <0x01500000 0x28000>;
> -            #interconnect-cells = <1>;
> -            qcom,bcm-voters = <&apps_bcm_voter>;
> -      };
> -
> -      system_noc: interconnect@1620000 {
> -            compatible = "qcom,sc7180-system-noc";
> -            reg = <0x01620000 0x17080>;
> -            #interconnect-cells = <1>;
> -            qcom,bcm-voters = <&apps_bcm_voter>;
> -      };
> -
> -      mmss_noc: interconnect@1740000 {
> -            compatible = "qcom,sc7180-mmss-noc";
> -            reg = <0x01740000 0x1c100>;
> -            #interconnect-cells = <1>;
> -            qcom,bcm-voters = <&apps_bcm_voter>;
> -      };

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 13%]

* Re: [PATCH v3 2/7] dt-bindings: interconnect: Add Qualcomm SM8150 DT bindings
  @ 2020-07-28 11:26 13%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-28 11:26 UTC (permalink / raw)
  To: Jonathan Marek
  Cc: linux-arm-msm, Rob Herring, Andy Gross, Bjorn Andersson,
	Georgi Djakov, Rob Herring, Odelu Kukatla, linux-pm, devicetree,
	linux-kernel, linux-arm-msm-owner

On 2020-07-28 08:08, Jonathan Marek wrote:
> The Qualcomm SM8150 platform has several bus fabrics that could be
> controlled and tuned dynamically according to the bandwidth demand.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> Reviewed-by: Rob Herring <robh@kernel.org>

Reviewed-by: Sibi Sankar <sibis@codeaurora.org>

> ---
>  .../bindings/interconnect/qcom,rpmh.yaml      |  11 ++
>  .../dt-bindings/interconnect/qcom,sm8150.h    | 162 ++++++++++++++++++
>  2 files changed, 173 insertions(+)
>  create mode 100644 include/dt-bindings/interconnect/qcom,sm8150.h
> 
> diff --git
> a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
> b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
> index 6a457f914bb5..e95ccd7b4b5a 100644
> --- a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
> +++ b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
> @@ -45,6 +45,17 @@ properties:
>        - qcom,sdm845-mem-noc
>        - qcom,sdm845-mmss-noc
>        - qcom,sdm845-system-noc
> +      - qcom,sm8150-aggre1-noc
> +      - qcom,sm8150-aggre2-noc
> +      - qcom,sm8150-camnoc-noc
> +      - qcom,sm8150-compute-noc
> +      - qcom,sm8150-config-noc
> +      - qcom,sm8150-dc-noc
> +      - qcom,sm8150-gem-noc
> +      - qcom,sm8150-ipa-virt
> +      - qcom,sm8150-mc-virt
> +      - qcom,sm8150-mmss-noc
> +      - qcom,sm8150-system-noc
> 
>    '#interconnect-cells':
>      const: 1
> diff --git a/include/dt-bindings/interconnect/qcom,sm8150.h
> b/include/dt-bindings/interconnect/qcom,sm8150.h
> new file mode 100644
> index 000000000000..a25684680c42
> --- /dev/null
> +++ b/include/dt-bindings/interconnect/qcom,sm8150.h
> @@ -0,0 +1,162 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Qualcomm SM8150 interconnect IDs
> + *
> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> + */
> +
> +#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8150_H
> +#define __DT_BINDINGS_INTERCONNECT_QCOM_SM8150_H
> +
> +#define MASTER_A1NOC_CFG		0
> +#define MASTER_QUP_0			1
> +#define MASTER_EMAC			2
> +#define MASTER_UFS_MEM			3
> +#define MASTER_USB3			4
> +#define MASTER_USB3_1			5
> +#define A1NOC_SNOC_SLV			6
> +#define SLAVE_SERVICE_A1NOC		7
> +
> +#define MASTER_A2NOC_CFG		0
> +#define MASTER_QDSS_BAM			1
> +#define MASTER_QSPI			2
> +#define MASTER_QUP_1			3
> +#define MASTER_QUP_2			4
> +#define MASTER_SENSORS_AHB		5
> +#define MASTER_TSIF			6
> +#define MASTER_CNOC_A2NOC		7
> +#define MASTER_CRYPTO_CORE_0		8
> +#define MASTER_IPA			9
> +#define MASTER_PCIE			10
> +#define MASTER_PCIE_1			11
> +#define MASTER_QDSS_ETR			12
> +#define MASTER_SDCC_2			13
> +#define MASTER_SDCC_4			14
> +#define A2NOC_SNOC_SLV			15
> +#define SLAVE_ANOC_PCIE_GEM_NOC		16
> +#define SLAVE_SERVICE_A2NOC		17
> +
> +#define MASTER_CAMNOC_HF0_UNCOMP	0
> +#define MASTER_CAMNOC_HF1_UNCOMP	1
> +#define MASTER_CAMNOC_SF_UNCOMP		2
> +#define SLAVE_CAMNOC_UNCOMP		3
> +
> +#define MASTER_NPU			0
> +#define SLAVE_CDSP_MEM_NOC		1
> +
> +#define MASTER_SPDM			0
> +#define SNOC_CNOC_MAS			1
> +#define MASTER_QDSS_DAP			2
> +#define SLAVE_A1NOC_CFG			3
> +#define SLAVE_A2NOC_CFG			4
> +#define SLAVE_AHB2PHY_SOUTH		5
> +#define SLAVE_AOP			6
> +#define SLAVE_AOSS			7
> +#define SLAVE_CAMERA_CFG		8
> +#define SLAVE_CLK_CTL			9
> +#define SLAVE_CDSP_CFG			10
> +#define SLAVE_RBCPR_CX_CFG		11
> +#define SLAVE_RBCPR_MMCX_CFG		12
> +#define SLAVE_RBCPR_MX_CFG		13
> +#define SLAVE_CRYPTO_0_CFG		14
> +#define SLAVE_CNOC_DDRSS		15
> +#define SLAVE_DISPLAY_CFG		16
> +#define SLAVE_EMAC_CFG			17
> +#define SLAVE_GLM			18
> +#define SLAVE_GRAPHICS_3D_CFG		19
> +#define SLAVE_IMEM_CFG			20
> +#define SLAVE_IPA_CFG			21
> +#define SLAVE_CNOC_MNOC_CFG		22
> +#define SLAVE_NPU_CFG			23
> +#define SLAVE_PCIE_0_CFG		24
> +#define SLAVE_PCIE_1_CFG		25
> +#define SLAVE_NORTH_PHY_CFG		26
> +#define SLAVE_PIMEM_CFG			27
> +#define SLAVE_PRNG			28
> +#define SLAVE_QDSS_CFG			29
> +#define SLAVE_QSPI			30
> +#define SLAVE_QUP_2			31
> +#define SLAVE_QUP_1			32
> +#define SLAVE_QUP_0			33
> +#define SLAVE_SDCC_2			34
> +#define SLAVE_SDCC_4			35
> +#define SLAVE_SNOC_CFG			36
> +#define SLAVE_SPDM_WRAPPER		37
> +#define SLAVE_SPSS_CFG			38
> +#define SLAVE_SSC_CFG			39
> +#define SLAVE_TCSR			40
> +#define SLAVE_TLMM_EAST			41
> +#define SLAVE_TLMM_NORTH		42
> +#define SLAVE_TLMM_SOUTH		43
> +#define SLAVE_TLMM_WEST			44
> +#define SLAVE_TSIF			45
> +#define SLAVE_UFS_CARD_CFG		46
> +#define SLAVE_UFS_MEM_CFG		47
> +#define SLAVE_USB3			48
> +#define SLAVE_USB3_1			49
> +#define SLAVE_VENUS_CFG			50
> +#define SLAVE_VSENSE_CTRL_CFG		51
> +#define SLAVE_CNOC_A2NOC		52
> +#define SLAVE_SERVICE_CNOC		53
> +
> +#define MASTER_CNOC_DC_NOC		0
> +#define SLAVE_LLCC_CFG			1
> +#define SLAVE_GEM_NOC_CFG		2
> +
> +#define MASTER_AMPSS_M0			0
> +#define MASTER_GPU_TCU			1
> +#define MASTER_SYS_TCU			2
> +#define MASTER_GEM_NOC_CFG		3
> +#define MASTER_COMPUTE_NOC		4
> +#define MASTER_GRAPHICS_3D		5
> +#define MASTER_MNOC_HF_MEM_NOC		6
> +#define MASTER_MNOC_SF_MEM_NOC		7
> +#define MASTER_GEM_NOC_PCIE_SNOC	8
> +#define MASTER_SNOC_GC_MEM_NOC		9
> +#define MASTER_SNOC_SF_MEM_NOC		10
> +#define MASTER_ECC			11
> +#define SLAVE_MSS_PROC_MS_MPU_CFG	12
> +#define SLAVE_ECC			13
> +#define SLAVE_GEM_NOC_SNOC		14
> +#define SLAVE_LLCC			15
> +#define SLAVE_SERVICE_GEM_NOC		16
> +
> +#define MASTER_IPA_CORE			0
> +#define SLAVE_IPA_CORE			1
> +
> +#define MASTER_LLCC			0
> +#define SLAVE_EBI_CH0			1
> +
> +#define MASTER_CNOC_MNOC_CFG		0
> +#define MASTER_CAMNOC_HF0		1
> +#define MASTER_CAMNOC_HF1		2
> +#define MASTER_CAMNOC_SF		3
> +#define MASTER_MDP_PORT0		4
> +#define MASTER_MDP_PORT1		5
> +#define MASTER_ROTATOR			6
> +#define MASTER_VIDEO_P0			7
> +#define MASTER_VIDEO_P1			8
> +#define MASTER_VIDEO_PROC		9
> +#define SLAVE_MNOC_SF_MEM_NOC		10
> +#define SLAVE_MNOC_HF_MEM_NOC		11
> +#define SLAVE_SERVICE_MNOC		12
> +
> +#define MASTER_SNOC_CFG			0
> +#define A1NOC_SNOC_MAS			1
> +#define A2NOC_SNOC_MAS			2
> +#define MASTER_GEM_NOC_SNOC		3
> +#define MASTER_PIMEM			4
> +#define MASTER_GIC			5
> +#define SLAVE_APPSS			6
> +#define SNOC_CNOC_SLV			7
> +#define SLAVE_SNOC_GEM_NOC_GC		8
> +#define SLAVE_SNOC_GEM_NOC_SF		9
> +#define SLAVE_OCIMEM			10
> +#define SLAVE_PIMEM			11
> +#define SLAVE_SERVICE_SNOC		12
> +#define SLAVE_PCIE_0			13
> +#define SLAVE_PCIE_1			14
> +#define SLAVE_QDSS_STM			15
> +#define SLAVE_TCU			16
> +
> +#endif

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 13%]

* Re: [PATCH v3 3/7] dt-bindings: interconnect: Add Qualcomm SM8250 DT bindings
  @ 2020-07-28 11:28 13%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-28 11:28 UTC (permalink / raw)
  To: Jonathan Marek
  Cc: linux-arm-msm, Rob Herring, Andy Gross, Bjorn Andersson,
	Georgi Djakov, Rob Herring, Odelu Kukatla, linux-pm, devicetree,
	linux-kernel, linux-arm-msm-owner

On 2020-07-28 08:08, Jonathan Marek wrote:
> The Qualcomm SM8250 platform has several bus fabrics that could be
> controlled and tuned dynamically according to the bandwidth demand.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> Reviewed-by: Rob Herring <robh@kernel.org>

Reviewed-by: Sibi Sankar <sibis@codeaurora.org>

> ---
>  .../bindings/interconnect/qcom,rpmh.yaml      |  11 ++
>  .../dt-bindings/interconnect/qcom,sm8250.h    | 172 ++++++++++++++++++
>  2 files changed, 183 insertions(+)
>  create mode 100644 include/dt-bindings/interconnect/qcom,sm8250.h
> 
> diff --git
> a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
> b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
> index e95ccd7b4b5a..18c48a2ce191 100644
> --- a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
> +++ b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
> @@ -56,6 +56,17 @@ properties:
>        - qcom,sm8150-mc-virt
>        - qcom,sm8150-mmss-noc
>        - qcom,sm8150-system-noc
> +      - qcom,sm8250-aggre1-noc
> +      - qcom,sm8250-aggre2-noc
> +      - qcom,sm8250-compute-noc
> +      - qcom,sm8250-config-noc
> +      - qcom,sm8250-dc-noc
> +      - qcom,sm8250-gem-noc
> +      - qcom,sm8250-ipa-virt
> +      - qcom,sm8250-mc-virt
> +      - qcom,sm8250-mmss-noc
> +      - qcom,sm8250-npu-noc
> +      - qcom,sm8250-system-noc
> 
>    '#interconnect-cells':
>      const: 1
> diff --git a/include/dt-bindings/interconnect/qcom,sm8250.h
> b/include/dt-bindings/interconnect/qcom,sm8250.h
> new file mode 100644
> index 000000000000..1b4d9fbe888d
> --- /dev/null
> +++ b/include/dt-bindings/interconnect/qcom,sm8250.h
> @@ -0,0 +1,172 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Qualcomm SM8250 interconnect IDs
> + *
> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> + */
> +
> +#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8250_H
> +#define __DT_BINDINGS_INTERCONNECT_QCOM_SM8250_H
> +
> +#define MASTER_A1NOC_CFG		0
> +#define MASTER_QSPI_0			1
> +#define MASTER_QUP_1			2
> +#define MASTER_QUP_2			3
> +#define MASTER_TSIF			4
> +#define MASTER_PCIE_2			5
> +#define MASTER_SDCC_4			6
> +#define MASTER_UFS_MEM			7
> +#define MASTER_USB3			8
> +#define MASTER_USB3_1			9
> +#define A1NOC_SNOC_SLV			10
> +#define SLAVE_ANOC_PCIE_GEM_NOC_1	11
> +#define SLAVE_SERVICE_A1NOC		12
> +
> +#define MASTER_A2NOC_CFG		0
> +#define MASTER_QDSS_BAM			1
> +#define MASTER_QUP_0			2
> +#define MASTER_CNOC_A2NOC		3
> +#define MASTER_CRYPTO_CORE_0		4
> +#define MASTER_IPA			5
> +#define MASTER_PCIE			6
> +#define MASTER_PCIE_1			7
> +#define MASTER_QDSS_ETR			8
> +#define MASTER_SDCC_2			9
> +#define MASTER_UFS_CARD			10
> +#define A2NOC_SNOC_SLV			11
> +#define SLAVE_ANOC_PCIE_GEM_NOC		12
> +#define SLAVE_SERVICE_A2NOC		13
> +
> +#define MASTER_NPU			0
> +#define SLAVE_CDSP_MEM_NOC		1
> +
> +#define SNOC_CNOC_MAS			0
> +#define MASTER_QDSS_DAP			1
> +#define SLAVE_A1NOC_CFG			2
> +#define SLAVE_A2NOC_CFG			3
> +#define SLAVE_AHB2PHY_SOUTH		4
> +#define SLAVE_AHB2PHY_NORTH		5
> +#define SLAVE_AOSS			6
> +#define SLAVE_CAMERA_CFG		7
> +#define SLAVE_CLK_CTL			8
> +#define SLAVE_CDSP_CFG			9
> +#define SLAVE_RBCPR_CX_CFG		10
> +#define SLAVE_RBCPR_MMCX_CFG		11
> +#define SLAVE_RBCPR_MX_CFG		12
> +#define SLAVE_CRYPTO_0_CFG		13
> +#define SLAVE_CX_RDPM			14
> +#define SLAVE_DCC_CFG			15
> +#define SLAVE_CNOC_DDRSS		16
> +#define SLAVE_DISPLAY_CFG		17
> +#define SLAVE_GRAPHICS_3D_CFG		18
> +#define SLAVE_IMEM_CFG			19
> +#define SLAVE_IPA_CFG			20
> +#define SLAVE_IPC_ROUTER_CFG		21
> +#define SLAVE_LPASS			22
> +#define SLAVE_CNOC_MNOC_CFG		23
> +#define SLAVE_NPU_CFG			24
> +#define SLAVE_PCIE_0_CFG		25
> +#define SLAVE_PCIE_1_CFG		26
> +#define SLAVE_PCIE_2_CFG		27
> +#define SLAVE_PDM			28
> +#define SLAVE_PIMEM_CFG			29
> +#define SLAVE_PRNG			30
> +#define SLAVE_QDSS_CFG			31
> +#define SLAVE_QSPI_0			32
> +#define SLAVE_QUP_0			33
> +#define SLAVE_QUP_1			34
> +#define SLAVE_QUP_2			35
> +#define SLAVE_SDCC_2			36
> +#define SLAVE_SDCC_4			37
> +#define SLAVE_SNOC_CFG			38
> +#define SLAVE_TCSR			39
> +#define SLAVE_TLMM_NORTH		40
> +#define SLAVE_TLMM_SOUTH		41
> +#define SLAVE_TLMM_WEST			42
> +#define SLAVE_TSIF			43
> +#define SLAVE_UFS_CARD_CFG		44
> +#define SLAVE_UFS_MEM_CFG		45
> +#define SLAVE_USB3			46
> +#define SLAVE_USB3_1			47
> +#define SLAVE_VENUS_CFG			48
> +#define SLAVE_VSENSE_CTRL_CFG		49
> +#define SLAVE_CNOC_A2NOC		50
> +#define SLAVE_SERVICE_CNOC		51
> +
> +#define MASTER_CNOC_DC_NOC		0
> +#define SLAVE_LLCC_CFG			1
> +#define SLAVE_GEM_NOC_CFG		2
> +
> +#define MASTER_GPU_TCU			0
> +#define MASTER_SYS_TCU			1
> +#define MASTER_AMPSS_M0			2
> +#define MASTER_GEM_NOC_CFG		3
> +#define MASTER_COMPUTE_NOC		4
> +#define MASTER_GRAPHICS_3D		5
> +#define MASTER_MNOC_HF_MEM_NOC		6
> +#define MASTER_MNOC_SF_MEM_NOC		7
> +#define MASTER_ANOC_PCIE_GEM_NOC	8
> +#define MASTER_SNOC_GC_MEM_NOC		9
> +#define MASTER_SNOC_SF_MEM_NOC		10
> +#define SLAVE_GEM_NOC_SNOC		11
> +#define SLAVE_LLCC			12
> +#define SLAVE_MEM_NOC_PCIE_SNOC		13
> +#define SLAVE_SERVICE_GEM_NOC_1		14
> +#define SLAVE_SERVICE_GEM_NOC_2		15
> +#define SLAVE_SERVICE_GEM_NOC		16
> +
> +#define MASTER_IPA_CORE			0
> +#define SLAVE_IPA_CORE			1
> +
> +#define MASTER_LLCC			0
> +#define SLAVE_EBI_CH0			1
> +
> +#define MASTER_CNOC_MNOC_CFG		0
> +#define MASTER_CAMNOC_HF		1
> +#define MASTER_CAMNOC_ICP		2
> +#define MASTER_CAMNOC_SF		3
> +#define MASTER_VIDEO_P0			4
> +#define MASTER_VIDEO_P1			5
> +#define MASTER_VIDEO_PROC		6
> +#define MASTER_MDP_PORT0		7
> +#define MASTER_MDP_PORT1		8
> +#define MASTER_ROTATOR			9
> +#define SLAVE_MNOC_HF_MEM_NOC		10
> +#define SLAVE_MNOC_SF_MEM_NOC		11
> +#define SLAVE_SERVICE_MNOC		12
> +
> +#define MASTER_NPU_SYS			0
> +#define MASTER_NPU_CDP			1
> +#define MASTER_NPU_NOC_CFG		2
> +#define SLAVE_NPU_CAL_DP0		3
> +#define SLAVE_NPU_CAL_DP1		4
> +#define SLAVE_NPU_CP			5
> +#define SLAVE_NPU_INT_DMA_BWMON_CFG	6
> +#define SLAVE_NPU_DPM			7
> +#define SLAVE_ISENSE_CFG		8
> +#define SLAVE_NPU_LLM_CFG		9
> +#define SLAVE_NPU_TCM			10
> +#define SLAVE_NPU_COMPUTE_NOC		11
> +#define SLAVE_SERVICE_NPU_NOC		12
> +
> +#define MASTER_SNOC_CFG			0
> +#define A1NOC_SNOC_MAS			1
> +#define A2NOC_SNOC_MAS			2
> +#define MASTER_GEM_NOC_SNOC		3
> +#define MASTER_GEM_NOC_PCIE_SNOC	4
> +#define MASTER_PIMEM			5
> +#define MASTER_GIC			6
> +#define SLAVE_APPSS			7
> +#define SNOC_CNOC_SLV			8
> +#define SLAVE_SNOC_GEM_NOC_GC		9
> +#define SLAVE_SNOC_GEM_NOC_SF		10
> +#define SLAVE_OCIMEM			11
> +#define SLAVE_PIMEM			12
> +#define SLAVE_SERVICE_SNOC		13
> +#define SLAVE_PCIE_0			14
> +#define SLAVE_PCIE_1			15
> +#define SLAVE_PCIE_2			16
> +#define SLAVE_QDSS_STM			17
> +#define SLAVE_TCU			18
> +
> +#endif

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 13%]

* Re: [PATCH v3 4/7] interconnect: qcom: Add SM8150 interconnect provider driver
  @ 2020-07-28 11:30 13%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-28 11:30 UTC (permalink / raw)
  To: Jonathan Marek
  Cc: linux-arm-msm, Andy Gross, Bjorn Andersson, Georgi Djakov,
	linux-kernel, linux-pm, linux-kernel-owner

On 2020-07-28 08:08, Jonathan Marek wrote:
> Add driver for the Qualcomm interconnect buses found in SM8150 based
> platforms. The topology consists of several NoCs that are controlled by
> a remote processor that collects the aggregated bandwidth for each
> master-slave pairs.
> 
> Based on SC7180 driver and generated from downstream dts.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>

Reviewed-by: Sibi Sankar <sibis@codeaurora.org>

> ---
>  drivers/interconnect/qcom/Kconfig  |  10 +
>  drivers/interconnect/qcom/Makefile |   2 +
>  drivers/interconnect/qcom/sm8150.c | 635 +++++++++++++++++++++++++++++
>  drivers/interconnect/qcom/sm8150.h | 152 +++++++
>  4 files changed, 799 insertions(+)
>  create mode 100644 drivers/interconnect/qcom/sm8150.c
>  create mode 100644 drivers/interconnect/qcom/sm8150.h
> 
> diff --git a/drivers/interconnect/qcom/Kconfig
> b/drivers/interconnect/qcom/Kconfig
> index a88f2f07bc27..25486de5a38d 100644
> --- a/drivers/interconnect/qcom/Kconfig
> +++ b/drivers/interconnect/qcom/Kconfig
> @@ -65,5 +65,15 @@ config INTERCONNECT_QCOM_SDM845
>  	  This is a driver for the Qualcomm Network-on-Chip on sdm845-based
>  	  platforms.
> 
> +config INTERCONNECT_QCOM_SM8150
> +	tristate "Qualcomm SM8150 interconnect driver"
> +	depends on INTERCONNECT_QCOM
> +	depends on (QCOM_RPMH && QCOM_COMMAND_DB && OF) || COMPILE_TEST
> +	select INTERCONNECT_QCOM_RPMH
> +	select INTERCONNECT_QCOM_BCM_VOTER
> +	help
> +	  This is a driver for the Qualcomm Network-on-Chip on sm8150-based
> +	  platforms.
> +
>  config INTERCONNECT_QCOM_SMD_RPM
>  	tristate
> diff --git a/drivers/interconnect/qcom/Makefile
> b/drivers/interconnect/qcom/Makefile
> index 3a047fe6e45a..1702ece67dc5 100644
> --- a/drivers/interconnect/qcom/Makefile
> +++ b/drivers/interconnect/qcom/Makefile
> @@ -8,6 +8,7 @@ qnoc-qcs404-objs			:= qcs404.o
>  icc-rpmh-obj				:= icc-rpmh.o
>  qnoc-sc7180-objs			:= sc7180.o
>  qnoc-sdm845-objs			:= sdm845.o
> +qnoc-sm8150-objs			:= sm8150.o
>  icc-smd-rpm-objs			:= smd-rpm.o
> 
>  obj-$(CONFIG_INTERCONNECT_QCOM_BCM_VOTER) += icc-bcm-voter.o
> @@ -18,4 +19,5 @@ obj-$(CONFIG_INTERCONNECT_QCOM_QCS404) += 
> qnoc-qcs404.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_RPMH) += icc-rpmh.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_SC7180) += qnoc-sc7180.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_SDM845) += qnoc-sdm845.o
> +obj-$(CONFIG_INTERCONNECT_QCOM_SM8150) += qnoc-sm8150.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_SMD_RPM) += icc-smd-rpm.o
> diff --git a/drivers/interconnect/qcom/sm8150.c
> b/drivers/interconnect/qcom/sm8150.c
> new file mode 100644
> index 000000000000..9218efed04a0
> --- /dev/null
> +++ b/drivers/interconnect/qcom/sm8150.c
> @@ -0,0 +1,635 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> + *
> + */
> +
> +#include <linux/device.h>
> +#include <linux/interconnect.h>
> +#include <linux/interconnect-provider.h>
> +#include <linux/module.h>
> +#include <linux/of_platform.h>
> +#include <dt-bindings/interconnect/qcom,sm8150.h>
> +
> +#include "bcm-voter.h"
> +#include "icc-rpmh.h"
> +#include "sm8150.h"
> +
> +DEFINE_QNODE(qhm_a1noc_cfg, SM8150_MASTER_A1NOC_CFG, 1, 4,
> SM8150_SLAVE_SERVICE_A1NOC);
> +DEFINE_QNODE(qhm_qup0, SM8150_MASTER_QUP_0, 1, 4, 
> SM8150_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_emac, SM8150_MASTER_EMAC, 1, 8, 
> SM8150_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_ufs_mem, SM8150_MASTER_UFS_MEM, 1, 8, 
> SM8150_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_usb3_0, SM8150_MASTER_USB3, 1, 8, 
> SM8150_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_usb3_1, SM8150_MASTER_USB3_1, 1, 8, 
> SM8150_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_a2noc_cfg, SM8150_MASTER_A2NOC_CFG, 1, 4,
> SM8150_SLAVE_SERVICE_A2NOC);
> +DEFINE_QNODE(qhm_qdss_bam, SM8150_MASTER_QDSS_BAM, 1, 4,
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_qspi, SM8150_MASTER_QSPI, 1, 4, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_qup1, SM8150_MASTER_QUP_1, 1, 4, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_qup2, SM8150_MASTER_QUP_2, 1, 4, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_sensorss_ahb, SM8150_MASTER_SENSORS_AHB, 1, 4,
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_tsif, SM8150_MASTER_TSIF, 1, 4, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qnm_cnoc, SM8150_MASTER_CNOC_A2NOC, 1, 8, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qxm_crypto, SM8150_MASTER_CRYPTO_CORE_0, 1, 8,
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qxm_ipa, SM8150_MASTER_IPA, 1, 8, SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_pcie3_0, SM8150_MASTER_PCIE, 1, 8,
> SM8150_SLAVE_ANOC_PCIE_GEM_NOC);
> +DEFINE_QNODE(xm_pcie3_1, SM8150_MASTER_PCIE_1, 1, 8,
> SM8150_SLAVE_ANOC_PCIE_GEM_NOC);
> +DEFINE_QNODE(xm_qdss_etr, SM8150_MASTER_QDSS_ETR, 1, 8, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_sdc2, SM8150_MASTER_SDCC_2, 1, 8, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_sdc4, SM8150_MASTER_SDCC_4, 1, 8, 
> SM8150_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qxm_camnoc_hf0_uncomp, SM8150_MASTER_CAMNOC_HF0_UNCOMP,
> 1, 32, SM8150_SLAVE_CAMNOC_UNCOMP);
> +DEFINE_QNODE(qxm_camnoc_hf1_uncomp, SM8150_MASTER_CAMNOC_HF1_UNCOMP,
> 1, 32, SM8150_SLAVE_CAMNOC_UNCOMP);
> +DEFINE_QNODE(qxm_camnoc_sf_uncomp, SM8150_MASTER_CAMNOC_SF_UNCOMP, 1,
> 32, SM8150_SLAVE_CAMNOC_UNCOMP);
> +DEFINE_QNODE(qnm_npu, SM8150_MASTER_NPU, 1, 32, 
> SM8150_SLAVE_CDSP_MEM_NOC);
> +DEFINE_QNODE(qhm_spdm, SM8150_MASTER_SPDM, 1, 4, 
> SM8150_SLAVE_CNOC_A2NOC);
> +DEFINE_QNODE(qnm_snoc, SM8150_SNOC_CNOC_MAS, 1, 8,
> SM8150_SLAVE_TLMM_SOUTH, SM8150_SLAVE_CDSP_CFG, SM8150_SLAVE_SPSS_CFG,
> SM8150_SLAVE_CAMERA_CFG, SM8150_SLAVE_SDCC_4, SM8150_SLAVE_SDCC_2,
> SM8150_SLAVE_CNOC_MNOC_CFG, SM8150_SLAVE_EMAC_CFG,
> SM8150_SLAVE_UFS_MEM_CFG, SM8150_SLAVE_TLMM_EAST,
> SM8150_SLAVE_SSC_CFG, SM8150_SLAVE_SNOC_CFG,
> SM8150_SLAVE_NORTH_PHY_CFG, SM8150_SLAVE_QUP_0, SM8150_SLAVE_GLM,
> SM8150_SLAVE_PCIE_1_CFG, SM8150_SLAVE_A2NOC_CFG,
> SM8150_SLAVE_QDSS_CFG, SM8150_SLAVE_DISPLAY_CFG, SM8150_SLAVE_TCSR,
> SM8150_SLAVE_CNOC_DDRSS, SM8150_SLAVE_RBCPR_MMCX_CFG,
> SM8150_SLAVE_NPU_CFG, SM8150_SLAVE_PCIE_0_CFG,
> SM8150_SLAVE_GRAPHICS_3D_CFG, SM8150_SLAVE_VENUS_CFG,
> SM8150_SLAVE_TSIF, SM8150_SLAVE_IPA_CFG, SM8150_SLAVE_CLK_CTL,
> SM8150_SLAVE_AOP, SM8150_SLAVE_QUP_1, SM8150_SLAVE_AHB2PHY_SOUTH,
> SM8150_SLAVE_USB3_1, SM8150_SLAVE_SERVICE_CNOC,
> SM8150_SLAVE_UFS_CARD_CFG, SM8150_SLAVE_QUP_2,
> SM8150_SLAVE_RBCPR_CX_CFG, SM8150_SLAVE_TLMM_WEST,
> SM8150_SLAVE_A1NOC_CFG, SM8150_SLAVE_AOSS, SM8150_SLAVE_PRNG,
> SM8150_SLAVE_VSENSE_CTRL_CFG, SM8150_SLAVE_QSPI, SM8150_SLAVE_USB3,
> SM8150_SLAVE_SPDM_WRAPPER, SM8150_SLAVE_CRYPTO_0_CFG,
> SM8150_SLAVE_PIMEM_CFG, SM8150_SLAVE_TLMM_NORTH,
> SM8150_SLAVE_RBCPR_MX_CFG, SM8150_SLAVE_IMEM_CFG);
> +DEFINE_QNODE(xm_qdss_dap, SM8150_MASTER_QDSS_DAP, 1, 8,
> SM8150_SLAVE_TLMM_SOUTH, SM8150_SLAVE_CDSP_CFG, SM8150_SLAVE_SPSS_CFG,
> SM8150_SLAVE_CAMERA_CFG, SM8150_SLAVE_SDCC_4, SM8150_SLAVE_SDCC_2,
> SM8150_SLAVE_CNOC_MNOC_CFG, SM8150_SLAVE_EMAC_CFG,
> SM8150_SLAVE_UFS_MEM_CFG, SM8150_SLAVE_TLMM_EAST,
> SM8150_SLAVE_SSC_CFG, SM8150_SLAVE_SNOC_CFG,
> SM8150_SLAVE_NORTH_PHY_CFG, SM8150_SLAVE_QUP_0, SM8150_SLAVE_GLM,
> SM8150_SLAVE_PCIE_1_CFG, SM8150_SLAVE_A2NOC_CFG,
> SM8150_SLAVE_QDSS_CFG, SM8150_SLAVE_DISPLAY_CFG, SM8150_SLAVE_TCSR,
> SM8150_SLAVE_CNOC_DDRSS, SM8150_SLAVE_CNOC_A2NOC,
> SM8150_SLAVE_RBCPR_MMCX_CFG, SM8150_SLAVE_NPU_CFG,
> SM8150_SLAVE_PCIE_0_CFG, SM8150_SLAVE_GRAPHICS_3D_CFG,
> SM8150_SLAVE_VENUS_CFG, SM8150_SLAVE_TSIF, SM8150_SLAVE_IPA_CFG,
> SM8150_SLAVE_CLK_CTL, SM8150_SLAVE_AOP, SM8150_SLAVE_QUP_1,
> SM8150_SLAVE_AHB2PHY_SOUTH, SM8150_SLAVE_USB3_1,
> SM8150_SLAVE_SERVICE_CNOC, SM8150_SLAVE_UFS_CARD_CFG,
> SM8150_SLAVE_QUP_2, SM8150_SLAVE_RBCPR_CX_CFG, SM8150_SLAVE_TLMM_WEST,
> SM8150_SLAVE_A1NOC_CFG, SM8150_SLAVE_AOSS, SM8150_SLAVE_PRNG,
> SM8150_SLAVE_VSENSE_CTRL_CFG, SM8150_SLAVE_QSPI, SM8150_SLAVE_USB3,
> SM8150_SLAVE_SPDM_WRAPPER, SM8150_SLAVE_CRYPTO_0_CFG,
> SM8150_SLAVE_PIMEM_CFG, SM8150_SLAVE_TLMM_NORTH,
> SM8150_SLAVE_RBCPR_MX_CFG, SM8150_SLAVE_IMEM_CFG);
> +DEFINE_QNODE(qhm_cnoc_dc_noc, SM8150_MASTER_CNOC_DC_NOC, 1, 4,
> SM8150_SLAVE_GEM_NOC_CFG, SM8150_SLAVE_LLCC_CFG);
> +DEFINE_QNODE(acm_apps, SM8150_MASTER_AMPSS_M0, 2, 32,
> SM8150_SLAVE_ECC, SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(acm_gpu_tcu, SM8150_MASTER_GPU_TCU, 1, 8,
> SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(acm_sys_tcu, SM8150_MASTER_SYS_TCU, 1, 8,
> SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qhm_gemnoc_cfg, SM8150_MASTER_GEM_NOC_CFG, 1, 4,
> SM8150_SLAVE_SERVICE_GEM_NOC, SM8150_SLAVE_MSS_PROC_MS_MPU_CFG);
> +DEFINE_QNODE(qnm_cmpnoc, SM8150_MASTER_COMPUTE_NOC, 2, 32,
> SM8150_SLAVE_ECC, SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_gpu, SM8150_MASTER_GRAPHICS_3D, 2, 32,
> SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_mnoc_hf, SM8150_MASTER_MNOC_HF_MEM_NOC, 2, 32,
> SM8150_SLAVE_LLCC);
> +DEFINE_QNODE(qnm_mnoc_sf, SM8150_MASTER_MNOC_SF_MEM_NOC, 1, 32,
> SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_pcie, SM8150_MASTER_GEM_NOC_PCIE_SNOC, 1, 16,
> SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_snoc_gc, SM8150_MASTER_SNOC_GC_MEM_NOC, 1, 8,
> SM8150_SLAVE_LLCC);
> +DEFINE_QNODE(qnm_snoc_sf, SM8150_MASTER_SNOC_SF_MEM_NOC, 1, 16,
> SM8150_SLAVE_LLCC);
> +DEFINE_QNODE(qxm_ecc, SM8150_MASTER_ECC, 2, 32, SM8150_SLAVE_LLCC);
> +DEFINE_QNODE(ipa_core_master, SM8150_MASTER_IPA_CORE, 1, 8,
> SM8150_SLAVE_IPA_CORE);
> +DEFINE_QNODE(llcc_mc, SM8150_MASTER_LLCC, 4, 4, SM8150_SLAVE_EBI_CH0);
> +DEFINE_QNODE(qhm_mnoc_cfg, SM8150_MASTER_CNOC_MNOC_CFG, 1, 4,
> SM8150_SLAVE_SERVICE_MNOC);
> +DEFINE_QNODE(qxm_camnoc_hf0, SM8150_MASTER_CAMNOC_HF0, 1, 32,
> SM8150_SLAVE_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qxm_camnoc_hf1, SM8150_MASTER_CAMNOC_HF1, 1, 32,
> SM8150_SLAVE_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qxm_camnoc_sf, SM8150_MASTER_CAMNOC_SF, 1, 32,
> SM8150_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qxm_mdp0, SM8150_MASTER_MDP_PORT0, 1, 32,
> SM8150_SLAVE_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qxm_mdp1, SM8150_MASTER_MDP_PORT1, 1, 32,
> SM8150_SLAVE_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qxm_rot, SM8150_MASTER_ROTATOR, 1, 32,
> SM8150_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qxm_venus0, SM8150_MASTER_VIDEO_P0, 1, 32,
> SM8150_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qxm_venus1, SM8150_MASTER_VIDEO_P1, 1, 32,
> SM8150_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qxm_venus_arm9, SM8150_MASTER_VIDEO_PROC, 1, 8,
> SM8150_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qhm_snoc_cfg, SM8150_MASTER_SNOC_CFG, 1, 4,
> SM8150_SLAVE_SERVICE_SNOC);
> +DEFINE_QNODE(qnm_aggre1_noc, SM8150_A1NOC_SNOC_MAS, 1, 16,
> SM8150_SLAVE_SNOC_GEM_NOC_SF, SM8150_SLAVE_PIMEM, SM8150_SLAVE_OCIMEM,
> SM8150_SLAVE_APPSS, SM8150_SNOC_CNOC_SLV, SM8150_SLAVE_QDSS_STM);
> +DEFINE_QNODE(qnm_aggre2_noc, SM8150_A2NOC_SNOC_MAS, 1, 16,
> SM8150_SLAVE_SNOC_GEM_NOC_SF, SM8150_SLAVE_PIMEM, SM8150_SLAVE_OCIMEM,
> SM8150_SLAVE_APPSS, SM8150_SNOC_CNOC_SLV, SM8150_SLAVE_PCIE_0,
> SM8150_SLAVE_PCIE_1, SM8150_SLAVE_TCU, SM8150_SLAVE_QDSS_STM);
> +DEFINE_QNODE(qnm_gemnoc, SM8150_MASTER_GEM_NOC_SNOC, 1, 8,
> SM8150_SLAVE_PIMEM, SM8150_SLAVE_OCIMEM, SM8150_SLAVE_APPSS,
> SM8150_SNOC_CNOC_SLV, SM8150_SLAVE_TCU, SM8150_SLAVE_QDSS_STM);
> +DEFINE_QNODE(qxm_pimem, SM8150_MASTER_PIMEM, 1, 8,
> SM8150_SLAVE_SNOC_GEM_NOC_GC, SM8150_SLAVE_OCIMEM);
> +DEFINE_QNODE(xm_gic, SM8150_MASTER_GIC, 1, 8,
> SM8150_SLAVE_SNOC_GEM_NOC_GC, SM8150_SLAVE_OCIMEM);
> +DEFINE_QNODE(qns_a1noc_snoc, SM8150_A1NOC_SNOC_SLV, 1, 16,
> SM8150_A1NOC_SNOC_MAS);
> +DEFINE_QNODE(srvc_aggre1_noc, SM8150_SLAVE_SERVICE_A1NOC, 1, 4);
> +DEFINE_QNODE(qns_a2noc_snoc, SM8150_A2NOC_SNOC_SLV, 1, 16,
> SM8150_A2NOC_SNOC_MAS);
> +DEFINE_QNODE(qns_pcie_mem_noc, SM8150_SLAVE_ANOC_PCIE_GEM_NOC, 1, 16,
> SM8150_MASTER_GEM_NOC_PCIE_SNOC);
> +DEFINE_QNODE(srvc_aggre2_noc, SM8150_SLAVE_SERVICE_A2NOC, 1, 4);
> +DEFINE_QNODE(qns_camnoc_uncomp, SM8150_SLAVE_CAMNOC_UNCOMP, 1, 32);
> +DEFINE_QNODE(qns_cdsp_mem_noc, SM8150_SLAVE_CDSP_MEM_NOC, 2, 32,
> SM8150_MASTER_COMPUTE_NOC);
> +DEFINE_QNODE(qhs_a1_noc_cfg, SM8150_SLAVE_A1NOC_CFG, 1, 4,
> SM8150_MASTER_A1NOC_CFG);
> +DEFINE_QNODE(qhs_a2_noc_cfg, SM8150_SLAVE_A2NOC_CFG, 1, 4,
> SM8150_MASTER_A2NOC_CFG);
> +DEFINE_QNODE(qhs_ahb2phy_south, SM8150_SLAVE_AHB2PHY_SOUTH, 1, 4);
> +DEFINE_QNODE(qhs_aop, SM8150_SLAVE_AOP, 1, 4);
> +DEFINE_QNODE(qhs_aoss, SM8150_SLAVE_AOSS, 1, 4);
> +DEFINE_QNODE(qhs_camera_cfg, SM8150_SLAVE_CAMERA_CFG, 1, 4);
> +DEFINE_QNODE(qhs_clk_ctl, SM8150_SLAVE_CLK_CTL, 1, 4);
> +DEFINE_QNODE(qhs_compute_dsp, SM8150_SLAVE_CDSP_CFG, 1, 4);
> +DEFINE_QNODE(qhs_cpr_cx, SM8150_SLAVE_RBCPR_CX_CFG, 1, 4);
> +DEFINE_QNODE(qhs_cpr_mmcx, SM8150_SLAVE_RBCPR_MMCX_CFG, 1, 4);
> +DEFINE_QNODE(qhs_cpr_mx, SM8150_SLAVE_RBCPR_MX_CFG, 1, 4);
> +DEFINE_QNODE(qhs_crypto0_cfg, SM8150_SLAVE_CRYPTO_0_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ddrss_cfg, SM8150_SLAVE_CNOC_DDRSS, 1, 4,
> SM8150_MASTER_CNOC_DC_NOC);
> +DEFINE_QNODE(qhs_display_cfg, SM8150_SLAVE_DISPLAY_CFG, 1, 4);
> +DEFINE_QNODE(qhs_emac_cfg, SM8150_SLAVE_EMAC_CFG, 1, 4);
> +DEFINE_QNODE(qhs_glm, SM8150_SLAVE_GLM, 1, 4);
> +DEFINE_QNODE(qhs_gpuss_cfg, SM8150_SLAVE_GRAPHICS_3D_CFG, 1, 8);
> +DEFINE_QNODE(qhs_imem_cfg, SM8150_SLAVE_IMEM_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ipa, SM8150_SLAVE_IPA_CFG, 1, 4);
> +DEFINE_QNODE(qhs_mnoc_cfg, SM8150_SLAVE_CNOC_MNOC_CFG, 1, 4,
> SM8150_MASTER_CNOC_MNOC_CFG);
> +DEFINE_QNODE(qhs_npu_cfg, SM8150_SLAVE_NPU_CFG, 1, 4);
> +DEFINE_QNODE(qhs_pcie0_cfg, SM8150_SLAVE_PCIE_0_CFG, 1, 4);
> +DEFINE_QNODE(qhs_pcie1_cfg, SM8150_SLAVE_PCIE_1_CFG, 1, 4);
> +DEFINE_QNODE(qhs_phy_refgen_north, SM8150_SLAVE_NORTH_PHY_CFG, 1, 4);
> +DEFINE_QNODE(qhs_pimem_cfg, SM8150_SLAVE_PIMEM_CFG, 1, 4);
> +DEFINE_QNODE(qhs_prng, SM8150_SLAVE_PRNG, 1, 4);
> +DEFINE_QNODE(qhs_qdss_cfg, SM8150_SLAVE_QDSS_CFG, 1, 4);
> +DEFINE_QNODE(qhs_qspi, SM8150_SLAVE_QSPI, 1, 4);
> +DEFINE_QNODE(qhs_qupv3_east, SM8150_SLAVE_QUP_2, 1, 4);
> +DEFINE_QNODE(qhs_qupv3_north, SM8150_SLAVE_QUP_1, 1, 4);
> +DEFINE_QNODE(qhs_qupv3_south, SM8150_SLAVE_QUP_0, 1, 4);
> +DEFINE_QNODE(qhs_sdc2, SM8150_SLAVE_SDCC_2, 1, 4);
> +DEFINE_QNODE(qhs_sdc4, SM8150_SLAVE_SDCC_4, 1, 4);
> +DEFINE_QNODE(qhs_snoc_cfg, SM8150_SLAVE_SNOC_CFG, 1, 4,
> SM8150_MASTER_SNOC_CFG);
> +DEFINE_QNODE(qhs_spdm, SM8150_SLAVE_SPDM_WRAPPER, 1, 4);
> +DEFINE_QNODE(qhs_spss_cfg, SM8150_SLAVE_SPSS_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ssc_cfg, SM8150_SLAVE_SSC_CFG, 1, 4);
> +DEFINE_QNODE(qhs_tcsr, SM8150_SLAVE_TCSR, 1, 4);
> +DEFINE_QNODE(qhs_tlmm_east, SM8150_SLAVE_TLMM_EAST, 1, 4);
> +DEFINE_QNODE(qhs_tlmm_north, SM8150_SLAVE_TLMM_NORTH, 1, 4);
> +DEFINE_QNODE(qhs_tlmm_south, SM8150_SLAVE_TLMM_SOUTH, 1, 4);
> +DEFINE_QNODE(qhs_tlmm_west, SM8150_SLAVE_TLMM_WEST, 1, 4);
> +DEFINE_QNODE(qhs_tsif, SM8150_SLAVE_TSIF, 1, 4);
> +DEFINE_QNODE(qhs_ufs_card_cfg, SM8150_SLAVE_UFS_CARD_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ufs_mem_cfg, SM8150_SLAVE_UFS_MEM_CFG, 1, 4);
> +DEFINE_QNODE(qhs_usb3_0, SM8150_SLAVE_USB3, 1, 4);
> +DEFINE_QNODE(qhs_usb3_1, SM8150_SLAVE_USB3_1, 1, 4);
> +DEFINE_QNODE(qhs_venus_cfg, SM8150_SLAVE_VENUS_CFG, 1, 4);
> +DEFINE_QNODE(qhs_vsense_ctrl_cfg, SM8150_SLAVE_VSENSE_CTRL_CFG, 1, 4);
> +DEFINE_QNODE(qns_cnoc_a2noc, SM8150_SLAVE_CNOC_A2NOC, 1, 8,
> SM8150_MASTER_CNOC_A2NOC);
> +DEFINE_QNODE(srvc_cnoc, SM8150_SLAVE_SERVICE_CNOC, 1, 4);
> +DEFINE_QNODE(qhs_llcc, SM8150_SLAVE_LLCC_CFG, 1, 4);
> +DEFINE_QNODE(qhs_memnoc, SM8150_SLAVE_GEM_NOC_CFG, 1, 4,
> SM8150_MASTER_GEM_NOC_CFG);
> +DEFINE_QNODE(qhs_mdsp_ms_mpu_cfg, SM8150_SLAVE_MSS_PROC_MS_MPU_CFG, 1, 
> 4);
> +DEFINE_QNODE(qns_ecc, SM8150_SLAVE_ECC, 1, 32);
> +DEFINE_QNODE(qns_gem_noc_snoc, SM8150_SLAVE_GEM_NOC_SNOC, 1, 8,
> SM8150_MASTER_GEM_NOC_SNOC);
> +DEFINE_QNODE(qns_llcc, SM8150_SLAVE_LLCC, 4, 16, SM8150_MASTER_LLCC);
> +DEFINE_QNODE(srvc_gemnoc, SM8150_SLAVE_SERVICE_GEM_NOC, 1, 4);
> +DEFINE_QNODE(ipa_core_slave, SM8150_SLAVE_IPA_CORE, 1, 8);
> +DEFINE_QNODE(ebi, SM8150_SLAVE_EBI_CH0, 4, 4);
> +DEFINE_QNODE(qns2_mem_noc, SM8150_SLAVE_MNOC_SF_MEM_NOC, 1, 32,
> SM8150_MASTER_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qns_mem_noc_hf, SM8150_SLAVE_MNOC_HF_MEM_NOC, 2, 32,
> SM8150_MASTER_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(srvc_mnoc, SM8150_SLAVE_SERVICE_MNOC, 1, 4);
> +DEFINE_QNODE(qhs_apss, SM8150_SLAVE_APPSS, 1, 8);
> +DEFINE_QNODE(qns_cnoc, SM8150_SNOC_CNOC_SLV, 1, 8, 
> SM8150_SNOC_CNOC_MAS);
> +DEFINE_QNODE(qns_gemnoc_gc, SM8150_SLAVE_SNOC_GEM_NOC_GC, 1, 8,
> SM8150_MASTER_SNOC_GC_MEM_NOC);
> +DEFINE_QNODE(qns_gemnoc_sf, SM8150_SLAVE_SNOC_GEM_NOC_SF, 1, 16,
> SM8150_MASTER_SNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qxs_imem, SM8150_SLAVE_OCIMEM, 1, 8);
> +DEFINE_QNODE(qxs_pimem, SM8150_SLAVE_PIMEM, 1, 8);
> +DEFINE_QNODE(srvc_snoc, SM8150_SLAVE_SERVICE_SNOC, 1, 4);
> +DEFINE_QNODE(xs_pcie_0, SM8150_SLAVE_PCIE_0, 1, 8);
> +DEFINE_QNODE(xs_pcie_1, SM8150_SLAVE_PCIE_1, 1, 8);
> +DEFINE_QNODE(xs_qdss_stm, SM8150_SLAVE_QDSS_STM, 1, 4);
> +DEFINE_QNODE(xs_sys_tcu_cfg, SM8150_SLAVE_TCU, 1, 8);
> +
> +DEFINE_QBCM(bcm_acv, "ACV", false, &ebi);
> +DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
> +DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc);
> +DEFINE_QBCM(bcm_mm0, "MM0", true, &qns_mem_noc_hf);
> +DEFINE_QBCM(bcm_mm1, "MM1", false, &qxm_camnoc_hf0_uncomp,
> &qxm_camnoc_hf1_uncomp, &qxm_camnoc_sf_uncomp, &qxm_camnoc_hf0,
> &qxm_camnoc_hf1, &qxm_mdp0, &qxm_mdp1);
> +DEFINE_QBCM(bcm_sh2, "SH2", false, &qns_gem_noc_snoc);
> +DEFINE_QBCM(bcm_mm2, "MM2", false, &qxm_camnoc_sf, &qns2_mem_noc);
> +DEFINE_QBCM(bcm_sh3, "SH3", false, &acm_gpu_tcu, &acm_sys_tcu);
> +DEFINE_QBCM(bcm_mm3, "MM3", false, &qxm_rot, &qxm_venus0,
> &qxm_venus1, &qxm_venus_arm9);
> +DEFINE_QBCM(bcm_sh4, "SH4", false, &qnm_cmpnoc);
> +DEFINE_QBCM(bcm_sh5, "SH5", false, &acm_apps);
> +DEFINE_QBCM(bcm_sn0, "SN0", true, &qns_gemnoc_sf);
> +DEFINE_QBCM(bcm_co0, "CO0", false, &qns_cdsp_mem_noc);
> +DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto);
> +DEFINE_QBCM(bcm_sn1, "SN1", false, &qxs_imem);
> +DEFINE_QBCM(bcm_co1, "CO1", false, &qnm_npu);
> +DEFINE_QBCM(bcm_ip0, "IP0", false, &ipa_core_slave);
> +DEFINE_QBCM(bcm_cn0, "CN0", true, &qhm_spdm, &qnm_snoc,
> &qhs_a1_noc_cfg, &qhs_a2_noc_cfg, &qhs_ahb2phy_south, &qhs_aop,
> &qhs_aoss, &qhs_camera_cfg, &qhs_clk_ctl, &qhs_compute_dsp,
> &qhs_cpr_cx, &qhs_cpr_mmcx, &qhs_cpr_mx, &qhs_crypto0_cfg,
> &qhs_ddrss_cfg, &qhs_display_cfg, &qhs_emac_cfg, &qhs_glm,
> &qhs_gpuss_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_mnoc_cfg, &qhs_npu_cfg,
> &qhs_pcie0_cfg, &qhs_pcie1_cfg, &qhs_phy_refgen_north, &qhs_pimem_cfg,
> &qhs_prng, &qhs_qdss_cfg, &qhs_qspi, &qhs_qupv3_east,
> &qhs_qupv3_north, &qhs_qupv3_south, &qhs_sdc2, &qhs_sdc4,
> &qhs_snoc_cfg, &qhs_spdm, &qhs_spss_cfg, &qhs_ssc_cfg, &qhs_tcsr,
> &qhs_tlmm_east, &qhs_tlmm_north, &qhs_tlmm_south, &qhs_tlmm_west,
> &qhs_tsif, &qhs_ufs_card_cfg, &qhs_ufs_mem_cfg, &qhs_usb3_0,
> &qhs_usb3_1, &qhs_venus_cfg, &qhs_vsense_ctrl_cfg, &qns_cnoc_a2noc,
> &srvc_cnoc);
> +DEFINE_QBCM(bcm_qup0, "QUP0", false, &qhm_qup0, &qhm_qup1, &qhm_qup2);
> +DEFINE_QBCM(bcm_sn2, "SN2", false, &qns_gemnoc_gc);
> +DEFINE_QBCM(bcm_sn3, "SN3", false, &srvc_aggre1_noc,
> &srvc_aggre2_noc, &qns_cnoc);
> +DEFINE_QBCM(bcm_sn4, "SN4", false, &qxs_pimem);
> +DEFINE_QBCM(bcm_sn5, "SN5", false, &xs_qdss_stm);
> +DEFINE_QBCM(bcm_sn8, "SN8", false, &xs_pcie_0, &xs_pcie_1);
> +DEFINE_QBCM(bcm_sn9, "SN9", false, &qnm_aggre1_noc);
> +DEFINE_QBCM(bcm_sn11, "SN11", false, &qnm_aggre2_noc);
> +DEFINE_QBCM(bcm_sn12, "SN12", false, &qxm_pimem, &xm_gic);
> +DEFINE_QBCM(bcm_sn14, "SN14", false, &qns_pcie_mem_noc);
> +DEFINE_QBCM(bcm_sn15, "SN15", false, &qnm_gemnoc);
> +
> +static struct qcom_icc_bcm *aggre1_noc_bcms[] = {
> +	&bcm_qup0,
> +	&bcm_sn3,
> +};
> +
> +static struct qcom_icc_node *aggre1_noc_nodes[] = {
> +	[MASTER_A1NOC_CFG] = &qhm_a1noc_cfg,
> +	[MASTER_QUP_0] = &qhm_qup0,
> +	[MASTER_EMAC] = &xm_emac,
> +	[MASTER_UFS_MEM] = &xm_ufs_mem,
> +	[MASTER_USB3] = &xm_usb3_0,
> +	[MASTER_USB3_1] = &xm_usb3_1,
> +	[A1NOC_SNOC_SLV] = &qns_a1noc_snoc,
> +	[SLAVE_SERVICE_A1NOC] = &srvc_aggre1_noc,
> +};
> +
> +static struct qcom_icc_desc sm8150_aggre1_noc = {
> +	.nodes = aggre1_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(aggre1_noc_nodes),
> +	.bcms = aggre1_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(aggre1_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *aggre2_noc_bcms[] = {
> +	&bcm_ce0,
> +	&bcm_qup0,
> +	&bcm_sn14,
> +	&bcm_sn3,
> +};
> +
> +static struct qcom_icc_node *aggre2_noc_nodes[] = {
> +	[MASTER_A2NOC_CFG] = &qhm_a2noc_cfg,
> +	[MASTER_QDSS_BAM] = &qhm_qdss_bam,
> +	[MASTER_QSPI] = &qhm_qspi,
> +	[MASTER_QUP_1] = &qhm_qup1,
> +	[MASTER_QUP_2] = &qhm_qup2,
> +	[MASTER_SENSORS_AHB] = &qhm_sensorss_ahb,
> +	[MASTER_TSIF] = &qhm_tsif,
> +	[MASTER_CNOC_A2NOC] = &qnm_cnoc,
> +	[MASTER_CRYPTO_CORE_0] = &qxm_crypto,
> +	[MASTER_IPA] = &qxm_ipa,
> +	[MASTER_PCIE] = &xm_pcie3_0,
> +	[MASTER_PCIE_1] = &xm_pcie3_1,
> +	[MASTER_QDSS_ETR] = &xm_qdss_etr,
> +	[MASTER_SDCC_2] = &xm_sdc2,
> +	[MASTER_SDCC_4] = &xm_sdc4,
> +	[A2NOC_SNOC_SLV] = &qns_a2noc_snoc,
> +	[SLAVE_ANOC_PCIE_GEM_NOC] = &qns_pcie_mem_noc,
> +	[SLAVE_SERVICE_A2NOC] = &srvc_aggre2_noc,
> +};
> +
> +static struct qcom_icc_desc sm8150_aggre2_noc = {
> +	.nodes = aggre2_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(aggre2_noc_nodes),
> +	.bcms = aggre2_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(aggre2_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *camnoc_virt_bcms[] = {
> +	&bcm_mm1,
> +};
> +
> +static struct qcom_icc_node *camnoc_virt_nodes[] = {
> +	[MASTER_CAMNOC_HF0_UNCOMP] = &qxm_camnoc_hf0_uncomp,
> +	[MASTER_CAMNOC_HF1_UNCOMP] = &qxm_camnoc_hf1_uncomp,
> +	[MASTER_CAMNOC_SF_UNCOMP] = &qxm_camnoc_sf_uncomp,
> +	[SLAVE_CAMNOC_UNCOMP] = &qns_camnoc_uncomp,
> +};
> +
> +static struct qcom_icc_desc sm8150_camnoc_virt = {
> +	.nodes = camnoc_virt_nodes,
> +	.num_nodes = ARRAY_SIZE(camnoc_virt_nodes),
> +	.bcms = camnoc_virt_bcms,
> +	.num_bcms = ARRAY_SIZE(camnoc_virt_bcms),
> +};
> +
> +static struct qcom_icc_bcm *compute_noc_bcms[] = {
> +	&bcm_co0,
> +	&bcm_co1,
> +};
> +
> +static struct qcom_icc_node *compute_noc_nodes[] = {
> +	[MASTER_NPU] = &qnm_npu,
> +	[SLAVE_CDSP_MEM_NOC] = &qns_cdsp_mem_noc,
> +};
> +
> +static struct qcom_icc_desc sm8150_compute_noc = {
> +	.nodes = compute_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(compute_noc_nodes),
> +	.bcms = compute_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(compute_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *config_noc_bcms[] = {
> +	&bcm_cn0,
> +};
> +
> +static struct qcom_icc_node *config_noc_nodes[] = {
> +	[MASTER_SPDM] = &qhm_spdm,
> +	[SNOC_CNOC_MAS] = &qnm_snoc,
> +	[MASTER_QDSS_DAP] = &xm_qdss_dap,
> +	[SLAVE_A1NOC_CFG] = &qhs_a1_noc_cfg,
> +	[SLAVE_A2NOC_CFG] = &qhs_a2_noc_cfg,
> +	[SLAVE_AHB2PHY_SOUTH] = &qhs_ahb2phy_south,
> +	[SLAVE_AOP] = &qhs_aop,
> +	[SLAVE_AOSS] = &qhs_aoss,
> +	[SLAVE_CAMERA_CFG] = &qhs_camera_cfg,
> +	[SLAVE_CLK_CTL] = &qhs_clk_ctl,
> +	[SLAVE_CDSP_CFG] = &qhs_compute_dsp,
> +	[SLAVE_RBCPR_CX_CFG] = &qhs_cpr_cx,
> +	[SLAVE_RBCPR_MMCX_CFG] = &qhs_cpr_mmcx,
> +	[SLAVE_RBCPR_MX_CFG] = &qhs_cpr_mx,
> +	[SLAVE_CRYPTO_0_CFG] = &qhs_crypto0_cfg,
> +	[SLAVE_CNOC_DDRSS] = &qhs_ddrss_cfg,
> +	[SLAVE_DISPLAY_CFG] = &qhs_display_cfg,
> +	[SLAVE_EMAC_CFG] = &qhs_emac_cfg,
> +	[SLAVE_GLM] = &qhs_glm,
> +	[SLAVE_GRAPHICS_3D_CFG] = &qhs_gpuss_cfg,
> +	[SLAVE_IMEM_CFG] = &qhs_imem_cfg,
> +	[SLAVE_IPA_CFG] = &qhs_ipa,
> +	[SLAVE_CNOC_MNOC_CFG] = &qhs_mnoc_cfg,
> +	[SLAVE_NPU_CFG] = &qhs_npu_cfg,
> +	[SLAVE_PCIE_0_CFG] = &qhs_pcie0_cfg,
> +	[SLAVE_PCIE_1_CFG] = &qhs_pcie1_cfg,
> +	[SLAVE_NORTH_PHY_CFG] = &qhs_phy_refgen_north,
> +	[SLAVE_PIMEM_CFG] = &qhs_pimem_cfg,
> +	[SLAVE_PRNG] = &qhs_prng,
> +	[SLAVE_QDSS_CFG] = &qhs_qdss_cfg,
> +	[SLAVE_QSPI] = &qhs_qspi,
> +	[SLAVE_QUP_2] = &qhs_qupv3_east,
> +	[SLAVE_QUP_1] = &qhs_qupv3_north,
> +	[SLAVE_QUP_0] = &qhs_qupv3_south,
> +	[SLAVE_SDCC_2] = &qhs_sdc2,
> +	[SLAVE_SDCC_4] = &qhs_sdc4,
> +	[SLAVE_SNOC_CFG] = &qhs_snoc_cfg,
> +	[SLAVE_SPDM_WRAPPER] = &qhs_spdm,
> +	[SLAVE_SPSS_CFG] = &qhs_spss_cfg,
> +	[SLAVE_SSC_CFG] = &qhs_ssc_cfg,
> +	[SLAVE_TCSR] = &qhs_tcsr,
> +	[SLAVE_TLMM_EAST] = &qhs_tlmm_east,
> +	[SLAVE_TLMM_NORTH] = &qhs_tlmm_north,
> +	[SLAVE_TLMM_SOUTH] = &qhs_tlmm_south,
> +	[SLAVE_TLMM_WEST] = &qhs_tlmm_west,
> +	[SLAVE_TSIF] = &qhs_tsif,
> +	[SLAVE_UFS_CARD_CFG] = &qhs_ufs_card_cfg,
> +	[SLAVE_UFS_MEM_CFG] = &qhs_ufs_mem_cfg,
> +	[SLAVE_USB3] = &qhs_usb3_0,
> +	[SLAVE_USB3_1] = &qhs_usb3_1,
> +	[SLAVE_VENUS_CFG] = &qhs_venus_cfg,
> +	[SLAVE_VSENSE_CTRL_CFG] = &qhs_vsense_ctrl_cfg,
> +	[SLAVE_CNOC_A2NOC] = &qns_cnoc_a2noc,
> +	[SLAVE_SERVICE_CNOC] = &srvc_cnoc,
> +};
> +
> +static struct qcom_icc_desc sm8150_config_noc = {
> +	.nodes = config_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(config_noc_nodes),
> +	.bcms = config_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(config_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *dc_noc_bcms[] = {
> +};
> +
> +static struct qcom_icc_node *dc_noc_nodes[] = {
> +	[MASTER_CNOC_DC_NOC] = &qhm_cnoc_dc_noc,
> +	[SLAVE_LLCC_CFG] = &qhs_llcc,
> +	[SLAVE_GEM_NOC_CFG] = &qhs_memnoc,
> +};
> +
> +static struct qcom_icc_desc sm8150_dc_noc = {
> +	.nodes = dc_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(dc_noc_nodes),
> +	.bcms = dc_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(dc_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *gem_noc_bcms[] = {
> +	&bcm_sh0,
> +	&bcm_sh2,
> +	&bcm_sh3,
> +	&bcm_sh4,
> +	&bcm_sh5,
> +};
> +
> +static struct qcom_icc_node *gem_noc_nodes[] = {
> +	[MASTER_AMPSS_M0] = &acm_apps,
> +	[MASTER_GPU_TCU] = &acm_gpu_tcu,
> +	[MASTER_SYS_TCU] = &acm_sys_tcu,
> +	[MASTER_GEM_NOC_CFG] = &qhm_gemnoc_cfg,
> +	[MASTER_COMPUTE_NOC] = &qnm_cmpnoc,
> +	[MASTER_GRAPHICS_3D] = &qnm_gpu,
> +	[MASTER_MNOC_HF_MEM_NOC] = &qnm_mnoc_hf,
> +	[MASTER_MNOC_SF_MEM_NOC] = &qnm_mnoc_sf,
> +	[MASTER_GEM_NOC_PCIE_SNOC] = &qnm_pcie,
> +	[MASTER_SNOC_GC_MEM_NOC] = &qnm_snoc_gc,
> +	[MASTER_SNOC_SF_MEM_NOC] = &qnm_snoc_sf,
> +	[MASTER_ECC] = &qxm_ecc,
> +	[SLAVE_MSS_PROC_MS_MPU_CFG] = &qhs_mdsp_ms_mpu_cfg,
> +	[SLAVE_ECC] = &qns_ecc,
> +	[SLAVE_GEM_NOC_SNOC] = &qns_gem_noc_snoc,
> +	[SLAVE_LLCC] = &qns_llcc,
> +	[SLAVE_SERVICE_GEM_NOC] = &srvc_gemnoc,
> +};
> +
> +static struct qcom_icc_desc sm8150_gem_noc = {
> +	.nodes = gem_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(gem_noc_nodes),
> +	.bcms = gem_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(gem_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *ipa_virt_bcms[] = {
> +	&bcm_ip0,
> +};
> +
> +static struct qcom_icc_node *ipa_virt_nodes[] = {
> +	[MASTER_IPA_CORE] = &ipa_core_master,
> +	[SLAVE_IPA_CORE] = &ipa_core_slave,
> +};
> +
> +static struct qcom_icc_desc sm8150_ipa_virt = {
> +	.nodes = ipa_virt_nodes,
> +	.num_nodes = ARRAY_SIZE(ipa_virt_nodes),
> +	.bcms = ipa_virt_bcms,
> +	.num_bcms = ARRAY_SIZE(ipa_virt_bcms),
> +};
> +
> +static struct qcom_icc_bcm *mc_virt_bcms[] = {
> +	&bcm_acv,
> +	&bcm_mc0,
> +};
> +
> +static struct qcom_icc_node *mc_virt_nodes[] = {
> +	[MASTER_LLCC] = &llcc_mc,
> +	[SLAVE_EBI_CH0] = &ebi,
> +};
> +
> +static struct qcom_icc_desc sm8150_mc_virt = {
> +	.nodes = mc_virt_nodes,
> +	.num_nodes = ARRAY_SIZE(mc_virt_nodes),
> +	.bcms = mc_virt_bcms,
> +	.num_bcms = ARRAY_SIZE(mc_virt_bcms),
> +};
> +
> +static struct qcom_icc_bcm *mmss_noc_bcms[] = {
> +	&bcm_mm0,
> +	&bcm_mm1,
> +	&bcm_mm2,
> +	&bcm_mm3,
> +};
> +
> +static struct qcom_icc_node *mmss_noc_nodes[] = {
> +	[MASTER_CNOC_MNOC_CFG] = &qhm_mnoc_cfg,
> +	[MASTER_CAMNOC_HF0] = &qxm_camnoc_hf0,
> +	[MASTER_CAMNOC_HF1] = &qxm_camnoc_hf1,
> +	[MASTER_CAMNOC_SF] = &qxm_camnoc_sf,
> +	[MASTER_MDP_PORT0] = &qxm_mdp0,
> +	[MASTER_MDP_PORT1] = &qxm_mdp1,
> +	[MASTER_ROTATOR] = &qxm_rot,
> +	[MASTER_VIDEO_P0] = &qxm_venus0,
> +	[MASTER_VIDEO_P1] = &qxm_venus1,
> +	[MASTER_VIDEO_PROC] = &qxm_venus_arm9,
> +	[SLAVE_MNOC_SF_MEM_NOC] = &qns2_mem_noc,
> +	[SLAVE_MNOC_HF_MEM_NOC] = &qns_mem_noc_hf,
> +	[SLAVE_SERVICE_MNOC] = &srvc_mnoc,
> +};
> +
> +static struct qcom_icc_desc sm8150_mmss_noc = {
> +	.nodes = mmss_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(mmss_noc_nodes),
> +	.bcms = mmss_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(mmss_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *system_noc_bcms[] = {
> +	&bcm_sn0,
> +	&bcm_sn1,
> +	&bcm_sn11,
> +	&bcm_sn12,
> +	&bcm_sn15,
> +	&bcm_sn2,
> +	&bcm_sn3,
> +	&bcm_sn4,
> +	&bcm_sn5,
> +	&bcm_sn8,
> +	&bcm_sn9,
> +};
> +
> +static struct qcom_icc_node *system_noc_nodes[] = {
> +	[MASTER_SNOC_CFG] = &qhm_snoc_cfg,
> +	[A1NOC_SNOC_MAS] = &qnm_aggre1_noc,
> +	[A2NOC_SNOC_MAS] = &qnm_aggre2_noc,
> +	[MASTER_GEM_NOC_SNOC] = &qnm_gemnoc,
> +	[MASTER_PIMEM] = &qxm_pimem,
> +	[MASTER_GIC] = &xm_gic,
> +	[SLAVE_APPSS] = &qhs_apss,
> +	[SNOC_CNOC_SLV] = &qns_cnoc,
> +	[SLAVE_SNOC_GEM_NOC_GC] = &qns_gemnoc_gc,
> +	[SLAVE_SNOC_GEM_NOC_SF] = &qns_gemnoc_sf,
> +	[SLAVE_OCIMEM] = &qxs_imem,
> +	[SLAVE_PIMEM] = &qxs_pimem,
> +	[SLAVE_SERVICE_SNOC] = &srvc_snoc,
> +	[SLAVE_PCIE_0] = &xs_pcie_0,
> +	[SLAVE_PCIE_1] = &xs_pcie_1,
> +	[SLAVE_QDSS_STM] = &xs_qdss_stm,
> +	[SLAVE_TCU] = &xs_sys_tcu_cfg,
> +};
> +
> +static struct qcom_icc_desc sm8150_system_noc = {
> +	.nodes = system_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(system_noc_nodes),
> +	.bcms = system_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(system_noc_bcms),
> +};
> +
> +static int qnoc_probe(struct platform_device *pdev)
> +{
> +	const struct qcom_icc_desc *desc;
> +	struct icc_onecell_data *data;
> +	struct icc_provider *provider;
> +	struct qcom_icc_node **qnodes;
> +	struct qcom_icc_provider *qp;
> +	struct icc_node *node;
> +	size_t num_nodes, i;
> +	int ret;
> +
> +	desc = device_get_match_data(&pdev->dev);
> +	if (!desc)
> +		return -EINVAL;
> +
> +	qnodes = desc->nodes;
> +	num_nodes = desc->num_nodes;
> +
> +	qp = devm_kzalloc(&pdev->dev, sizeof(*qp), GFP_KERNEL);
> +	if (!qp)
> +		return -ENOMEM;
> +
> +	data = devm_kcalloc(&pdev->dev, num_nodes, sizeof(*node), 
> GFP_KERNEL);
> +	if (!data)
> +		return -ENOMEM;
> +
> +	provider = &qp->provider;
> +	provider->dev = &pdev->dev;
> +	provider->set = qcom_icc_set;
> +	provider->pre_aggregate = qcom_icc_pre_aggregate;
> +	provider->aggregate = qcom_icc_aggregate;
> +	provider->xlate = of_icc_xlate_onecell;
> +	INIT_LIST_HEAD(&provider->nodes);
> +	provider->data = data;
> +
> +	qp->dev = &pdev->dev;
> +	qp->bcms = desc->bcms;
> +	qp->num_bcms = desc->num_bcms;
> +
> +	qp->voter = of_bcm_voter_get(qp->dev, NULL);
> +	if (IS_ERR(qp->voter))
> +		return PTR_ERR(qp->voter);
> +
> +	ret = icc_provider_add(provider);
> +	if (ret) {
> +		dev_err(&pdev->dev, "error adding interconnect provider\n");
> +		return ret;
> +	}
> +
> +	for (i = 0; i < num_nodes; i++) {
> +		size_t j;
> +
> +		if (!qnodes[i])
> +			continue;
> +
> +		node = icc_node_create(qnodes[i]->id);
> +		if (IS_ERR(node)) {
> +			ret = PTR_ERR(node);
> +			goto err;
> +		}
> +
> +		node->name = qnodes[i]->name;
> +		node->data = qnodes[i];
> +		icc_node_add(node, provider);
> +
> +		for (j = 0; j < qnodes[i]->num_links; j++)
> +			icc_link_create(node, qnodes[i]->links[j]);
> +
> +		data->nodes[i] = node;
> +	}
> +	data->num_nodes = num_nodes;
> +
> +	for (i = 0; i < qp->num_bcms; i++)
> +		qcom_icc_bcm_init(qp->bcms[i], &pdev->dev);
> +
> +	platform_set_drvdata(pdev, qp);
> +
> +	return 0;
> +err:
> +	icc_nodes_remove(provider);
> +	icc_provider_del(provider);
> +	return ret;
> +}
> +
> +static int qnoc_remove(struct platform_device *pdev)
> +{
> +	struct qcom_icc_provider *qp = platform_get_drvdata(pdev);
> +
> +	icc_nodes_remove(&qp->provider);
> +	return icc_provider_del(&qp->provider);
> +}
> +
> +static const struct of_device_id qnoc_of_match[] = {
> +	{ .compatible = "qcom,sm8150-aggre1-noc",
> +	  .data = &sm8150_aggre1_noc},
> +	{ .compatible = "qcom,sm8150-aggre2-noc",
> +	  .data = &sm8150_aggre2_noc},
> +	{ .compatible = "qcom,sm8150-camnoc-virt",
> +	  .data = &sm8150_camnoc_virt},
> +	{ .compatible = "qcom,sm8150-compute-noc",
> +	  .data = &sm8150_compute_noc},
> +	{ .compatible = "qcom,sm8150-config-noc",
> +	  .data = &sm8150_config_noc},
> +	{ .compatible = "qcom,sm8150-dc-noc",
> +	  .data = &sm8150_dc_noc},
> +	{ .compatible = "qcom,sm8150-gem-noc",
> +	  .data = &sm8150_gem_noc},
> +	{ .compatible = "qcom,sm8150-ipa-virt",
> +	  .data = &sm8150_ipa_virt},
> +	{ .compatible = "qcom,sm8150-mc-virt",
> +	  .data = &sm8150_mc_virt},
> +	{ .compatible = "qcom,sm8150-mmss-noc",
> +	  .data = &sm8150_mmss_noc},
> +	{ .compatible = "qcom,sm8150-system-noc",
> +	  .data = &sm8150_system_noc},
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(of, qnoc_of_match);
> +
> +static struct platform_driver qnoc_driver = {
> +	.probe = qnoc_probe,
> +	.remove = qnoc_remove,
> +	.driver = {
> +		.name = "qnoc-sm8150",
> +		.of_match_table = qnoc_of_match,
> +	},
> +};
> +module_platform_driver(qnoc_driver);
> +
> +MODULE_DESCRIPTION("Qualcomm SM8150 NoC driver");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/interconnect/qcom/sm8150.h
> b/drivers/interconnect/qcom/sm8150.h
> new file mode 100644
> index 000000000000..3e01ac76ae1d
> --- /dev/null
> +++ b/drivers/interconnect/qcom/sm8150.h
> @@ -0,0 +1,152 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Qualcomm #define SM8250 interconnect IDs
> + *
> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> + */
> +
> +#ifndef __DRIVERS_INTERCONNECT_QCOM_SM8150_H
> +#define __DRIVERS_INTERCONNECT_QCOM_SM8150_H
> +
> +#define SM8150_A1NOC_SNOC_MAS			0
> +#define SM8150_A1NOC_SNOC_SLV			1
> +#define SM8150_A2NOC_SNOC_MAS			2
> +#define SM8150_A2NOC_SNOC_SLV			3
> +#define SM8150_MASTER_A1NOC_CFG			4
> +#define SM8150_MASTER_A2NOC_CFG			5
> +#define SM8150_MASTER_AMPSS_M0			6
> +#define SM8150_MASTER_CAMNOC_HF0		7
> +#define SM8150_MASTER_CAMNOC_HF0_UNCOMP		8
> +#define SM8150_MASTER_CAMNOC_HF1		9
> +#define SM8150_MASTER_CAMNOC_HF1_UNCOMP		10
> +#define SM8150_MASTER_CAMNOC_SF			11
> +#define SM8150_MASTER_CAMNOC_SF_UNCOMP		12
> +#define SM8150_MASTER_CNOC_A2NOC		13
> +#define SM8150_MASTER_CNOC_DC_NOC		14
> +#define SM8150_MASTER_CNOC_MNOC_CFG		15
> +#define SM8150_MASTER_COMPUTE_NOC		16
> +#define SM8150_MASTER_CRYPTO_CORE_0		17
> +#define SM8150_MASTER_ECC			18
> +#define SM8150_MASTER_EMAC			19
> +#define SM8150_MASTER_GEM_NOC_CFG		20
> +#define SM8150_MASTER_GEM_NOC_PCIE_SNOC		21
> +#define SM8150_MASTER_GEM_NOC_SNOC		22
> +#define SM8150_MASTER_GIC			23
> +#define SM8150_MASTER_GPU_TCU			24
> +#define SM8150_MASTER_GRAPHICS_3D		25
> +#define SM8150_MASTER_IPA			26
> +#define SM8150_MASTER_IPA_CORE			27
> +#define SM8150_MASTER_LLCC			28
> +#define SM8150_MASTER_MDP_PORT0			29
> +#define SM8150_MASTER_MDP_PORT1			30
> +#define SM8150_MASTER_MNOC_HF_MEM_NOC		31
> +#define SM8150_MASTER_MNOC_SF_MEM_NOC		32
> +#define SM8150_MASTER_NPU			33
> +#define SM8150_MASTER_PCIE			34
> +#define SM8150_MASTER_PCIE_1			35
> +#define SM8150_MASTER_PIMEM			36
> +#define SM8150_MASTER_QDSS_BAM			37
> +#define SM8150_MASTER_QDSS_DAP			38
> +#define SM8150_MASTER_QDSS_ETR			39
> +#define SM8150_MASTER_QSPI			40
> +#define SM8150_MASTER_QUP_0			41
> +#define SM8150_MASTER_QUP_1			42
> +#define SM8150_MASTER_QUP_2			43
> +#define SM8150_MASTER_ROTATOR			44
> +#define SM8150_MASTER_SDCC_2			45
> +#define SM8150_MASTER_SDCC_4			46
> +#define SM8150_MASTER_SENSORS_AHB		47
> +#define SM8150_MASTER_SNOC_CFG			48
> +#define SM8150_MASTER_SNOC_GC_MEM_NOC		49
> +#define SM8150_MASTER_SNOC_SF_MEM_NOC		50
> +#define SM8150_MASTER_SPDM			51
> +#define SM8150_MASTER_SYS_TCU			52
> +#define SM8150_MASTER_TSIF			53
> +#define SM8150_MASTER_UFS_MEM			54
> +#define SM8150_MASTER_USB3			55
> +#define SM8150_MASTER_USB3_1			56
> +#define SM8150_MASTER_VIDEO_P0			57
> +#define SM8150_MASTER_VIDEO_P1			58
> +#define SM8150_MASTER_VIDEO_PROC		59
> +#define SM8150_SLAVE_A1NOC_CFG			60
> +#define SM8150_SLAVE_A2NOC_CFG			61
> +#define SM8150_SLAVE_AHB2PHY_SOUTH		62
> +#define SM8150_SLAVE_ANOC_PCIE_GEM_NOC		63
> +#define SM8150_SLAVE_AOP			64
> +#define SM8150_SLAVE_AOSS			65
> +#define SM8150_SLAVE_APPSS			66
> +#define SM8150_SLAVE_CAMERA_CFG			67
> +#define SM8150_SLAVE_CAMNOC_UNCOMP		68
> +#define SM8150_SLAVE_CDSP_CFG			69
> +#define SM8150_SLAVE_CDSP_MEM_NOC		70
> +#define SM8150_SLAVE_CLK_CTL			71
> +#define SM8150_SLAVE_CNOC_A2NOC			72
> +#define SM8150_SLAVE_CNOC_DDRSS			73
> +#define SM8150_SLAVE_CNOC_MNOC_CFG		74
> +#define SM8150_SLAVE_CRYPTO_0_CFG		75
> +#define SM8150_SLAVE_DISPLAY_CFG		76
> +#define SM8150_SLAVE_EBI_CH0			77
> +#define SM8150_SLAVE_ECC			78
> +#define SM8150_SLAVE_EMAC_CFG			79
> +#define SM8150_SLAVE_GEM_NOC_CFG		80
> +#define SM8150_SLAVE_GEM_NOC_SNOC		81
> +#define SM8150_SLAVE_GLM			82
> +#define SM8150_SLAVE_GRAPHICS_3D_CFG		83
> +#define SM8150_SLAVE_IMEM_CFG			84
> +#define SM8150_SLAVE_IPA_CFG			85
> +#define SM8150_SLAVE_IPA_CORE			86
> +#define SM8150_SLAVE_LLCC			87
> +#define SM8150_SLAVE_LLCC_CFG			88
> +#define SM8150_SLAVE_MNOC_HF_MEM_NOC		89
> +#define SM8150_SLAVE_MNOC_SF_MEM_NOC		90
> +#define SM8150_SLAVE_MSS_PROC_MS_MPU_CFG	91
> +#define SM8150_SLAVE_NORTH_PHY_CFG		92
> +#define SM8150_SLAVE_NPU_CFG			93
> +#define SM8150_SLAVE_OCIMEM			94
> +#define SM8150_SLAVE_PCIE_0			95
> +#define SM8150_SLAVE_PCIE_0_CFG			96
> +#define SM8150_SLAVE_PCIE_1			97
> +#define SM8150_SLAVE_PCIE_1_CFG			98
> +#define SM8150_SLAVE_PIMEM			99
> +#define SM8150_SLAVE_PIMEM_CFG			100
> +#define SM8150_SLAVE_PRNG			101
> +#define SM8150_SLAVE_QDSS_CFG			102
> +#define SM8150_SLAVE_QDSS_STM			103
> +#define SM8150_SLAVE_QSPI			104
> +#define SM8150_SLAVE_QUP_0			105
> +#define SM8150_SLAVE_QUP_1			106
> +#define SM8150_SLAVE_QUP_2			107
> +#define SM8150_SLAVE_RBCPR_CX_CFG		108
> +#define SM8150_SLAVE_RBCPR_MMCX_CFG		109
> +#define SM8150_SLAVE_RBCPR_MX_CFG		110
> +#define SM8150_SLAVE_SDCC_2			111
> +#define SM8150_SLAVE_SDCC_4			112
> +#define SM8150_SLAVE_SERVICE_A1NOC		113
> +#define SM8150_SLAVE_SERVICE_A2NOC		114
> +#define SM8150_SLAVE_SERVICE_CNOC		115
> +#define SM8150_SLAVE_SERVICE_GEM_NOC		116
> +#define SM8150_SLAVE_SERVICE_MNOC		117
> +#define SM8150_SLAVE_SERVICE_SNOC		118
> +#define SM8150_SLAVE_SNOC_CFG			119
> +#define SM8150_SLAVE_SNOC_GEM_NOC_GC		120
> +#define SM8150_SLAVE_SNOC_GEM_NOC_SF		121
> +#define SM8150_SLAVE_SPDM_WRAPPER		122
> +#define SM8150_SLAVE_SPSS_CFG			123
> +#define SM8150_SLAVE_SSC_CFG			124
> +#define SM8150_SLAVE_TCSR			125
> +#define SM8150_SLAVE_TCU			126
> +#define SM8150_SLAVE_TLMM_EAST			127
> +#define SM8150_SLAVE_TLMM_NORTH			128
> +#define SM8150_SLAVE_TLMM_SOUTH			129
> +#define SM8150_SLAVE_TLMM_WEST			130
> +#define SM8150_SLAVE_TSIF			131
> +#define SM8150_SLAVE_UFS_CARD_CFG		132
> +#define SM8150_SLAVE_UFS_MEM_CFG		133
> +#define SM8150_SLAVE_USB3			134
> +#define SM8150_SLAVE_USB3_1			135
> +#define SM8150_SLAVE_VENUS_CFG			136
> +#define SM8150_SLAVE_VSENSE_CTRL_CFG		137
> +#define SM8150_SNOC_CNOC_MAS			138
> +#define SM8150_SNOC_CNOC_SLV			139
> +
> +#endif

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 13%]

* Re: [PATCH v3 5/7] interconnect: qcom: Add SM8250 interconnect provider driver
  @ 2020-07-28 11:31 13%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-28 11:31 UTC (permalink / raw)
  To: Jonathan Marek
  Cc: linux-arm-msm, Andy Gross, Bjorn Andersson, Georgi Djakov,
	linux-kernel, linux-pm, linux-kernel-owner

On 2020-07-28 08:08, Jonathan Marek wrote:
> Add driver for the Qualcomm interconnect buses found in SM8250 based
> platforms. The topology consists of several NoCs that are controlled by
> a remote processor that collects the aggregated bandwidth for each
> master-slave pairs.
> 
> Based on SC7180 driver and generated from downstream dts.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>

Reviewed-by: Sibi Sankar <sibis@codeaurora.org>

> ---
>  drivers/interconnect/qcom/Kconfig  |  10 +
>  drivers/interconnect/qcom/Makefile |   2 +
>  drivers/interconnect/qcom/sm8250.c | 651 +++++++++++++++++++++++++++++
>  drivers/interconnect/qcom/sm8250.h | 162 +++++++
>  4 files changed, 825 insertions(+)
>  create mode 100644 drivers/interconnect/qcom/sm8250.c
>  create mode 100644 drivers/interconnect/qcom/sm8250.h
> 
> diff --git a/drivers/interconnect/qcom/Kconfig
> b/drivers/interconnect/qcom/Kconfig
> index 25486de5a38d..a8f93ba265f8 100644
> --- a/drivers/interconnect/qcom/Kconfig
> +++ b/drivers/interconnect/qcom/Kconfig
> @@ -75,5 +75,15 @@ config INTERCONNECT_QCOM_SM8150
>  	  This is a driver for the Qualcomm Network-on-Chip on sm8150-based
>  	  platforms.
> 
> +config INTERCONNECT_QCOM_SM8250
> +	tristate "Qualcomm SM8250 interconnect driver"
> +	depends on INTERCONNECT_QCOM
> +	depends on (QCOM_RPMH && QCOM_COMMAND_DB && OF) || COMPILE_TEST
> +	select INTERCONNECT_QCOM_RPMH
> +	select INTERCONNECT_QCOM_BCM_VOTER
> +	help
> +	  This is a driver for the Qualcomm Network-on-Chip on sm8250-based
> +	  platforms.
> +
>  config INTERCONNECT_QCOM_SMD_RPM
>  	tristate
> diff --git a/drivers/interconnect/qcom/Makefile
> b/drivers/interconnect/qcom/Makefile
> index 1702ece67dc5..cf628f7990cd 100644
> --- a/drivers/interconnect/qcom/Makefile
> +++ b/drivers/interconnect/qcom/Makefile
> @@ -9,6 +9,7 @@ icc-rpmh-obj				:= icc-rpmh.o
>  qnoc-sc7180-objs			:= sc7180.o
>  qnoc-sdm845-objs			:= sdm845.o
>  qnoc-sm8150-objs			:= sm8150.o
> +qnoc-sm8250-objs			:= sm8250.o
>  icc-smd-rpm-objs			:= smd-rpm.o
> 
>  obj-$(CONFIG_INTERCONNECT_QCOM_BCM_VOTER) += icc-bcm-voter.o
> @@ -20,4 +21,5 @@ obj-$(CONFIG_INTERCONNECT_QCOM_RPMH) += icc-rpmh.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_SC7180) += qnoc-sc7180.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_SDM845) += qnoc-sdm845.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_SM8150) += qnoc-sm8150.o
> +obj-$(CONFIG_INTERCONNECT_QCOM_SM8250) += qnoc-sm8250.o
>  obj-$(CONFIG_INTERCONNECT_QCOM_SMD_RPM) += icc-smd-rpm.o
> diff --git a/drivers/interconnect/qcom/sm8250.c
> b/drivers/interconnect/qcom/sm8250.c
> new file mode 100644
> index 000000000000..9b58946f7898
> --- /dev/null
> +++ b/drivers/interconnect/qcom/sm8250.c
> @@ -0,0 +1,651 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> + *
> + */
> +
> +#include <linux/device.h>
> +#include <linux/interconnect.h>
> +#include <linux/interconnect-provider.h>
> +#include <linux/module.h>
> +#include <linux/of_platform.h>
> +#include <dt-bindings/interconnect/qcom,sm8250.h>
> +
> +#include "bcm-voter.h"
> +#include "icc-rpmh.h"
> +#include "sm8250.h"
> +
> +DEFINE_QNODE(qhm_a1noc_cfg, SM8250_MASTER_A1NOC_CFG, 1, 4,
> SM8250_SLAVE_SERVICE_A1NOC);
> +DEFINE_QNODE(qhm_qspi, SM8250_MASTER_QSPI_0, 1, 4, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_qup1, SM8250_MASTER_QUP_1, 1, 4, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_qup2, SM8250_MASTER_QUP_2, 1, 4, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_tsif, SM8250_MASTER_TSIF, 1, 4, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_pcie3_modem, SM8250_MASTER_PCIE_2, 1, 8,
> SM8250_SLAVE_ANOC_PCIE_GEM_NOC_1);
> +DEFINE_QNODE(xm_sdc4, SM8250_MASTER_SDCC_4, 1, 8, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_ufs_mem, SM8250_MASTER_UFS_MEM, 1, 8, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_usb3_0, SM8250_MASTER_USB3, 1, 8, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_usb3_1, SM8250_MASTER_USB3_1, 1, 8, 
> SM8250_A1NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_a2noc_cfg, SM8250_MASTER_A2NOC_CFG, 1, 4,
> SM8250_SLAVE_SERVICE_A2NOC);
> +DEFINE_QNODE(qhm_qdss_bam, SM8250_MASTER_QDSS_BAM, 1, 4,
> SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qhm_qup0, SM8250_MASTER_QUP_0, 1, 4, 
> SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qnm_cnoc, SM8250_MASTER_CNOC_A2NOC, 1, 8, 
> SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qxm_crypto, SM8250_MASTER_CRYPTO_CORE_0, 1, 8,
> SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qxm_ipa, SM8250_MASTER_IPA, 1, 8, SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_pcie3_0, SM8250_MASTER_PCIE, 1, 8,
> SM8250_SLAVE_ANOC_PCIE_GEM_NOC);
> +DEFINE_QNODE(xm_pcie3_1, SM8250_MASTER_PCIE_1, 1, 8,
> SM8250_SLAVE_ANOC_PCIE_GEM_NOC);
> +DEFINE_QNODE(xm_qdss_etr, SM8250_MASTER_QDSS_ETR, 1, 8, 
> SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_sdc2, SM8250_MASTER_SDCC_2, 1, 8, 
> SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(xm_ufs_card, SM8250_MASTER_UFS_CARD, 1, 8, 
> SM8250_A2NOC_SNOC_SLV);
> +DEFINE_QNODE(qnm_npu, SM8250_MASTER_NPU, 2, 32, 
> SM8250_SLAVE_CDSP_MEM_NOC);
> +DEFINE_QNODE(qnm_snoc, SM8250_SNOC_CNOC_MAS, 1, 8,
> SM8250_SLAVE_CDSP_CFG, SM8250_SLAVE_CAMERA_CFG,
> SM8250_SLAVE_TLMM_SOUTH, SM8250_SLAVE_TLMM_NORTH, SM8250_SLAVE_SDCC_4,
> SM8250_SLAVE_TLMM_WEST, SM8250_SLAVE_SDCC_2,
> SM8250_SLAVE_CNOC_MNOC_CFG, SM8250_SLAVE_UFS_MEM_CFG,
> SM8250_SLAVE_SNOC_CFG, SM8250_SLAVE_PDM, SM8250_SLAVE_CX_RDPM,
> SM8250_SLAVE_PCIE_1_CFG, SM8250_SLAVE_A2NOC_CFG,
> SM8250_SLAVE_QDSS_CFG, SM8250_SLAVE_DISPLAY_CFG,
> SM8250_SLAVE_PCIE_2_CFG, SM8250_SLAVE_TCSR, SM8250_SLAVE_DCC_CFG,
> SM8250_SLAVE_CNOC_DDRSS, SM8250_SLAVE_IPC_ROUTER_CFG,
> SM8250_SLAVE_PCIE_0_CFG, SM8250_SLAVE_RBCPR_MMCX_CFG,
> SM8250_SLAVE_NPU_CFG, SM8250_SLAVE_AHB2PHY_SOUTH,
> SM8250_SLAVE_AHB2PHY_NORTH, SM8250_SLAVE_GRAPHICS_3D_CFG,
> SM8250_SLAVE_VENUS_CFG, SM8250_SLAVE_TSIF, SM8250_SLAVE_IPA_CFG,
> SM8250_SLAVE_IMEM_CFG, SM8250_SLAVE_USB3, SM8250_SLAVE_SERVICE_CNOC,
> SM8250_SLAVE_UFS_CARD_CFG, SM8250_SLAVE_USB3_1, SM8250_SLAVE_LPASS,
> SM8250_SLAVE_RBCPR_CX_CFG, SM8250_SLAVE_A1NOC_CFG, SM8250_SLAVE_AOSS,
> SM8250_SLAVE_PRNG, SM8250_SLAVE_VSENSE_CTRL_CFG, SM8250_SLAVE_QSPI_0,
> SM8250_SLAVE_CRYPTO_0_CFG, SM8250_SLAVE_PIMEM_CFG,
> SM8250_SLAVE_RBCPR_MX_CFG, SM8250_SLAVE_QUP_0, SM8250_SLAVE_QUP_1,
> SM8250_SLAVE_QUP_2, SM8250_SLAVE_CLK_CTL);
> +DEFINE_QNODE(xm_qdss_dap, SM8250_MASTER_QDSS_DAP, 1, 8,
> SM8250_SLAVE_CDSP_CFG, SM8250_SLAVE_CAMERA_CFG,
> SM8250_SLAVE_TLMM_SOUTH, SM8250_SLAVE_TLMM_NORTH, SM8250_SLAVE_SDCC_4,
> SM8250_SLAVE_TLMM_WEST, SM8250_SLAVE_SDCC_2,
> SM8250_SLAVE_CNOC_MNOC_CFG, SM8250_SLAVE_UFS_MEM_CFG,
> SM8250_SLAVE_SNOC_CFG, SM8250_SLAVE_PDM, SM8250_SLAVE_CX_RDPM,
> SM8250_SLAVE_PCIE_1_CFG, SM8250_SLAVE_A2NOC_CFG,
> SM8250_SLAVE_QDSS_CFG, SM8250_SLAVE_DISPLAY_CFG,
> SM8250_SLAVE_PCIE_2_CFG, SM8250_SLAVE_TCSR, SM8250_SLAVE_DCC_CFG,
> SM8250_SLAVE_CNOC_DDRSS, SM8250_SLAVE_IPC_ROUTER_CFG,
> SM8250_SLAVE_CNOC_A2NOC, SM8250_SLAVE_PCIE_0_CFG,
> SM8250_SLAVE_RBCPR_MMCX_CFG, SM8250_SLAVE_NPU_CFG,
> SM8250_SLAVE_AHB2PHY_SOUTH, SM8250_SLAVE_AHB2PHY_NORTH,
> SM8250_SLAVE_GRAPHICS_3D_CFG, SM8250_SLAVE_VENUS_CFG,
> SM8250_SLAVE_TSIF, SM8250_SLAVE_IPA_CFG, SM8250_SLAVE_IMEM_CFG,
> SM8250_SLAVE_USB3, SM8250_SLAVE_SERVICE_CNOC,
> SM8250_SLAVE_UFS_CARD_CFG, SM8250_SLAVE_USB3_1, SM8250_SLAVE_LPASS,
> SM8250_SLAVE_RBCPR_CX_CFG, SM8250_SLAVE_A1NOC_CFG, SM8250_SLAVE_AOSS,
> SM8250_SLAVE_PRNG, SM8250_SLAVE_VSENSE_CTRL_CFG, SM8250_SLAVE_QSPI_0,
> SM8250_SLAVE_CRYPTO_0_CFG, SM8250_SLAVE_PIMEM_CFG,
> SM8250_SLAVE_RBCPR_MX_CFG, SM8250_SLAVE_QUP_0, SM8250_SLAVE_QUP_1,
> SM8250_SLAVE_QUP_2, SM8250_SLAVE_CLK_CTL);
> +DEFINE_QNODE(qhm_cnoc_dc_noc, SM8250_MASTER_CNOC_DC_NOC, 1, 4,
> SM8250_SLAVE_GEM_NOC_CFG, SM8250_SLAVE_LLCC_CFG);
> +DEFINE_QNODE(alm_gpu_tcu, SM8250_MASTER_GPU_TCU, 1, 8,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(alm_sys_tcu, SM8250_MASTER_SYS_TCU, 1, 8,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(chm_apps, SM8250_MASTER_AMPSS_M0, 2, 32,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC,
> SM8250_SLAVE_MEM_NOC_PCIE_SNOC);
> +DEFINE_QNODE(qhm_gemnoc_cfg, SM8250_MASTER_GEM_NOC_CFG, 1, 4,
> SM8250_SLAVE_SERVICE_GEM_NOC_2, SM8250_SLAVE_SERVICE_GEM_NOC_1,
> SM8250_SLAVE_SERVICE_GEM_NOC);
> +DEFINE_QNODE(qnm_cmpnoc, SM8250_MASTER_COMPUTE_NOC, 2, 32,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_gpu, SM8250_MASTER_GRAPHICS_3D, 2, 32,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_mnoc_hf, SM8250_MASTER_MNOC_HF_MEM_NOC, 2, 32,
> SM8250_SLAVE_LLCC);
> +DEFINE_QNODE(qnm_mnoc_sf, SM8250_MASTER_MNOC_SF_MEM_NOC, 2, 32,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_pcie, SM8250_MASTER_ANOC_PCIE_GEM_NOC, 1, 16,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC);
> +DEFINE_QNODE(qnm_snoc_gc, SM8250_MASTER_SNOC_GC_MEM_NOC, 1, 8,
> SM8250_SLAVE_LLCC);
> +DEFINE_QNODE(qnm_snoc_sf, SM8250_MASTER_SNOC_SF_MEM_NOC, 1, 16,
> SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC,
> SM8250_SLAVE_MEM_NOC_PCIE_SNOC);
> +DEFINE_QNODE(ipa_core_master, SM8250_MASTER_IPA_CORE, 1, 8,
> SM8250_SLAVE_IPA_CORE);
> +DEFINE_QNODE(llcc_mc, SM8250_MASTER_LLCC, 4, 4, SM8250_SLAVE_EBI_CH0);
> +DEFINE_QNODE(qhm_mnoc_cfg, SM8250_MASTER_CNOC_MNOC_CFG, 1, 4,
> SM8250_SLAVE_SERVICE_MNOC);
> +DEFINE_QNODE(qnm_camnoc_hf, SM8250_MASTER_CAMNOC_HF, 2, 32,
> SM8250_SLAVE_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qnm_camnoc_icp, SM8250_MASTER_CAMNOC_ICP, 1, 8,
> SM8250_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qnm_camnoc_sf, SM8250_MASTER_CAMNOC_SF, 2, 32,
> SM8250_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qnm_video0, SM8250_MASTER_VIDEO_P0, 1, 32,
> SM8250_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qnm_video1, SM8250_MASTER_VIDEO_P1, 1, 32,
> SM8250_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qnm_video_cvp, SM8250_MASTER_VIDEO_PROC, 1, 32,
> SM8250_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qxm_mdp0, SM8250_MASTER_MDP_PORT0, 1, 32,
> SM8250_SLAVE_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qxm_mdp1, SM8250_MASTER_MDP_PORT1, 1, 32,
> SM8250_SLAVE_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qxm_rot, SM8250_MASTER_ROTATOR, 1, 32,
> SM8250_SLAVE_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(amm_npu_sys, SM8250_MASTER_NPU_SYS, 4, 32,
> SM8250_SLAVE_NPU_COMPUTE_NOC);
> +DEFINE_QNODE(amm_npu_sys_cdp_w, SM8250_MASTER_NPU_CDP, 2, 16,
> SM8250_SLAVE_NPU_COMPUTE_NOC);
> +DEFINE_QNODE(qhm_cfg, SM8250_MASTER_NPU_NOC_CFG, 1, 4,
> SM8250_SLAVE_SERVICE_NPU_NOC, SM8250_SLAVE_ISENSE_CFG,
> SM8250_SLAVE_NPU_LLM_CFG, SM8250_SLAVE_NPU_INT_DMA_BWMON_CFG,
> SM8250_SLAVE_NPU_CP, SM8250_SLAVE_NPU_TCM, SM8250_SLAVE_NPU_CAL_DP0,
> SM8250_SLAVE_NPU_CAL_DP1, SM8250_SLAVE_NPU_DPM);
> +DEFINE_QNODE(qhm_snoc_cfg, SM8250_MASTER_SNOC_CFG, 1, 4,
> SM8250_SLAVE_SERVICE_SNOC);
> +DEFINE_QNODE(qnm_aggre1_noc, SM8250_A1NOC_SNOC_MAS, 1, 16,
> SM8250_SLAVE_SNOC_GEM_NOC_SF);
> +DEFINE_QNODE(qnm_aggre2_noc, SM8250_A2NOC_SNOC_MAS, 1, 16,
> SM8250_SLAVE_SNOC_GEM_NOC_SF);
> +DEFINE_QNODE(qnm_gemnoc, SM8250_MASTER_GEM_NOC_SNOC, 1, 16,
> SM8250_SLAVE_PIMEM, SM8250_SLAVE_OCIMEM, SM8250_SLAVE_APPSS,
> SM8250_SNOC_CNOC_SLV, SM8250_SLAVE_TCU, SM8250_SLAVE_QDSS_STM);
> +DEFINE_QNODE(qnm_gemnoc_pcie, SM8250_MASTER_GEM_NOC_PCIE_SNOC, 1, 8,
> SM8250_SLAVE_PCIE_2, SM8250_SLAVE_PCIE_0, SM8250_SLAVE_PCIE_1);
> +DEFINE_QNODE(qxm_pimem, SM8250_MASTER_PIMEM, 1, 8,
> SM8250_SLAVE_SNOC_GEM_NOC_GC);
> +DEFINE_QNODE(xm_gic, SM8250_MASTER_GIC, 1, 8, 
> SM8250_SLAVE_SNOC_GEM_NOC_GC);
> +DEFINE_QNODE(qns_a1noc_snoc, SM8250_A1NOC_SNOC_SLV, 1, 16,
> SM8250_A1NOC_SNOC_MAS);
> +DEFINE_QNODE(qns_pcie_modem_mem_noc,
> SM8250_SLAVE_ANOC_PCIE_GEM_NOC_1, 1, 16,
> SM8250_MASTER_ANOC_PCIE_GEM_NOC);
> +DEFINE_QNODE(srvc_aggre1_noc, SM8250_SLAVE_SERVICE_A1NOC, 1, 4);
> +DEFINE_QNODE(qns_a2noc_snoc, SM8250_A2NOC_SNOC_SLV, 1, 16,
> SM8250_A2NOC_SNOC_MAS);
> +DEFINE_QNODE(qns_pcie_mem_noc, SM8250_SLAVE_ANOC_PCIE_GEM_NOC, 1, 16,
> SM8250_MASTER_ANOC_PCIE_GEM_NOC);
> +DEFINE_QNODE(srvc_aggre2_noc, SM8250_SLAVE_SERVICE_A2NOC, 1, 4);
> +DEFINE_QNODE(qns_cdsp_mem_noc, SM8250_SLAVE_CDSP_MEM_NOC, 2, 32,
> SM8250_MASTER_COMPUTE_NOC);
> +DEFINE_QNODE(qhs_a1_noc_cfg, SM8250_SLAVE_A1NOC_CFG, 1, 4,
> SM8250_MASTER_A1NOC_CFG);
> +DEFINE_QNODE(qhs_a2_noc_cfg, SM8250_SLAVE_A2NOC_CFG, 1, 4,
> SM8250_MASTER_A2NOC_CFG);
> +DEFINE_QNODE(qhs_ahb2phy0, SM8250_SLAVE_AHB2PHY_SOUTH, 1, 4);
> +DEFINE_QNODE(qhs_ahb2phy1, SM8250_SLAVE_AHB2PHY_NORTH, 1, 4);
> +DEFINE_QNODE(qhs_aoss, SM8250_SLAVE_AOSS, 1, 4);
> +DEFINE_QNODE(qhs_camera_cfg, SM8250_SLAVE_CAMERA_CFG, 1, 4);
> +DEFINE_QNODE(qhs_clk_ctl, SM8250_SLAVE_CLK_CTL, 1, 4);
> +DEFINE_QNODE(qhs_compute_dsp, SM8250_SLAVE_CDSP_CFG, 1, 4);
> +DEFINE_QNODE(qhs_cpr_cx, SM8250_SLAVE_RBCPR_CX_CFG, 1, 4);
> +DEFINE_QNODE(qhs_cpr_mmcx, SM8250_SLAVE_RBCPR_MMCX_CFG, 1, 4);
> +DEFINE_QNODE(qhs_cpr_mx, SM8250_SLAVE_RBCPR_MX_CFG, 1, 4);
> +DEFINE_QNODE(qhs_crypto0_cfg, SM8250_SLAVE_CRYPTO_0_CFG, 1, 4);
> +DEFINE_QNODE(qhs_cx_rdpm, SM8250_SLAVE_CX_RDPM, 1, 4);
> +DEFINE_QNODE(qhs_dcc_cfg, SM8250_SLAVE_DCC_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ddrss_cfg, SM8250_SLAVE_CNOC_DDRSS, 1, 4,
> SM8250_MASTER_CNOC_DC_NOC);
> +DEFINE_QNODE(qhs_display_cfg, SM8250_SLAVE_DISPLAY_CFG, 1, 4);
> +DEFINE_QNODE(qhs_gpuss_cfg, SM8250_SLAVE_GRAPHICS_3D_CFG, 1, 8);
> +DEFINE_QNODE(qhs_imem_cfg, SM8250_SLAVE_IMEM_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ipa, SM8250_SLAVE_IPA_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ipc_router, SM8250_SLAVE_IPC_ROUTER_CFG, 1, 4);
> +DEFINE_QNODE(qhs_lpass_cfg, SM8250_SLAVE_LPASS, 1, 4);
> +DEFINE_QNODE(qhs_mnoc_cfg, SM8250_SLAVE_CNOC_MNOC_CFG, 1, 4,
> SM8250_MASTER_CNOC_MNOC_CFG);
> +DEFINE_QNODE(qhs_npu_cfg, SM8250_SLAVE_NPU_CFG, 1, 4,
> SM8250_MASTER_NPU_NOC_CFG);
> +DEFINE_QNODE(qhs_pcie0_cfg, SM8250_SLAVE_PCIE_0_CFG, 1, 4);
> +DEFINE_QNODE(qhs_pcie1_cfg, SM8250_SLAVE_PCIE_1_CFG, 1, 4);
> +DEFINE_QNODE(qhs_pcie_modem_cfg, SM8250_SLAVE_PCIE_2_CFG, 1, 4);
> +DEFINE_QNODE(qhs_pdm, SM8250_SLAVE_PDM, 1, 4);
> +DEFINE_QNODE(qhs_pimem_cfg, SM8250_SLAVE_PIMEM_CFG, 1, 4);
> +DEFINE_QNODE(qhs_prng, SM8250_SLAVE_PRNG, 1, 4);
> +DEFINE_QNODE(qhs_qdss_cfg, SM8250_SLAVE_QDSS_CFG, 1, 4);
> +DEFINE_QNODE(qhs_qspi, SM8250_SLAVE_QSPI_0, 1, 4);
> +DEFINE_QNODE(qhs_qup0, SM8250_SLAVE_QUP_0, 1, 4);
> +DEFINE_QNODE(qhs_qup1, SM8250_SLAVE_QUP_1, 1, 4);
> +DEFINE_QNODE(qhs_qup2, SM8250_SLAVE_QUP_2, 1, 4);
> +DEFINE_QNODE(qhs_sdc2, SM8250_SLAVE_SDCC_2, 1, 4);
> +DEFINE_QNODE(qhs_sdc4, SM8250_SLAVE_SDCC_4, 1, 4);
> +DEFINE_QNODE(qhs_snoc_cfg, SM8250_SLAVE_SNOC_CFG, 1, 4,
> SM8250_MASTER_SNOC_CFG);
> +DEFINE_QNODE(qhs_tcsr, SM8250_SLAVE_TCSR, 1, 4);
> +DEFINE_QNODE(qhs_tlmm0, SM8250_SLAVE_TLMM_NORTH, 1, 4);
> +DEFINE_QNODE(qhs_tlmm1, SM8250_SLAVE_TLMM_SOUTH, 1, 4);
> +DEFINE_QNODE(qhs_tlmm2, SM8250_SLAVE_TLMM_WEST, 1, 4);
> +DEFINE_QNODE(qhs_tsif, SM8250_SLAVE_TSIF, 1, 4);
> +DEFINE_QNODE(qhs_ufs_card_cfg, SM8250_SLAVE_UFS_CARD_CFG, 1, 4);
> +DEFINE_QNODE(qhs_ufs_mem_cfg, SM8250_SLAVE_UFS_MEM_CFG, 1, 4);
> +DEFINE_QNODE(qhs_usb3_0, SM8250_SLAVE_USB3, 1, 4);
> +DEFINE_QNODE(qhs_usb3_1, SM8250_SLAVE_USB3_1, 1, 4);
> +DEFINE_QNODE(qhs_venus_cfg, SM8250_SLAVE_VENUS_CFG, 1, 4);
> +DEFINE_QNODE(qhs_vsense_ctrl_cfg, SM8250_SLAVE_VSENSE_CTRL_CFG, 1, 4);
> +DEFINE_QNODE(qns_cnoc_a2noc, SM8250_SLAVE_CNOC_A2NOC, 1, 8,
> SM8250_MASTER_CNOC_A2NOC);
> +DEFINE_QNODE(srvc_cnoc, SM8250_SLAVE_SERVICE_CNOC, 1, 4);
> +DEFINE_QNODE(qhs_llcc, SM8250_SLAVE_LLCC_CFG, 1, 4);
> +DEFINE_QNODE(qhs_memnoc, SM8250_SLAVE_GEM_NOC_CFG, 1, 4,
> SM8250_MASTER_GEM_NOC_CFG);
> +DEFINE_QNODE(qns_gem_noc_snoc, SM8250_SLAVE_GEM_NOC_SNOC, 1, 16,
> SM8250_MASTER_GEM_NOC_SNOC);
> +DEFINE_QNODE(qns_llcc, SM8250_SLAVE_LLCC, 4, 16, SM8250_MASTER_LLCC);
> +DEFINE_QNODE(qns_sys_pcie, SM8250_SLAVE_MEM_NOC_PCIE_SNOC, 1, 8,
> SM8250_MASTER_GEM_NOC_PCIE_SNOC);
> +DEFINE_QNODE(srvc_even_gemnoc, SM8250_SLAVE_SERVICE_GEM_NOC_1, 1, 4);
> +DEFINE_QNODE(srvc_odd_gemnoc, SM8250_SLAVE_SERVICE_GEM_NOC_2, 1, 4);
> +DEFINE_QNODE(srvc_sys_gemnoc, SM8250_SLAVE_SERVICE_GEM_NOC, 1, 4);
> +DEFINE_QNODE(ipa_core_slave, SM8250_SLAVE_IPA_CORE, 1, 8);
> +DEFINE_QNODE(ebi, SM8250_SLAVE_EBI_CH0, 4, 4);
> +DEFINE_QNODE(qns_mem_noc_hf, SM8250_SLAVE_MNOC_HF_MEM_NOC, 2, 32,
> SM8250_MASTER_MNOC_HF_MEM_NOC);
> +DEFINE_QNODE(qns_mem_noc_sf, SM8250_SLAVE_MNOC_SF_MEM_NOC, 2, 32,
> SM8250_MASTER_MNOC_SF_MEM_NOC);
> +DEFINE_QNODE(srvc_mnoc, SM8250_SLAVE_SERVICE_MNOC, 1, 4);
> +DEFINE_QNODE(qhs_cal_dp0, SM8250_SLAVE_NPU_CAL_DP0, 1, 4);
> +DEFINE_QNODE(qhs_cal_dp1, SM8250_SLAVE_NPU_CAL_DP1, 1, 4);
> +DEFINE_QNODE(qhs_cp, SM8250_SLAVE_NPU_CP, 1, 4);
> +DEFINE_QNODE(qhs_dma_bwmon, SM8250_SLAVE_NPU_INT_DMA_BWMON_CFG, 1, 4);
> +DEFINE_QNODE(qhs_dpm, SM8250_SLAVE_NPU_DPM, 1, 4);
> +DEFINE_QNODE(qhs_isense, SM8250_SLAVE_ISENSE_CFG, 1, 4);
> +DEFINE_QNODE(qhs_llm, SM8250_SLAVE_NPU_LLM_CFG, 1, 4);
> +DEFINE_QNODE(qhs_tcm, SM8250_SLAVE_NPU_TCM, 1, 4);
> +DEFINE_QNODE(qns_npu_sys, SM8250_SLAVE_NPU_COMPUTE_NOC, 2, 32);
> +DEFINE_QNODE(srvc_noc, SM8250_SLAVE_SERVICE_NPU_NOC, 1, 4);
> +DEFINE_QNODE(qhs_apss, SM8250_SLAVE_APPSS, 1, 8);
> +DEFINE_QNODE(qns_cnoc, SM8250_SNOC_CNOC_SLV, 1, 8, 
> SM8250_SNOC_CNOC_MAS);
> +DEFINE_QNODE(qns_gemnoc_gc, SM8250_SLAVE_SNOC_GEM_NOC_GC, 1, 8,
> SM8250_MASTER_SNOC_GC_MEM_NOC);
> +DEFINE_QNODE(qns_gemnoc_sf, SM8250_SLAVE_SNOC_GEM_NOC_SF, 1, 16,
> SM8250_MASTER_SNOC_SF_MEM_NOC);
> +DEFINE_QNODE(qxs_imem, SM8250_SLAVE_OCIMEM, 1, 8);
> +DEFINE_QNODE(qxs_pimem, SM8250_SLAVE_PIMEM, 1, 8);
> +DEFINE_QNODE(srvc_snoc, SM8250_SLAVE_SERVICE_SNOC, 1, 4);
> +DEFINE_QNODE(xs_pcie_0, SM8250_SLAVE_PCIE_0, 1, 8);
> +DEFINE_QNODE(xs_pcie_1, SM8250_SLAVE_PCIE_1, 1, 8);
> +DEFINE_QNODE(xs_pcie_modem, SM8250_SLAVE_PCIE_2, 1, 8);
> +DEFINE_QNODE(xs_qdss_stm, SM8250_SLAVE_QDSS_STM, 1, 4);
> +DEFINE_QNODE(xs_sys_tcu_cfg, SM8250_SLAVE_TCU, 1, 8);
> +
> +DEFINE_QBCM(bcm_acv, "ACV", false, &ebi);
> +DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
> +DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc);
> +DEFINE_QBCM(bcm_mm0, "MM0", true, &qns_mem_noc_hf);
> +DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto);
> +DEFINE_QBCM(bcm_ip0, "IP0", false, &ipa_core_slave);
> +DEFINE_QBCM(bcm_mm1, "MM1", false, &qnm_camnoc_hf, &qxm_mdp0, 
> &qxm_mdp1);
> +DEFINE_QBCM(bcm_sh2, "SH2", false, &alm_gpu_tcu, &alm_sys_tcu);
> +DEFINE_QBCM(bcm_mm2, "MM2", false, &qns_mem_noc_sf);
> +DEFINE_QBCM(bcm_qup0, "QUP0", false, &qhm_qup1, &qhm_qup2, &qhm_qup0);
> +DEFINE_QBCM(bcm_sh3, "SH3", false, &qnm_cmpnoc);
> +DEFINE_QBCM(bcm_mm3, "MM3", false, &qnm_camnoc_icp, &qnm_camnoc_sf,
> &qnm_video0, &qnm_video1, &qnm_video_cvp);
> +DEFINE_QBCM(bcm_sh4, "SH4", false, &chm_apps);
> +DEFINE_QBCM(bcm_sn0, "SN0", true, &qns_gemnoc_sf);
> +DEFINE_QBCM(bcm_co0, "CO0", false, &qns_cdsp_mem_noc);
> +DEFINE_QBCM(bcm_cn0, "CN0", true, &qnm_snoc, &xm_qdss_dap,
> &qhs_a1_noc_cfg, &qhs_a2_noc_cfg, &qhs_ahb2phy0, &qhs_ahb2phy1,
> &qhs_aoss, &qhs_camera_cfg, &qhs_clk_ctl, &qhs_compute_dsp,
> &qhs_cpr_cx, &qhs_cpr_mmcx, &qhs_cpr_mx, &qhs_crypto0_cfg,
> &qhs_cx_rdpm, &qhs_dcc_cfg, &qhs_ddrss_cfg, &qhs_display_cfg,
> &qhs_gpuss_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_ipc_router,
> &qhs_lpass_cfg, &qhs_mnoc_cfg, &qhs_npu_cfg, &qhs_pcie0_cfg,
> &qhs_pcie1_cfg, &qhs_pcie_modem_cfg, &qhs_pdm, &qhs_pimem_cfg,
> &qhs_prng, &qhs_qdss_cfg, &qhs_qspi, &qhs_qup0, &qhs_qup1, &qhs_qup2,
> &qhs_sdc2, &qhs_sdc4, &qhs_snoc_cfg, &qhs_tcsr, &qhs_tlmm0,
> &qhs_tlmm1, &qhs_tlmm2, &qhs_tsif, &qhs_ufs_card_cfg,
> &qhs_ufs_mem_cfg, &qhs_usb3_0, &qhs_usb3_1, &qhs_venus_cfg,
> &qhs_vsense_ctrl_cfg, &qns_cnoc_a2noc, &srvc_cnoc);
> +DEFINE_QBCM(bcm_sn1, "SN1", false, &qxs_imem);
> +DEFINE_QBCM(bcm_sn2, "SN2", false, &qns_gemnoc_gc);
> +DEFINE_QBCM(bcm_co2, "CO2", false, &qnm_npu);
> +DEFINE_QBCM(bcm_sn3, "SN3", false, &qxs_pimem);
> +DEFINE_QBCM(bcm_sn4, "SN4", false, &xs_qdss_stm);
> +DEFINE_QBCM(bcm_sn5, "SN5", false, &xs_pcie_modem);
> +DEFINE_QBCM(bcm_sn6, "SN6", false, &xs_pcie_0, &xs_pcie_1);
> +DEFINE_QBCM(bcm_sn7, "SN7", false, &qnm_aggre1_noc);
> +DEFINE_QBCM(bcm_sn8, "SN8", false, &qnm_aggre2_noc);
> +DEFINE_QBCM(bcm_sn9, "SN9", false, &qnm_gemnoc_pcie);
> +DEFINE_QBCM(bcm_sn11, "SN11", false, &qnm_gemnoc);
> +DEFINE_QBCM(bcm_sn12, "SN12", false, &qns_pcie_modem_mem_noc,
> &qns_pcie_mem_noc);
> +
> +static struct qcom_icc_bcm *aggre1_noc_bcms[] = {
> +	&bcm_qup0,
> +	&bcm_sn12,
> +};
> +
> +static struct qcom_icc_node *aggre1_noc_nodes[] = {
> +	[MASTER_A1NOC_CFG] = &qhm_a1noc_cfg,
> +	[MASTER_QSPI_0] = &qhm_qspi,
> +	[MASTER_QUP_1] = &qhm_qup1,
> +	[MASTER_QUP_2] = &qhm_qup2,
> +	[MASTER_TSIF] = &qhm_tsif,
> +	[MASTER_PCIE_2] = &xm_pcie3_modem,
> +	[MASTER_SDCC_4] = &xm_sdc4,
> +	[MASTER_UFS_MEM] = &xm_ufs_mem,
> +	[MASTER_USB3] = &xm_usb3_0,
> +	[MASTER_USB3_1] = &xm_usb3_1,
> +	[A1NOC_SNOC_SLV] = &qns_a1noc_snoc,
> +	[SLAVE_ANOC_PCIE_GEM_NOC_1] = &qns_pcie_modem_mem_noc,
> +	[SLAVE_SERVICE_A1NOC] = &srvc_aggre1_noc,
> +};
> +
> +static struct qcom_icc_desc sm8250_aggre1_noc = {
> +	.nodes = aggre1_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(aggre1_noc_nodes),
> +	.bcms = aggre1_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(aggre1_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *aggre2_noc_bcms[] = {
> +	&bcm_ce0,
> +	&bcm_qup0,
> +	&bcm_sn12,
> +};
> +
> +static struct qcom_icc_node *aggre2_noc_nodes[] = {
> +	[MASTER_A2NOC_CFG] = &qhm_a2noc_cfg,
> +	[MASTER_QDSS_BAM] = &qhm_qdss_bam,
> +	[MASTER_QUP_0] = &qhm_qup0,
> +	[MASTER_CNOC_A2NOC] = &qnm_cnoc,
> +	[MASTER_CRYPTO_CORE_0] = &qxm_crypto,
> +	[MASTER_IPA] = &qxm_ipa,
> +	[MASTER_PCIE] = &xm_pcie3_0,
> +	[MASTER_PCIE_1] = &xm_pcie3_1,
> +	[MASTER_QDSS_ETR] = &xm_qdss_etr,
> +	[MASTER_SDCC_2] = &xm_sdc2,
> +	[MASTER_UFS_CARD] = &xm_ufs_card,
> +	[A2NOC_SNOC_SLV] = &qns_a2noc_snoc,
> +	[SLAVE_ANOC_PCIE_GEM_NOC] = &qns_pcie_mem_noc,
> +	[SLAVE_SERVICE_A2NOC] = &srvc_aggre2_noc,
> +};
> +
> +static struct qcom_icc_desc sm8250_aggre2_noc = {
> +	.nodes = aggre2_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(aggre2_noc_nodes),
> +	.bcms = aggre2_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(aggre2_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *compute_noc_bcms[] = {
> +	&bcm_co0,
> +	&bcm_co2,
> +};
> +
> +static struct qcom_icc_node *compute_noc_nodes[] = {
> +	[MASTER_NPU] = &qnm_npu,
> +	[SLAVE_CDSP_MEM_NOC] = &qns_cdsp_mem_noc,
> +};
> +
> +static struct qcom_icc_desc sm8250_compute_noc = {
> +	.nodes = compute_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(compute_noc_nodes),
> +	.bcms = compute_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(compute_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *config_noc_bcms[] = {
> +	&bcm_cn0,
> +};
> +
> +static struct qcom_icc_node *config_noc_nodes[] = {
> +	[SNOC_CNOC_MAS] = &qnm_snoc,
> +	[MASTER_QDSS_DAP] = &xm_qdss_dap,
> +	[SLAVE_A1NOC_CFG] = &qhs_a1_noc_cfg,
> +	[SLAVE_A2NOC_CFG] = &qhs_a2_noc_cfg,
> +	[SLAVE_AHB2PHY_SOUTH] = &qhs_ahb2phy0,
> +	[SLAVE_AHB2PHY_NORTH] = &qhs_ahb2phy1,
> +	[SLAVE_AOSS] = &qhs_aoss,
> +	[SLAVE_CAMERA_CFG] = &qhs_camera_cfg,
> +	[SLAVE_CLK_CTL] = &qhs_clk_ctl,
> +	[SLAVE_CDSP_CFG] = &qhs_compute_dsp,
> +	[SLAVE_RBCPR_CX_CFG] = &qhs_cpr_cx,
> +	[SLAVE_RBCPR_MMCX_CFG] = &qhs_cpr_mmcx,
> +	[SLAVE_RBCPR_MX_CFG] = &qhs_cpr_mx,
> +	[SLAVE_CRYPTO_0_CFG] = &qhs_crypto0_cfg,
> +	[SLAVE_CX_RDPM] = &qhs_cx_rdpm,
> +	[SLAVE_DCC_CFG] = &qhs_dcc_cfg,
> +	[SLAVE_CNOC_DDRSS] = &qhs_ddrss_cfg,
> +	[SLAVE_DISPLAY_CFG] = &qhs_display_cfg,
> +	[SLAVE_GRAPHICS_3D_CFG] = &qhs_gpuss_cfg,
> +	[SLAVE_IMEM_CFG] = &qhs_imem_cfg,
> +	[SLAVE_IPA_CFG] = &qhs_ipa,
> +	[SLAVE_IPC_ROUTER_CFG] = &qhs_ipc_router,
> +	[SLAVE_LPASS] = &qhs_lpass_cfg,
> +	[SLAVE_CNOC_MNOC_CFG] = &qhs_mnoc_cfg,
> +	[SLAVE_NPU_CFG] = &qhs_npu_cfg,
> +	[SLAVE_PCIE_0_CFG] = &qhs_pcie0_cfg,
> +	[SLAVE_PCIE_1_CFG] = &qhs_pcie1_cfg,
> +	[SLAVE_PCIE_2_CFG] = &qhs_pcie_modem_cfg,
> +	[SLAVE_PDM] = &qhs_pdm,
> +	[SLAVE_PIMEM_CFG] = &qhs_pimem_cfg,
> +	[SLAVE_PRNG] = &qhs_prng,
> +	[SLAVE_QDSS_CFG] = &qhs_qdss_cfg,
> +	[SLAVE_QSPI_0] = &qhs_qspi,
> +	[SLAVE_QUP_0] = &qhs_qup0,
> +	[SLAVE_QUP_1] = &qhs_qup1,
> +	[SLAVE_QUP_2] = &qhs_qup2,
> +	[SLAVE_SDCC_2] = &qhs_sdc2,
> +	[SLAVE_SDCC_4] = &qhs_sdc4,
> +	[SLAVE_SNOC_CFG] = &qhs_snoc_cfg,
> +	[SLAVE_TCSR] = &qhs_tcsr,
> +	[SLAVE_TLMM_NORTH] = &qhs_tlmm0,
> +	[SLAVE_TLMM_SOUTH] = &qhs_tlmm1,
> +	[SLAVE_TLMM_WEST] = &qhs_tlmm2,
> +	[SLAVE_TSIF] = &qhs_tsif,
> +	[SLAVE_UFS_CARD_CFG] = &qhs_ufs_card_cfg,
> +	[SLAVE_UFS_MEM_CFG] = &qhs_ufs_mem_cfg,
> +	[SLAVE_USB3] = &qhs_usb3_0,
> +	[SLAVE_USB3_1] = &qhs_usb3_1,
> +	[SLAVE_VENUS_CFG] = &qhs_venus_cfg,
> +	[SLAVE_VSENSE_CTRL_CFG] = &qhs_vsense_ctrl_cfg,
> +	[SLAVE_CNOC_A2NOC] = &qns_cnoc_a2noc,
> +	[SLAVE_SERVICE_CNOC] = &srvc_cnoc,
> +};
> +
> +static struct qcom_icc_desc sm8250_config_noc = {
> +	.nodes = config_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(config_noc_nodes),
> +	.bcms = config_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(config_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *dc_noc_bcms[] = {
> +};
> +
> +static struct qcom_icc_node *dc_noc_nodes[] = {
> +	[MASTER_CNOC_DC_NOC] = &qhm_cnoc_dc_noc,
> +	[SLAVE_LLCC_CFG] = &qhs_llcc,
> +	[SLAVE_GEM_NOC_CFG] = &qhs_memnoc,
> +};
> +
> +static struct qcom_icc_desc sm8250_dc_noc = {
> +	.nodes = dc_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(dc_noc_nodes),
> +	.bcms = dc_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(dc_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *gem_noc_bcms[] = {
> +	&bcm_sh0,
> +	&bcm_sh2,
> +	&bcm_sh3,
> +	&bcm_sh4,
> +};
> +
> +static struct qcom_icc_node *gem_noc_nodes[] = {
> +	[MASTER_GPU_TCU] = &alm_gpu_tcu,
> +	[MASTER_SYS_TCU] = &alm_sys_tcu,
> +	[MASTER_AMPSS_M0] = &chm_apps,
> +	[MASTER_GEM_NOC_CFG] = &qhm_gemnoc_cfg,
> +	[MASTER_COMPUTE_NOC] = &qnm_cmpnoc,
> +	[MASTER_GRAPHICS_3D] = &qnm_gpu,
> +	[MASTER_MNOC_HF_MEM_NOC] = &qnm_mnoc_hf,
> +	[MASTER_MNOC_SF_MEM_NOC] = &qnm_mnoc_sf,
> +	[MASTER_ANOC_PCIE_GEM_NOC] = &qnm_pcie,
> +	[MASTER_SNOC_GC_MEM_NOC] = &qnm_snoc_gc,
> +	[MASTER_SNOC_SF_MEM_NOC] = &qnm_snoc_sf,
> +	[SLAVE_GEM_NOC_SNOC] = &qns_gem_noc_snoc,
> +	[SLAVE_LLCC] = &qns_llcc,
> +	[SLAVE_MEM_NOC_PCIE_SNOC] = &qns_sys_pcie,
> +	[SLAVE_SERVICE_GEM_NOC_1] = &srvc_even_gemnoc,
> +	[SLAVE_SERVICE_GEM_NOC_2] = &srvc_odd_gemnoc,
> +	[SLAVE_SERVICE_GEM_NOC] = &srvc_sys_gemnoc,
> +};
> +
> +static struct qcom_icc_desc sm8250_gem_noc = {
> +	.nodes = gem_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(gem_noc_nodes),
> +	.bcms = gem_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(gem_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *ipa_virt_bcms[] = {
> +	&bcm_ip0,
> +};
> +
> +static struct qcom_icc_node *ipa_virt_nodes[] = {
> +	[MASTER_IPA_CORE] = &ipa_core_master,
> +	[SLAVE_IPA_CORE] = &ipa_core_slave,
> +};
> +
> +static struct qcom_icc_desc sm8250_ipa_virt = {
> +	.nodes = ipa_virt_nodes,
> +	.num_nodes = ARRAY_SIZE(ipa_virt_nodes),
> +	.bcms = ipa_virt_bcms,
> +	.num_bcms = ARRAY_SIZE(ipa_virt_bcms),
> +};
> +
> +static struct qcom_icc_bcm *mc_virt_bcms[] = {
> +	&bcm_acv,
> +	&bcm_mc0,
> +};
> +
> +static struct qcom_icc_node *mc_virt_nodes[] = {
> +	[MASTER_LLCC] = &llcc_mc,
> +	[SLAVE_EBI_CH0] = &ebi,
> +};
> +
> +static struct qcom_icc_desc sm8250_mc_virt = {
> +	.nodes = mc_virt_nodes,
> +	.num_nodes = ARRAY_SIZE(mc_virt_nodes),
> +	.bcms = mc_virt_bcms,
> +	.num_bcms = ARRAY_SIZE(mc_virt_bcms),
> +};
> +
> +static struct qcom_icc_bcm *mmss_noc_bcms[] = {
> +	&bcm_mm0,
> +	&bcm_mm1,
> +	&bcm_mm2,
> +	&bcm_mm3,
> +};
> +
> +static struct qcom_icc_node *mmss_noc_nodes[] = {
> +	[MASTER_CNOC_MNOC_CFG] = &qhm_mnoc_cfg,
> +	[MASTER_CAMNOC_HF] = &qnm_camnoc_hf,
> +	[MASTER_CAMNOC_ICP] = &qnm_camnoc_icp,
> +	[MASTER_CAMNOC_SF] = &qnm_camnoc_sf,
> +	[MASTER_VIDEO_P0] = &qnm_video0,
> +	[MASTER_VIDEO_P1] = &qnm_video1,
> +	[MASTER_VIDEO_PROC] = &qnm_video_cvp,
> +	[MASTER_MDP_PORT0] = &qxm_mdp0,
> +	[MASTER_MDP_PORT1] = &qxm_mdp1,
> +	[MASTER_ROTATOR] = &qxm_rot,
> +	[SLAVE_MNOC_HF_MEM_NOC] = &qns_mem_noc_hf,
> +	[SLAVE_MNOC_SF_MEM_NOC] = &qns_mem_noc_sf,
> +	[SLAVE_SERVICE_MNOC] = &srvc_mnoc,
> +};
> +
> +static struct qcom_icc_desc sm8250_mmss_noc = {
> +	.nodes = mmss_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(mmss_noc_nodes),
> +	.bcms = mmss_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(mmss_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *npu_noc_bcms[] = {
> +};
> +
> +static struct qcom_icc_node *npu_noc_nodes[] = {
> +	[MASTER_NPU_SYS] = &amm_npu_sys,
> +	[MASTER_NPU_CDP] = &amm_npu_sys_cdp_w,
> +	[MASTER_NPU_NOC_CFG] = &qhm_cfg,
> +	[SLAVE_NPU_CAL_DP0] = &qhs_cal_dp0,
> +	[SLAVE_NPU_CAL_DP1] = &qhs_cal_dp1,
> +	[SLAVE_NPU_CP] = &qhs_cp,
> +	[SLAVE_NPU_INT_DMA_BWMON_CFG] = &qhs_dma_bwmon,
> +	[SLAVE_NPU_DPM] = &qhs_dpm,
> +	[SLAVE_ISENSE_CFG] = &qhs_isense,
> +	[SLAVE_NPU_LLM_CFG] = &qhs_llm,
> +	[SLAVE_NPU_TCM] = &qhs_tcm,
> +	[SLAVE_NPU_COMPUTE_NOC] = &qns_npu_sys,
> +	[SLAVE_SERVICE_NPU_NOC] = &srvc_noc,
> +};
> +
> +static struct qcom_icc_desc sm8250_npu_noc = {
> +	.nodes = npu_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(npu_noc_nodes),
> +	.bcms = npu_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(npu_noc_bcms),
> +};
> +
> +static struct qcom_icc_bcm *system_noc_bcms[] = {
> +	&bcm_sn0,
> +	&bcm_sn1,
> +	&bcm_sn11,
> +	&bcm_sn2,
> +	&bcm_sn3,
> +	&bcm_sn4,
> +	&bcm_sn5,
> +	&bcm_sn6,
> +	&bcm_sn7,
> +	&bcm_sn8,
> +	&bcm_sn9,
> +};
> +
> +static struct qcom_icc_node *system_noc_nodes[] = {
> +	[MASTER_SNOC_CFG] = &qhm_snoc_cfg,
> +	[A1NOC_SNOC_MAS] = &qnm_aggre1_noc,
> +	[A2NOC_SNOC_MAS] = &qnm_aggre2_noc,
> +	[MASTER_GEM_NOC_SNOC] = &qnm_gemnoc,
> +	[MASTER_GEM_NOC_PCIE_SNOC] = &qnm_gemnoc_pcie,
> +	[MASTER_PIMEM] = &qxm_pimem,
> +	[MASTER_GIC] = &xm_gic,
> +	[SLAVE_APPSS] = &qhs_apss,
> +	[SNOC_CNOC_SLV] = &qns_cnoc,
> +	[SLAVE_SNOC_GEM_NOC_GC] = &qns_gemnoc_gc,
> +	[SLAVE_SNOC_GEM_NOC_SF] = &qns_gemnoc_sf,
> +	[SLAVE_OCIMEM] = &qxs_imem,
> +	[SLAVE_PIMEM] = &qxs_pimem,
> +	[SLAVE_SERVICE_SNOC] = &srvc_snoc,
> +	[SLAVE_PCIE_0] = &xs_pcie_0,
> +	[SLAVE_PCIE_1] = &xs_pcie_1,
> +	[SLAVE_PCIE_2] = &xs_pcie_modem,
> +	[SLAVE_QDSS_STM] = &xs_qdss_stm,
> +	[SLAVE_TCU] = &xs_sys_tcu_cfg,
> +};
> +
> +static struct qcom_icc_desc sm8250_system_noc = {
> +	.nodes = system_noc_nodes,
> +	.num_nodes = ARRAY_SIZE(system_noc_nodes),
> +	.bcms = system_noc_bcms,
> +	.num_bcms = ARRAY_SIZE(system_noc_bcms),
> +};
> +
> +static int qnoc_probe(struct platform_device *pdev)
> +{
> +	const struct qcom_icc_desc *desc;
> +	struct icc_onecell_data *data;
> +	struct icc_provider *provider;
> +	struct qcom_icc_node **qnodes;
> +	struct qcom_icc_provider *qp;
> +	struct icc_node *node;
> +	size_t num_nodes, i;
> +	int ret;
> +
> +	desc = device_get_match_data(&pdev->dev);
> +	if (!desc)
> +		return -EINVAL;
> +
> +	qnodes = desc->nodes;
> +	num_nodes = desc->num_nodes;
> +
> +	qp = devm_kzalloc(&pdev->dev, sizeof(*qp), GFP_KERNEL);
> +	if (!qp)
> +		return -ENOMEM;
> +
> +	data = devm_kcalloc(&pdev->dev, num_nodes, sizeof(*node), 
> GFP_KERNEL);
> +	if (!data)
> +		return -ENOMEM;
> +
> +	provider = &qp->provider;
> +	provider->dev = &pdev->dev;
> +	provider->set = qcom_icc_set;
> +	provider->pre_aggregate = qcom_icc_pre_aggregate;
> +	provider->aggregate = qcom_icc_aggregate;
> +	provider->xlate = of_icc_xlate_onecell;
> +	INIT_LIST_HEAD(&provider->nodes);
> +	provider->data = data;
> +
> +	qp->dev = &pdev->dev;
> +	qp->bcms = desc->bcms;
> +	qp->num_bcms = desc->num_bcms;
> +
> +	qp->voter = of_bcm_voter_get(qp->dev, NULL);
> +	if (IS_ERR(qp->voter))
> +		return PTR_ERR(qp->voter);
> +
> +	ret = icc_provider_add(provider);
> +	if (ret) {
> +		dev_err(&pdev->dev, "error adding interconnect provider\n");
> +		return ret;
> +	}
> +
> +	for (i = 0; i < num_nodes; i++) {
> +		size_t j;
> +
> +		if (!qnodes[i])
> +			continue;
> +
> +		node = icc_node_create(qnodes[i]->id);
> +		if (IS_ERR(node)) {
> +			ret = PTR_ERR(node);
> +			goto err;
> +		}
> +
> +		node->name = qnodes[i]->name;
> +		node->data = qnodes[i];
> +		icc_node_add(node, provider);
> +
> +		for (j = 0; j < qnodes[i]->num_links; j++)
> +			icc_link_create(node, qnodes[i]->links[j]);
> +
> +		data->nodes[i] = node;
> +	}
> +	data->num_nodes = num_nodes;
> +
> +	for (i = 0; i < qp->num_bcms; i++)
> +		qcom_icc_bcm_init(qp->bcms[i], &pdev->dev);
> +
> +	platform_set_drvdata(pdev, qp);
> +
> +	return 0;
> +err:
> +	icc_nodes_remove(provider);
> +	icc_provider_del(provider);
> +	return ret;
> +}
> +
> +static int qnoc_remove(struct platform_device *pdev)
> +{
> +	struct qcom_icc_provider *qp = platform_get_drvdata(pdev);
> +
> +	icc_nodes_remove(&qp->provider);
> +	return icc_provider_del(&qp->provider);
> +}
> +
> +static const struct of_device_id qnoc_of_match[] = {
> +	{ .compatible = "qcom,sm8250-aggre1-noc",
> +	  .data = &sm8250_aggre1_noc},
> +	{ .compatible = "qcom,sm8250-aggre2-noc",
> +	  .data = &sm8250_aggre2_noc},
> +	{ .compatible = "qcom,sm8250-compute-noc",
> +	  .data = &sm8250_compute_noc},
> +	{ .compatible = "qcom,sm8250-config-noc",
> +	  .data = &sm8250_config_noc},
> +	{ .compatible = "qcom,sm8250-dc-noc",
> +	  .data = &sm8250_dc_noc},
> +	{ .compatible = "qcom,sm8250-gem-noc",
> +	  .data = &sm8250_gem_noc},
> +	{ .compatible = "qcom,sm8250-ipa-virt",
> +	  .data = &sm8250_ipa_virt},
> +	{ .compatible = "qcom,sm8250-mc-virt",
> +	  .data = &sm8250_mc_virt},
> +	{ .compatible = "qcom,sm8250-mmss-noc",
> +	  .data = &sm8250_mmss_noc},
> +	{ .compatible = "qcom,sm8250-npu-noc",
> +	  .data = &sm8250_npu_noc},
> +	{ .compatible = "qcom,sm8250-system-noc",
> +	  .data = &sm8250_system_noc},
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(of, qnoc_of_match);
> +
> +static struct platform_driver qnoc_driver = {
> +	.probe = qnoc_probe,
> +	.remove = qnoc_remove,
> +	.driver = {
> +		.name = "qnoc-sm8250",
> +		.of_match_table = qnoc_of_match,
> +	},
> +};
> +module_platform_driver(qnoc_driver);
> +
> +MODULE_DESCRIPTION("Qualcomm SM8250 NoC driver");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/interconnect/qcom/sm8250.h
> b/drivers/interconnect/qcom/sm8250.h
> new file mode 100644
> index 000000000000..7eb6c709c30d
> --- /dev/null
> +++ b/drivers/interconnect/qcom/sm8250.h
> @@ -0,0 +1,162 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Qualcomm #define SM8250 interconnect IDs
> + *
> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> + */
> +
> +#ifndef __DRIVERS_INTERCONNECT_QCOM_SM8250_H
> +#define __DRIVERS_INTERCONNECT_QCOM_SM8250_H
> +
> +#define SM8250_A1NOC_SNOC_MAS			0
> +#define SM8250_A1NOC_SNOC_SLV			1
> +#define SM8250_A2NOC_SNOC_MAS			2
> +#define SM8250_A2NOC_SNOC_SLV			3
> +#define SM8250_MASTER_A1NOC_CFG			4
> +#define SM8250_MASTER_A2NOC_CFG			5
> +#define SM8250_MASTER_AMPSS_M0			6
> +#define SM8250_MASTER_ANOC_PCIE_GEM_NOC		7
> +#define SM8250_MASTER_CAMNOC_HF			8
> +#define SM8250_MASTER_CAMNOC_ICP		9
> +#define SM8250_MASTER_CAMNOC_SF			10
> +#define SM8250_MASTER_CNOC_A2NOC		11
> +#define SM8250_MASTER_CNOC_DC_NOC		12
> +#define SM8250_MASTER_CNOC_MNOC_CFG		13
> +#define SM8250_MASTER_COMPUTE_NOC		14
> +#define SM8250_MASTER_CRYPTO_CORE_0		15
> +#define SM8250_MASTER_GEM_NOC_CFG		16
> +#define SM8250_MASTER_GEM_NOC_PCIE_SNOC		17
> +#define SM8250_MASTER_GEM_NOC_SNOC		18
> +#define SM8250_MASTER_GIC			19
> +#define SM8250_MASTER_GPU_TCU			20
> +#define SM8250_MASTER_GRAPHICS_3D		21
> +#define SM8250_MASTER_IPA			22
> +#define SM8250_MASTER_IPA_CORE			23
> +#define SM8250_MASTER_LLCC			24
> +#define SM8250_MASTER_MDP_PORT0			25
> +#define SM8250_MASTER_MDP_PORT1			26
> +#define SM8250_MASTER_MNOC_HF_MEM_NOC		27
> +#define SM8250_MASTER_MNOC_SF_MEM_NOC		28
> +#define SM8250_MASTER_NPU			29
> +#define SM8250_MASTER_NPU_CDP			30
> +#define SM8250_MASTER_NPU_NOC_CFG		31
> +#define SM8250_MASTER_NPU_SYS			32
> +#define SM8250_MASTER_PCIE			33
> +#define SM8250_MASTER_PCIE_1			34
> +#define SM8250_MASTER_PCIE_2			35
> +#define SM8250_MASTER_PIMEM			36
> +#define SM8250_MASTER_QDSS_BAM			37
> +#define SM8250_MASTER_QDSS_DAP			38
> +#define SM8250_MASTER_QDSS_ETR			39
> +#define SM8250_MASTER_QSPI_0			40
> +#define SM8250_MASTER_QUP_0			41
> +#define SM8250_MASTER_QUP_1			42
> +#define SM8250_MASTER_QUP_2			43
> +#define SM8250_MASTER_ROTATOR			44
> +#define SM8250_MASTER_SDCC_2			45
> +#define SM8250_MASTER_SDCC_4			46
> +#define SM8250_MASTER_SNOC_CFG			47
> +#define SM8250_MASTER_SNOC_GC_MEM_NOC		48
> +#define SM8250_MASTER_SNOC_SF_MEM_NOC		49
> +#define SM8250_MASTER_SYS_TCU			50
> +#define SM8250_MASTER_TSIF			51
> +#define SM8250_MASTER_UFS_CARD			52
> +#define SM8250_MASTER_UFS_MEM			53
> +#define SM8250_MASTER_USB3			54
> +#define SM8250_MASTER_USB3_1			55
> +#define SM8250_MASTER_VIDEO_P0			56
> +#define SM8250_MASTER_VIDEO_P1			57
> +#define SM8250_MASTER_VIDEO_PROC		58
> +#define SM8250_SLAVE_A1NOC_CFG			59
> +#define SM8250_SLAVE_A2NOC_CFG			60
> +#define SM8250_SLAVE_AHB2PHY_NORTH		61
> +#define SM8250_SLAVE_AHB2PHY_SOUTH		62
> +#define SM8250_SLAVE_ANOC_PCIE_GEM_NOC		63
> +#define SM8250_SLAVE_ANOC_PCIE_GEM_NOC_1	64
> +#define SM8250_SLAVE_AOSS			65
> +#define SM8250_SLAVE_APPSS			66
> +#define SM8250_SLAVE_CAMERA_CFG			67
> +#define SM8250_SLAVE_CDSP_CFG			68
> +#define SM8250_SLAVE_CDSP_MEM_NOC		69
> +#define SM8250_SLAVE_CLK_CTL			70
> +#define SM8250_SLAVE_CNOC_A2NOC			71
> +#define SM8250_SLAVE_CNOC_DDRSS			72
> +#define SM8250_SLAVE_CNOC_MNOC_CFG		73
> +#define SM8250_SLAVE_CRYPTO_0_CFG		74
> +#define SM8250_SLAVE_CX_RDPM			75
> +#define SM8250_SLAVE_DCC_CFG			76
> +#define SM8250_SLAVE_DISPLAY_CFG		77
> +#define SM8250_SLAVE_EBI_CH0			78
> +#define SM8250_SLAVE_GEM_NOC_CFG		79
> +#define SM8250_SLAVE_GEM_NOC_SNOC		80
> +#define SM8250_SLAVE_GRAPHICS_3D_CFG		81
> +#define SM8250_SLAVE_IMEM_CFG			82
> +#define SM8250_SLAVE_IPA_CFG			83
> +#define SM8250_SLAVE_IPA_CORE			84
> +#define SM8250_SLAVE_IPC_ROUTER_CFG		85
> +#define SM8250_SLAVE_ISENSE_CFG			86
> +#define SM8250_SLAVE_LLCC			87
> +#define SM8250_SLAVE_LLCC_CFG			88
> +#define SM8250_SLAVE_LPASS			89
> +#define SM8250_SLAVE_MEM_NOC_PCIE_SNOC		90
> +#define SM8250_SLAVE_MNOC_HF_MEM_NOC		91
> +#define SM8250_SLAVE_MNOC_SF_MEM_NOC		92
> +#define SM8250_SLAVE_NPU_CAL_DP0		93
> +#define SM8250_SLAVE_NPU_CAL_DP1		94
> +#define SM8250_SLAVE_NPU_CFG			95
> +#define SM8250_SLAVE_NPU_COMPUTE_NOC		96
> +#define SM8250_SLAVE_NPU_CP			97
> +#define SM8250_SLAVE_NPU_DPM			98
> +#define SM8250_SLAVE_NPU_INT_DMA_BWMON_CFG	99
> +#define SM8250_SLAVE_NPU_LLM_CFG		100
> +#define SM8250_SLAVE_NPU_TCM			101
> +#define SM8250_SLAVE_OCIMEM			102
> +#define SM8250_SLAVE_PCIE_0			103
> +#define SM8250_SLAVE_PCIE_0_CFG			104
> +#define SM8250_SLAVE_PCIE_1			105
> +#define SM8250_SLAVE_PCIE_1_CFG			106
> +#define SM8250_SLAVE_PCIE_2			107
> +#define SM8250_SLAVE_PCIE_2_CFG			108
> +#define SM8250_SLAVE_PDM			109
> +#define SM8250_SLAVE_PIMEM			110
> +#define SM8250_SLAVE_PIMEM_CFG			111
> +#define SM8250_SLAVE_PRNG			112
> +#define SM8250_SLAVE_QDSS_CFG			113
> +#define SM8250_SLAVE_QDSS_STM			114
> +#define SM8250_SLAVE_QSPI_0			115
> +#define SM8250_SLAVE_QUP_0			116
> +#define SM8250_SLAVE_QUP_1			117
> +#define SM8250_SLAVE_QUP_2			118
> +#define SM8250_SLAVE_RBCPR_CX_CFG		119
> +#define SM8250_SLAVE_RBCPR_MMCX_CFG		120
> +#define SM8250_SLAVE_RBCPR_MX_CFG		121
> +#define SM8250_SLAVE_SDCC_2			122
> +#define SM8250_SLAVE_SDCC_4			123
> +#define SM8250_SLAVE_SERVICE_A1NOC		124
> +#define SM8250_SLAVE_SERVICE_A2NOC		125
> +#define SM8250_SLAVE_SERVICE_CNOC		126
> +#define SM8250_SLAVE_SERVICE_GEM_NOC		127
> +#define SM8250_SLAVE_SERVICE_GEM_NOC_1		128
> +#define SM8250_SLAVE_SERVICE_GEM_NOC_2		129
> +#define SM8250_SLAVE_SERVICE_MNOC		130
> +#define SM8250_SLAVE_SERVICE_NPU_NOC		131
> +#define SM8250_SLAVE_SERVICE_SNOC		132
> +#define SM8250_SLAVE_SNOC_CFG			133
> +#define SM8250_SLAVE_SNOC_GEM_NOC_GC		134
> +#define SM8250_SLAVE_SNOC_GEM_NOC_SF		135
> +#define SM8250_SLAVE_TCSR			136
> +#define SM8250_SLAVE_TCU			137
> +#define SM8250_SLAVE_TLMM_NORTH			138
> +#define SM8250_SLAVE_TLMM_SOUTH			139
> +#define SM8250_SLAVE_TLMM_WEST			140
> +#define SM8250_SLAVE_TSIF			141
> +#define SM8250_SLAVE_UFS_CARD_CFG		142
> +#define SM8250_SLAVE_UFS_MEM_CFG		143
> +#define SM8250_SLAVE_USB3			144
> +#define SM8250_SLAVE_USB3_1			145
> +#define SM8250_SLAVE_VENUS_CFG			146
> +#define SM8250_SLAVE_VSENSE_CTRL_CFG		147
> +#define SM8250_SNOC_CNOC_MAS			148
> +#define SM8250_SNOC_CNOC_SLV			149
> +
> +#endif

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 13%]

* Re: [PATCH v3 6/7] arm64: dts: qcom: sm8150: add interconnect nodes
  @ 2020-07-28 11:55 13%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-28 11:55 UTC (permalink / raw)
  To: Jonathan Marek
  Cc: linux-arm-msm, Andy Gross, Bjorn Andersson, Rob Herring,
	devicetree, linux-kernel, linux-kernel-owner

On 2020-07-28 08:08, Jonathan Marek wrote:
> Add the interconnect dts nodes for sm8150.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 82 ++++++++++++++++++++++++++++
>  1 file changed, 82 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 33ff99132f4f..e4689c27224b 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -11,6 +11,7 @@
>  #include <dt-bindings/clock/qcom,rpmh.h>
>  #include <dt-bindings/clock/qcom,gcc-sm8150.h>
>  #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
> +#include <dt-bindings/interconnect/qcom,sm8150.h>
>  #include <dt-bindings/thermal/thermal.h>
> 
>  / {
> @@ -440,6 +441,55 @@ uart2: serial@a90000 {
>  			};
>  		};
> 
> +		config_noc: interconnect@1500000 {
> +			compatible = "qcom,sm8150-config-noc";
> +			reg = <0 0x01500000 0 0x7400>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		system_noc: interconnect@1620000 {
> +			compatible = "qcom,sm8150-system-noc";
> +			reg = <0 0x01620000 0 0x19400>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		mc_virt: interconnect@163a000 {
> +			compatible = "qcom,sm8150-mc-virt";
> +			reg = <0 0x0163a000 0 0x1000>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		aggre1_noc: interconnect@16e0000 {
> +			compatible = "qcom,sm8150-aggre1-noc";
> +			reg = <0 0x016e0000 0 0xd080>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		aggre2_noc: interconnect@1700000 {
> +			compatible = "qcom,sm8150-aggre2-noc";
> +			reg = <0 0x01700000 0 0x20000>;

Though aggre2_noc might need a
larger space in the future lets
lands ^^ for now.

Reviewed-by: Sibi Sankar <sibis@codeaurora.org>

> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		compute_noc: interconnect@1720000 {
> +			compatible = "qcom,sm8150-compute-noc";
> +			reg = <0 0x01720000 0 0x7000>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		mmss_noc: interconnect@1740000 {
> +			compatible = "qcom,sm8150-mmss-noc";
> +			reg = <0 0x01740000 0 0x1c100>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
>  		ufs_mem_hc: ufshc@1d84000 {
>  			compatible = "qcom,sm8150-ufshc", "qcom,ufshc",
>  				     "jedec,ufs-2.0";
> @@ -510,6 +560,13 @@ ufs_mem_phy_lanes: lanes@1d87400 {
>  			};
>  		};
> 
> +		ipa_virt: interconnect@1e00000 {
> +			compatible = "qcom,sm8150-ipa-virt";
> +			reg = <0 0x01e00000 0 0x1000>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
>  		tcsr_mutex_regs: syscon@1f40000 {
>  			compatible = "syscon";
>  			reg = <0x0 0x01f40000 0x0 0x40000>;
> @@ -860,6 +917,20 @@ usb_2_ssphy: lane@88eb200 {
>  			};
>  		};
> 
> +		dc_noc: interconnect@9160000 {
> +			compatible = "qcom,sm8150-dc-noc";
> +			reg = <0 0x09160000 0 0x3200>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		gem_noc: interconnect@9680000 {
> +			compatible = "qcom,sm8150-gem-noc";
> +			reg = <0 0x09680000 0 0x3e200>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
>  		usb_1: usb@a6f8800 {
>  			compatible = "qcom,sm8150-dwc3", "qcom,dwc3";
>  			reg = <0 0x0a6f8800 0 0x400>;
> @@ -950,6 +1021,13 @@ usb_2_dwc3: dwc3@a800000 {
>  			};
>  		};
> 
> +		camnoc_virt: interconnect@ac00000 {
> +			compatible = "qcom,sm8150-camnoc-virt";
> +			reg = <0 0x0ac00000 0 0x1000>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
>  		aoss_qmp: power-controller@c300000 {
>  			compatible = "qcom,sm8150-aoss-qmp";
>  			reg = <0x0 0x0c300000 0x0 0x100000>;
> @@ -1280,6 +1358,10 @@ rpmhpd_opp_turbo_l1: opp11 {
>  					};
>  				};
>  			};
> +
> +			apps_bcm_voter: bcm_voter {
> +				compatible = "qcom,bcm-voter";
> +			};
>  		};
> 
>  		cpufreq_hw: cpufreq@18323000 {

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 13%]

* Re: [PATCH v3 7/7] arm64: dts: qcom: sm8250: add interconnect nodes
  @ 2020-07-28 12:02 13%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-07-28 12:02 UTC (permalink / raw)
  To: Jonathan Marek
  Cc: linux-arm-msm, Andy Gross, Bjorn Andersson, Rob Herring,
	devicetree, linux-kernel, linux-kernel-owner

On 2020-07-28 08:08, Jonathan Marek wrote:
> Add the interconnect dts nodes for sm8250.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>

Reviewed-by: Sibi Sankar <sibis@codeaurora.org>

> ---
>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 82 ++++++++++++++++++++++++++++
>  1 file changed, 82 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 636e2196138c..945bd4a9d640 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -7,6 +7,7 @@
>  #include <dt-bindings/clock/qcom,gcc-sm8250.h>
>  #include <dt-bindings/clock/qcom,gpucc-sm8250.h>
>  #include <dt-bindings/clock/qcom,rpmh.h>
> +#include <dt-bindings/interconnect/qcom,sm8250.h>
>  #include <dt-bindings/mailbox/qcom-ipcc.h>
>  #include <dt-bindings/power/qcom-aoss-qmp.h>
>  #include <dt-bindings/power/qcom-rpmpd.h>
> @@ -978,6 +979,55 @@ spi13: spi@a94000 {
>  			};
>  		};
> 
> +		config_noc: interconnect@1500000 {
> +			compatible = "qcom,sm8250-config-noc";
> +			reg = <0 0x01500000 0 0xa580>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		system_noc: interconnect@1620000 {
> +			compatible = "qcom,sm8250-system-noc";
> +			reg = <0 0x01620000 0 0x1c200>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		mc_virt: interconnect@163d000 {
> +			compatible = "qcom,sm8250-mc-virt";
> +			reg = <0 0x0163d000 0 0x1000>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		aggre1_noc: interconnect@16e0000 {
> +			compatible = "qcom,sm8250-aggre1-noc";
> +			reg = <0 0x016e0000 0 0x1f180>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		aggre2_noc: interconnect@1700000 {
> +			compatible = "qcom,sm8250-aggre2-noc";
> +			reg = <0 0x01700000 0 0x33000>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		compute_noc: interconnect@1733000 {
> +			compatible = "qcom,sm8250-compute-noc";
> +			reg = <0 0x01733000 0 0xa180>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		mmss_noc: interconnect@1740000 {
> +			compatible = "qcom,sm8250-mmss-noc";
> +			reg = <0 0x01740000 0 0x1f080>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
>  		ufs_mem_hc: ufshc@1d84000 {
>  			compatible = "qcom,sm8250-ufshc", "qcom,ufshc",
>  				     "jedec,ufs-2.0";
> @@ -1050,6 +1100,13 @@ ufs_mem_phy_lanes: lanes@1d87400 {
>  			};
>  		};
> 
> +		ipa_virt: interconnect@1e00000 {
> +			compatible = "qcom,sm8250-ipa-virt";
> +			reg = <0 0x01e00000 0 0x1000>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
>  		tcsr_mutex_regs: syscon@1f40000 {
>  			compatible = "syscon";
>  			reg = <0x0 0x01f40000 0x0 0x40000>;
> @@ -1364,6 +1421,27 @@ usb_2_ssphy: lane@88eb200 {
>  			};
>  		};
> 
> +		dc_noc: interconnect@90c0000 {
> +			compatible = "qcom,sm8250-dc-noc";
> +			reg = <0 0x090c0000 0 0x4200>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		gem_noc: interconnect@9100000 {
> +			compatible = "qcom,sm8250-gem-noc";
> +			reg = <0 0x09100000 0 0xb4000>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
> +		npu_noc: interconnect@9990000 {
> +			compatible = "qcom,sm8250-npu-noc";
> +			reg = <0 0x09990000 0 0x1600>;
> +			#interconnect-cells = <1>;
> +			qcom,bcm-voters = <&apps_bcm_voter>;
> +		};
> +
>  		usb_1: usb@a6f8800 {
>  			compatible = "qcom,sm8250-dwc3", "qcom,dwc3";
>  			reg = <0 0x0a6f8800 0 0x400>;
> @@ -2359,6 +2437,10 @@ rpmhpd_opp_turbo_l1: opp10 {
>  					};
>  				};
>  			};
> +
> +			apps_bcm_voter: bcm_voter {
> +				compatible = "qcom,bcm-voter";
> +			};
>  		};
>  	};

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 13%]

* [PATCH 2/7] interconnect: qcom: Add OSM L3 support on SM8150
  2020-08-01 12:30 15% [PATCH 0/7] Add L3 provider support for SM8150/SM8250 Sibi Sankar
  2020-08-01 12:30 22% ` [PATCH 1/7] dt-bindings: interconnect: Add OSM L3 DT binding on SM8150 Sibi Sankar
@ 2020-08-01 12:30 21% ` Sibi Sankar
  2020-08-01 12:30 20% ` [PATCH 3/7] interconnect: qcom: Lay the groundwork for adding EPSS support Sibi Sankar
                   ` (4 subsequent siblings)
  6 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-08-01 12:30 UTC (permalink / raw)
  To: robh+dt, georgi.djakov
  Cc: bjorn.andersson, agross, linux-kernel, devicetree, linux-arm-msm,
	jonathan, linux-pm, Sibi Sankar

Add Operation State Manager (OSM) L3 interconnect provider support on
SM8150 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 drivers/interconnect/qcom/osm-l3.c | 15 +++++++++++++++
 drivers/interconnect/qcom/sm8150.h |  2 ++
 2 files changed, 17 insertions(+)

diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c
index 96fb9ff5ff2e8..00831c33e0fe5 100644
--- a/drivers/interconnect/qcom/osm-l3.c
+++ b/drivers/interconnect/qcom/osm-l3.c
@@ -16,6 +16,7 @@
 
 #include "sc7180.h"
 #include "sdm845.h"
+#include "sm8150.h"
 
 #define LUT_MAX_ENTRIES			40U
 #define LUT_SRC				GENMASK(31, 30)
@@ -96,6 +97,19 @@ static const struct qcom_icc_desc sc7180_icc_osm_l3 = {
 	.num_nodes = ARRAY_SIZE(sc7180_osm_l3_nodes),
 };
 
+DEFINE_QNODE(sm8150_osm_apps_l3, SM8150_MASTER_OSM_L3_APPS, 32, SM8150_SLAVE_OSM_L3);
+DEFINE_QNODE(sm8150_osm_l3, SM8150_SLAVE_OSM_L3, 32);
+
+static struct qcom_icc_node *sm8150_osm_l3_nodes[] = {
+	[MASTER_OSM_L3_APPS] = &sm8150_osm_apps_l3,
+	[SLAVE_OSM_L3] = &sm8150_osm_l3,
+};
+
+static const struct qcom_icc_desc sm8150_icc_osm_l3 = {
+	.nodes = sm8150_osm_l3_nodes,
+	.num_nodes = ARRAY_SIZE(sm8150_osm_l3_nodes),
+};
+
 static int qcom_icc_set(struct icc_node *src, struct icc_node *dst)
 {
 	struct qcom_osm_l3_icc_provider *qp;
@@ -258,6 +272,7 @@ static int qcom_osm_l3_probe(struct platform_device *pdev)
 static const struct of_device_id osm_l3_of_match[] = {
 	{ .compatible = "qcom,sc7180-osm-l3", .data = &sc7180_icc_osm_l3 },
 	{ .compatible = "qcom,sdm845-osm-l3", .data = &sdm845_icc_osm_l3 },
+	{ .compatible = "qcom,sm8150-osm-l3", .data = &sm8150_icc_osm_l3 },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, osm_l3_of_match);
diff --git a/drivers/interconnect/qcom/sm8150.h b/drivers/interconnect/qcom/sm8150.h
index 3e01ac76ae1db..97996f64d799c 100644
--- a/drivers/interconnect/qcom/sm8150.h
+++ b/drivers/interconnect/qcom/sm8150.h
@@ -148,5 +148,7 @@
 #define SM8150_SLAVE_VSENSE_CTRL_CFG		137
 #define SM8150_SNOC_CNOC_MAS			138
 #define SM8150_SNOC_CNOC_SLV			139
+#define SM8150_MASTER_OSM_L3_APPS		140
+#define SM8150_SLAVE_OSM_L3			141
 
 #endif
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 21%]

* [PATCH 0/7] Add L3 provider support for SM8150/SM8250
@ 2020-08-01 12:30 15% Sibi Sankar
  2020-08-01 12:30 22% ` [PATCH 1/7] dt-bindings: interconnect: Add OSM L3 DT binding on SM8150 Sibi Sankar
                   ` (6 more replies)
  0 siblings, 7 replies; 200+ results
From: Sibi Sankar @ 2020-08-01 12:30 UTC (permalink / raw)
  To: robh+dt, georgi.djakov
  Cc: bjorn.andersson, agross, linux-kernel, devicetree, linux-arm-msm,
	jonathan, linux-pm, Sibi Sankar

Add Operation State Manager (OSM) L3 provider support on SM8150 and Epoch
Subsystem (EPSS) L3 provider support on SM8250 SoCs.

Depends on: https://patchwork.kernel.org/cover/11687925/

Sibi Sankar (7):
  dt-bindings: interconnect: Add OSM L3 DT binding on SM8150
  interconnect: qcom: Add OSM L3 support on SM8150
  interconnect: qcom: Lay the groundwork for adding EPSS support
  dt-bindings: interconnect: Add EPSS L3 DT binding on SM8250
  interconnect: qcom: Add EPSS L3 support on SM8250
  arm64: dts: qcom: sm8150: Add OSM L3 interconnect provider
  arm64: dts: qcom: sm8250: Add EPSS L3 interconnect provider

 .../bindings/interconnect/qcom,osm-l3.yaml    |  2 +
 arch/arm64/boot/dts/qcom/sm8150.dtsi          | 11 +++
 arch/arm64/boot/dts/qcom/sm8250.dtsi          | 11 +++
 drivers/interconnect/qcom/osm-l3.c            | 75 ++++++++++++++++---
 drivers/interconnect/qcom/sm8150.h            |  2 +
 drivers/interconnect/qcom/sm8250.h            |  2 +
 .../dt-bindings/interconnect/qcom,osm-l3.h    |  3 +
 7 files changed, 95 insertions(+), 11 deletions(-)

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 15%]

* [PATCH 1/7] dt-bindings: interconnect: Add OSM L3 DT binding on SM8150
  2020-08-01 12:30 15% [PATCH 0/7] Add L3 provider support for SM8150/SM8250 Sibi Sankar
@ 2020-08-01 12:30 22% ` Sibi Sankar
  2020-08-17 21:16  0%   ` Rob Herring
  2020-08-01 12:30 21% ` [PATCH 2/7] interconnect: qcom: Add OSM L3 support " Sibi Sankar
                   ` (5 subsequent siblings)
  6 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-08-01 12:30 UTC (permalink / raw)
  To: robh+dt, georgi.djakov
  Cc: bjorn.andersson, agross, linux-kernel, devicetree, linux-arm-msm,
	jonathan, linux-pm, Sibi Sankar

Add Operation State Manager (OSM) L3 interconnect provider binding on
SM8150 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
index 91f70c9067d12..b6945c11eb46b 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
@@ -19,6 +19,7 @@ properties:
     enum:
       - qcom,sc7180-osm-l3
       - qcom,sdm845-osm-l3
+      - qcom,sm8150-osm-l3
 
   reg:
     maxItems: 1
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 22%]

* [PATCH 5/7] interconnect: qcom: Add EPSS L3 support on SM8250
  2020-08-01 12:30 15% [PATCH 0/7] Add L3 provider support for SM8150/SM8250 Sibi Sankar
                   ` (3 preceding siblings ...)
  2020-08-01 12:30 22% ` [PATCH 4/7] dt-bindings: interconnect: Add EPSS L3 DT binding on SM8250 Sibi Sankar
@ 2020-08-01 12:30 21% ` Sibi Sankar
  2020-08-01 12:30 22% ` [PATCH 6/7] arm64: dts: qcom: sm8150: Add OSM L3 interconnect provider Sibi Sankar
  2020-08-01 12:30 22% ` [PATCH 7/7] arm64: dts: qcom: sm8250: Add EPSS " Sibi Sankar
  6 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-08-01 12:30 UTC (permalink / raw)
  To: robh+dt, georgi.djakov
  Cc: bjorn.andersson, agross, linux-kernel, devicetree, linux-arm-msm,
	jonathan, linux-pm, Sibi Sankar

Add Epoch Subsystem (EPSS) L3 interconnect provider support on
SM8250 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 drivers/interconnect/qcom/osm-l3.c | 23 +++++++++++++++++++++++
 drivers/interconnect/qcom/sm8250.h |  2 ++
 2 files changed, 25 insertions(+)

diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c
index 27c9ece52efda..cbf4ef04491df 100644
--- a/drivers/interconnect/qcom/osm-l3.c
+++ b/drivers/interconnect/qcom/osm-l3.c
@@ -17,6 +17,7 @@
 #include "sc7180.h"
 #include "sdm845.h"
 #include "sm8150.h"
+#include "sm8250.h"
 
 #define LUT_MAX_ENTRIES			40U
 #define LUT_SRC				GENMASK(31, 30)
@@ -29,6 +30,11 @@
 #define OSM_REG_FREQ_LUT		0x110
 #define OSM_REG_PERF_STATE		0x920
 
+/* EPSS Register offsets */
+#define EPSS_LUT_ROW_SIZE		4
+#define EPSS_REG_FREQ_LUT		0x100
+#define EPSS_REG_PERF_STATE		0x320
+
 #define OSM_L3_MAX_LINKS		1
 
 #define to_qcom_provider(_provider) \
@@ -123,6 +129,22 @@ static const struct qcom_icc_desc sm8150_icc_osm_l3 = {
 	.reg_perf_state = OSM_REG_PERF_STATE,
 };
 
+DEFINE_QNODE(sm8250_epss_apps_l3, SM8250_MASTER_EPSS_L3_APPS, 32, SM8250_SLAVE_EPSS_L3);
+DEFINE_QNODE(sm8250_epss_l3, SM8250_SLAVE_EPSS_L3, 32);
+
+static struct qcom_icc_node *sm8250_epss_l3_nodes[] = {
+	[MASTER_EPSS_L3_APPS] = &sm8250_epss_apps_l3,
+	[SLAVE_EPSS_L3_SHARED] = &sm8250_epss_l3,
+};
+
+static const struct qcom_icc_desc sm8250_icc_epss_l3 = {
+	.nodes = sm8250_epss_l3_nodes,
+	.num_nodes = ARRAY_SIZE(sm8250_epss_l3_nodes),
+	.lut_row_size = EPSS_LUT_ROW_SIZE,
+	.reg_freq_lut = EPSS_REG_FREQ_LUT,
+	.reg_perf_state = EPSS_REG_PERF_STATE,
+};
+
 static int qcom_icc_set(struct icc_node *src, struct icc_node *dst)
 {
 	struct qcom_osm_l3_icc_provider *qp;
@@ -288,6 +310,7 @@ static const struct of_device_id osm_l3_of_match[] = {
 	{ .compatible = "qcom,sc7180-osm-l3", .data = &sc7180_icc_osm_l3 },
 	{ .compatible = "qcom,sdm845-osm-l3", .data = &sdm845_icc_osm_l3 },
 	{ .compatible = "qcom,sm8150-osm-l3", .data = &sm8150_icc_osm_l3 },
+	{ .compatible = "qcom,sm8250-epss-l3", .data = &sm8250_icc_epss_l3 },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, osm_l3_of_match);
diff --git a/drivers/interconnect/qcom/sm8250.h b/drivers/interconnect/qcom/sm8250.h
index 7eb6c709c30d1..b31fb431a20fc 100644
--- a/drivers/interconnect/qcom/sm8250.h
+++ b/drivers/interconnect/qcom/sm8250.h
@@ -158,5 +158,7 @@
 #define SM8250_SLAVE_VSENSE_CTRL_CFG		147
 #define SM8250_SNOC_CNOC_MAS			148
 #define SM8250_SNOC_CNOC_SLV			149
+#define SM8250_MASTER_EPSS_L3_APPS		150
+#define SM8250_SLAVE_EPSS_L3			151
 
 #endif
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 21%]

* [PATCH 4/7] dt-bindings: interconnect: Add EPSS L3 DT binding on SM8250
  2020-08-01 12:30 15% [PATCH 0/7] Add L3 provider support for SM8150/SM8250 Sibi Sankar
                   ` (2 preceding siblings ...)
  2020-08-01 12:30 20% ` [PATCH 3/7] interconnect: qcom: Lay the groundwork for adding EPSS support Sibi Sankar
@ 2020-08-01 12:30 22% ` Sibi Sankar
  2020-08-17 21:16  0%   ` Rob Herring
  2020-08-01 12:30 21% ` [PATCH 5/7] interconnect: qcom: Add EPSS L3 support " Sibi Sankar
                   ` (2 subsequent siblings)
  6 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-08-01 12:30 UTC (permalink / raw)
  To: robh+dt, georgi.djakov
  Cc: bjorn.andersson, agross, linux-kernel, devicetree, linux-arm-msm,
	jonathan, linux-pm, Sibi Sankar

Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SM8250
SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 .../devicetree/bindings/interconnect/qcom,osm-l3.yaml          | 1 +
 include/dt-bindings/interconnect/qcom,osm-l3.h                 | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
index b6945c11eb46b..d6a95c3cb26f2 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
@@ -20,6 +20,7 @@ properties:
       - qcom,sc7180-osm-l3
       - qcom,sdm845-osm-l3
       - qcom,sm8150-osm-l3
+      - qcom,sm8250-epss-l3
 
   reg:
     maxItems: 1
diff --git a/include/dt-bindings/interconnect/qcom,osm-l3.h b/include/dt-bindings/interconnect/qcom,osm-l3.h
index 54858ff7674d7..61ef649ae5655 100644
--- a/include/dt-bindings/interconnect/qcom,osm-l3.h
+++ b/include/dt-bindings/interconnect/qcom,osm-l3.h
@@ -9,4 +9,7 @@
 #define MASTER_OSM_L3_APPS	0
 #define SLAVE_OSM_L3		1
 
+#define MASTER_EPSS_L3_APPS	0
+#define SLAVE_EPSS_L3_SHARED	1
+
 #endif
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 22%]

* [PATCH 6/7] arm64: dts: qcom: sm8150: Add OSM L3 interconnect provider
  2020-08-01 12:30 15% [PATCH 0/7] Add L3 provider support for SM8150/SM8250 Sibi Sankar
                   ` (4 preceding siblings ...)
  2020-08-01 12:30 21% ` [PATCH 5/7] interconnect: qcom: Add EPSS L3 support " Sibi Sankar
@ 2020-08-01 12:30 22% ` Sibi Sankar
  2020-09-09  8:05  0%   ` Georgi Djakov
  2020-08-01 12:30 22% ` [PATCH 7/7] arm64: dts: qcom: sm8250: Add EPSS " Sibi Sankar
  6 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-08-01 12:30 UTC (permalink / raw)
  To: robh+dt, georgi.djakov
  Cc: bjorn.andersson, agross, linux-kernel, devicetree, linux-arm-msm,
	jonathan, linux-pm, Sibi Sankar

Add Operation State Manager (OSM) L3 interconnect provider node on
SM8150 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 0f6d84e8fd299..8563afd205ee9 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -10,6 +10,7 @@
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/clock/qcom,gcc-sm8150.h>
+#include <dt-bindings/interconnect/qcom,osm-l3.h>
 #include <dt-bindings/interconnect/qcom,sm8150.h>
 #include <dt-bindings/thermal/thermal.h>
 
@@ -1184,6 +1185,16 @@ apps_bcm_voter: bcm_voter {
 			};
 		};
 
+		osm_l3: interconnect@18321000 {
+			compatible = "qcom,sm8150-osm-l3";
+			reg = <0 0x18321000 0 0x1400>;
+
+			clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
+			clock-names = "xo", "alternate";
+
+			#interconnect-cells = <1>;
+		};
+
 		cpufreq_hw: cpufreq@18323000 {
 			compatible = "qcom,cpufreq-hw";
 			reg = <0 0x18323000 0 0x1400>, <0 0x18325800 0 0x1400>,
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 22%]

* [PATCH 7/7] arm64: dts: qcom: sm8250: Add EPSS L3 interconnect provider
  2020-08-01 12:30 15% [PATCH 0/7] Add L3 provider support for SM8150/SM8250 Sibi Sankar
                   ` (5 preceding siblings ...)
  2020-08-01 12:30 22% ` [PATCH 6/7] arm64: dts: qcom: sm8150: Add OSM L3 interconnect provider Sibi Sankar
@ 2020-08-01 12:30 22% ` Sibi Sankar
  6 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-08-01 12:30 UTC (permalink / raw)
  To: robh+dt, georgi.djakov
  Cc: bjorn.andersson, agross, linux-kernel, devicetree, linux-arm-msm,
	jonathan, linux-pm, Sibi Sankar

Add Epoch Subsystem (EPSS) L3 interconnect provider node on SM8250
SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 73f02f712d035..2bcdb7a3b9fef 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -6,6 +6,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/interconnect/qcom,osm-l3.h>
 #include <dt-bindings/interconnect/qcom,sm8250.h>
 #include <dt-bindings/mailbox/qcom-ipcc.h>
 #include <dt-bindings/power/qcom-aoss-qmp.h>
@@ -2150,6 +2151,16 @@ apps_bcm_voter: bcm_voter {
 				compatible = "qcom,bcm-voter";
 			};
 		};
+
+		epss_l3: interconnect@18591000 {
+			compatible = "qcom,sm8250-epss-l3";
+			reg = <0 0x18590000 0 0x1000>;
+
+			clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
+			clock-names = "xo", "alternate";
+
+			#interconnect-cells = <1>;
+		};
 	};
 
 	timer {
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 22%]

* [PATCH 3/7] interconnect: qcom: Lay the groundwork for adding EPSS support
  2020-08-01 12:30 15% [PATCH 0/7] Add L3 provider support for SM8150/SM8250 Sibi Sankar
  2020-08-01 12:30 22% ` [PATCH 1/7] dt-bindings: interconnect: Add OSM L3 DT binding on SM8150 Sibi Sankar
  2020-08-01 12:30 21% ` [PATCH 2/7] interconnect: qcom: Add OSM L3 support " Sibi Sankar
@ 2020-08-01 12:30 20% ` Sibi Sankar
  2020-08-01 12:30 22% ` [PATCH 4/7] dt-bindings: interconnect: Add EPSS L3 DT binding on SM8250 Sibi Sankar
                   ` (3 subsequent siblings)
  6 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-08-01 12:30 UTC (permalink / raw)
  To: robh+dt, georgi.djakov
  Cc: bjorn.andersson, agross, linux-kernel, devicetree, linux-arm-msm,
	jonathan, linux-pm, Sibi Sankar

Lay the groundwork for adding Epoch Subsystem (EPSS) L3 support on
SM8250.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 drivers/interconnect/qcom/osm-l3.c | 37 +++++++++++++++++++++---------
 1 file changed, 26 insertions(+), 11 deletions(-)

diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c
index 00831c33e0fe5..27c9ece52efda 100644
--- a/drivers/interconnect/qcom/osm-l3.c
+++ b/drivers/interconnect/qcom/osm-l3.c
@@ -21,13 +21,13 @@
 #define LUT_MAX_ENTRIES			40U
 #define LUT_SRC				GENMASK(31, 30)
 #define LUT_L_VAL			GENMASK(7, 0)
-#define LUT_ROW_SIZE			32
 #define CLK_HW_DIV			2
 
-/* Register offsets */
+/* OSM Register offsets */
 #define REG_ENABLE			0x0
-#define REG_FREQ_LUT			0x110
-#define REG_PERF_STATE			0x920
+#define OSM_LUT_ROW_SIZE		32
+#define OSM_REG_FREQ_LUT		0x110
+#define OSM_REG_PERF_STATE		0x920
 
 #define OSM_L3_MAX_LINKS		1
 
@@ -37,6 +37,7 @@
 struct qcom_osm_l3_icc_provider {
 	void __iomem *base;
 	unsigned int max_state;
+	unsigned int reg_perf_state;
 	unsigned long lut_tables[LUT_MAX_ENTRIES];
 	struct icc_provider provider;
 };
@@ -60,6 +61,9 @@ struct qcom_icc_node {
 struct qcom_icc_desc {
 	struct qcom_icc_node **nodes;
 	size_t num_nodes;
+	unsigned int lut_row_size;
+	unsigned int reg_freq_lut;
+	unsigned int reg_perf_state;
 };
 
 #define DEFINE_QNODE(_name, _id, _buswidth, ...)			\
@@ -82,6 +86,9 @@ static struct qcom_icc_node *sdm845_osm_l3_nodes[] = {
 static const struct qcom_icc_desc sdm845_icc_osm_l3 = {
 	.nodes = sdm845_osm_l3_nodes,
 	.num_nodes = ARRAY_SIZE(sdm845_osm_l3_nodes),
+	.lut_row_size = OSM_LUT_ROW_SIZE,
+	.reg_freq_lut = OSM_REG_FREQ_LUT,
+	.reg_perf_state = OSM_REG_PERF_STATE,
 };
 
 DEFINE_QNODE(sc7180_osm_apps_l3, SC7180_MASTER_OSM_L3_APPS, 16, SC7180_SLAVE_OSM_L3);
@@ -95,6 +102,9 @@ static struct qcom_icc_node *sc7180_osm_l3_nodes[] = {
 static const struct qcom_icc_desc sc7180_icc_osm_l3 = {
 	.nodes = sc7180_osm_l3_nodes,
 	.num_nodes = ARRAY_SIZE(sc7180_osm_l3_nodes),
+	.lut_row_size = OSM_LUT_ROW_SIZE,
+	.reg_freq_lut = OSM_REG_FREQ_LUT,
+	.reg_perf_state = OSM_REG_PERF_STATE,
 };
 
 DEFINE_QNODE(sm8150_osm_apps_l3, SM8150_MASTER_OSM_L3_APPS, 32, SM8150_SLAVE_OSM_L3);
@@ -108,6 +118,9 @@ static struct qcom_icc_node *sm8150_osm_l3_nodes[] = {
 static const struct qcom_icc_desc sm8150_icc_osm_l3 = {
 	.nodes = sm8150_osm_l3_nodes,
 	.num_nodes = ARRAY_SIZE(sm8150_osm_l3_nodes),
+	.lut_row_size = OSM_LUT_ROW_SIZE,
+	.reg_freq_lut = OSM_REG_FREQ_LUT,
+	.reg_perf_state = OSM_REG_PERF_STATE,
 };
 
 static int qcom_icc_set(struct icc_node *src, struct icc_node *dst)
@@ -138,7 +151,7 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst)
 			break;
 	}
 
-	writel_relaxed(index, qp->base + REG_PERF_STATE);
+	writel_relaxed(index, qp->base + qp->reg_perf_state);
 
 	return 0;
 }
@@ -193,9 +206,15 @@ static int qcom_osm_l3_probe(struct platform_device *pdev)
 		return -ENODEV;
 	}
 
+	desc = device_get_match_data(&pdev->dev);
+	if (!desc)
+		return -EINVAL;
+
+	qp->reg_perf_state = desc->reg_perf_state;
+
 	for (i = 0; i < LUT_MAX_ENTRIES; i++) {
-		info = readl_relaxed(qp->base + REG_FREQ_LUT +
-				     i * LUT_ROW_SIZE);
+		info = readl_relaxed(qp->base + desc->reg_freq_lut +
+				     i * desc->lut_row_size);
 		src = FIELD_GET(LUT_SRC, info);
 		lval = FIELD_GET(LUT_L_VAL, info);
 		if (src)
@@ -214,10 +233,6 @@ static int qcom_osm_l3_probe(struct platform_device *pdev)
 	}
 	qp->max_state = i;
 
-	desc = device_get_match_data(&pdev->dev);
-	if (!desc)
-		return -EINVAL;
-
 	qnodes = desc->nodes;
 	num_nodes = desc->num_nodes;
 
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 20%]

* [PATCH v2 7/7] arm64: dts: qcom: sc7180: Increase the number of interconnect cells
                     ` (4 preceding siblings ...)
  2020-08-06 16:31  8% ` [PATCH v2 6/7] interconnect: qcom: sc7180: Replace xlate with xlate_extended Georgi Djakov
@ 2020-08-06 16:31  4% ` Georgi Djakov
  5 siblings, 0 replies; 200+ results
From: Georgi Djakov @ 2020-08-06 16:31 UTC (permalink / raw)
  To: linux-pm, devicetree
  Cc: robh+dt, bjorn.andersson, sibis, mka, dianders, georgi.djakov,
	linux-kernel

From: Sibi Sankar <sibis@codeaurora.org>

Increase the number of interconnect-cells, as now we can include
the tag information. The consumers can specify the path tag as an
additional argument to the endpoints.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 216 +++++++++++++--------------
 1 file changed, 108 insertions(+), 108 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 16df08d9ef8f..fe80e1b8acee 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -132,7 +132,7 @@ &LITTLE_CPU_SLEEP_1
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <100>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			next-level-cache = <&L2_0>;
 			#cooling-cells = <2>;
@@ -158,7 +158,7 @@ &LITTLE_CPU_SLEEP_1
 			dynamic-power-coefficient = <100>;
 			next-level-cache = <&L2_100>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -180,7 +180,7 @@ &LITTLE_CPU_SLEEP_1
 			dynamic-power-coefficient = <100>;
 			next-level-cache = <&L2_200>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -202,7 +202,7 @@ &LITTLE_CPU_SLEEP_1
 			dynamic-power-coefficient = <100>;
 			next-level-cache = <&L2_300>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -224,7 +224,7 @@ &LITTLE_CPU_SLEEP_1
 			dynamic-power-coefficient = <100>;
 			next-level-cache = <&L2_400>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -246,7 +246,7 @@ &LITTLE_CPU_SLEEP_1
 			dynamic-power-coefficient = <100>;
 			next-level-cache = <&L2_500>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -268,7 +268,7 @@ &BIG_CPU_SLEEP_1
 			dynamic-power-coefficient = <405>;
 			next-level-cache = <&L2_600>;
 			operating-points-v2 = <&cpu6_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			qcom,freq-domain = <&cpufreq_hw 1>;
@@ -290,7 +290,7 @@ &BIG_CPU_SLEEP_1
 			dynamic-power-coefficient = <405>;
 			next-level-cache = <&L2_700>;
 			operating-points-v2 = <&cpu6_opp_table>;
-			interconnects = <&gem_noc MASTER_APPSS_PROC &mc_virt SLAVE_EBI1>,
+			interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			qcom,freq-domain = <&cpufreq_hw 1>;
@@ -742,7 +742,7 @@ qupv3_id_0: geniqup@8c0000 {
 			#size-cells = <2>;
 			ranges;
 			iommus = <&apps_smmu 0x43 0x0>;
-			interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>;
+			interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>;
 			interconnect-names = "qup-core";
 			status = "disabled";
 
@@ -756,9 +756,9 @@ i2c0: i2c@880000 {
 				interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
-						<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
+						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -776,8 +776,8 @@ spi0: spi@880000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -792,8 +792,8 @@ uart0: serial@880000 {
 				interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -808,9 +808,9 @@ i2c1: i2c@884000 {
 				interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
-						<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
+						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -828,8 +828,8 @@ spi1: spi@884000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -844,8 +844,8 @@ uart1: serial@884000 {
 				interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -860,9 +860,9 @@ i2c2: i2c@888000 {
 				interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
-						<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
+						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -878,8 +878,8 @@ uart2: serial@888000 {
 				interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -894,9 +894,9 @@ i2c3: i2c@88c000 {
 				interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
-						<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
+						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -914,8 +914,8 @@ spi3: spi@88c000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -930,8 +930,8 @@ uart3: serial@88c000 {
 				interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -946,9 +946,9 @@ i2c4: i2c@890000 {
 				interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
-						<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
+						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -964,8 +964,8 @@ uart4: serial@890000 {
 				interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -980,9 +980,9 @@ i2c5: i2c@894000 {
 				interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>,
-						<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
+						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -1000,8 +1000,8 @@ spi5: spi@894000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1016,8 +1016,8 @@ uart5: serial@894000 {
 				interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1033,7 +1033,7 @@ qupv3_id_1: geniqup@ac0000 {
 			#size-cells = <2>;
 			ranges;
 			iommus = <&apps_smmu 0x4c3 0x0>;
-			interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>;
+			interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>;
 			interconnect-names = "qup-core";
 			status = "disabled";
 
@@ -1047,9 +1047,9 @@ i2c6: i2c@a80000 {
 				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
-						<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
+						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -1067,8 +1067,8 @@ spi6: spi@a80000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1083,8 +1083,8 @@ uart6: serial@a80000 {
 				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1099,9 +1099,9 @@ i2c7: i2c@a84000 {
 				interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
-						<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
+						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -1117,8 +1117,8 @@ uart7: serial@a84000 {
 				interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1133,9 +1133,9 @@ i2c8: i2c@a88000 {
 				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
-						<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
+						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -1153,8 +1153,8 @@ spi8: spi@a88000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1169,8 +1169,8 @@ uart8: serial@a88000 {
 				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1185,9 +1185,9 @@ i2c9: i2c@a8c000 {
 				interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
-						<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
+						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -1203,8 +1203,8 @@ uart9: serial@a8c000 {
 				interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1219,9 +1219,9 @@ i2c10: i2c@a90000 {
 				interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
-						<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
+						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -1239,8 +1239,8 @@ spi10: spi@a90000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1255,8 +1255,8 @@ uart10: serial@a90000 {
 				interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1271,9 +1271,9 @@ i2c11: i2c@a94000 {
 				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>,
-						<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
+						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
 				interconnect-names = "qup-core", "qup-config",
 							"qup-memory";
 				status = "disabled";
@@ -1291,8 +1291,8 @@ spi11: spi@a94000 {
 				#size-cells = <0>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1307,8 +1307,8 @@ uart11: serial@a94000 {
 				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
 				power-domains = <&rpmhpd SC7180_CX>;
 				operating-points-v2 = <&qup_opp_table>;
-				interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
-						<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
+				interconnects = <&qup_virt MASTER_QUP_CORE_1 0 &qup_virt SLAVE_QUP_CORE_1 0>,
+						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>;
 				interconnect-names = "qup-core", "qup-config";
 				status = "disabled";
 			};
@@ -1317,63 +1317,63 @@ uart11: serial@a94000 {
 		config_noc: interconnect@1500000 {
 			compatible = "qcom,sc7180-config-noc";
 			reg = <0 0x01500000 0 0x28000>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		system_noc: interconnect@1620000 {
 			compatible = "qcom,sc7180-system-noc";
 			reg = <0 0x01620000 0 0x17080>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		mc_virt: interconnect@1638000 {
 			compatible = "qcom,sc7180-mc-virt";
 			reg = <0 0x01638000 0 0x1000>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		qup_virt: interconnect@1650000 {
 			compatible = "qcom,sc7180-qup-virt";
 			reg = <0 0x01650000 0 0x1000>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		aggre1_noc: interconnect@16e0000 {
 			compatible = "qcom,sc7180-aggre1-noc";
 			reg = <0 0x016e0000 0 0x15080>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		aggre2_noc: interconnect@1705000 {
 			compatible = "qcom,sc7180-aggre2-noc";
 			reg = <0 0x01705000 0 0x9000>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		compute_noc: interconnect@170e000 {
 			compatible = "qcom,sc7180-compute-noc";
 			reg = <0 0x0170e000 0 0x6000>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		mmss_noc: interconnect@1740000 {
 			compatible = "qcom,sc7180-mmss-noc";
 			reg = <0 0x01740000 0 0x1c100>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		ipa_virt: interconnect@1e00000 {
 			compatible = "qcom,sc7180-ipa-virt";
 			reg = <0 0x01e00000 0 0x1000>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
@@ -1400,9 +1400,9 @@ ipa: ipa@1e40000 {
 			clocks = <&rpmhcc RPMH_IPA_CLK>;
 			clock-names = "core";
 
-			interconnects = <&aggre2_noc MASTER_IPA &mc_virt SLAVE_EBI1>,
-				        <&aggre2_noc MASTER_IPA &system_noc SLAVE_IMEM>,
-					<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_IPA_CFG>;
+			interconnects = <&aggre2_noc MASTER_IPA 0 &mc_virt SLAVE_EBI1 0>,
+					<&aggre2_noc MASTER_IPA 0 &system_noc SLAVE_IMEM 0>,
+					<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_IPA_CFG 0>;
 			interconnect-names = "memory",
 					     "imem",
 					     "config";
@@ -2526,8 +2526,8 @@ qspi: spi@88dc000 {
 			clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
 				 <&gcc GCC_QSPI_CORE_CLK>;
 			clock-names = "iface", "core";
-			interconnects = <&gem_noc MASTER_APPSS_PROC
-					&config_noc SLAVE_QSPI_0>;
+			interconnects = <&gem_noc MASTER_APPSS_PROC 0
+					&config_noc SLAVE_QSPI_0 0>;
 			interconnect-names = "qspi-config";
 			power-domains = <&rpmhpd SC7180_CX>;
 			operating-points-v2 = <&qspi_opp_table>;
@@ -2586,7 +2586,7 @@ usb_1_ssphy: phy@88e9200 {
 		dc_noc: interconnect@9160000 {
 			compatible = "qcom,sc7180-dc-noc";
 			reg = <0 0x09160000 0 0x03200>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
@@ -2600,14 +2600,14 @@ system-cache-controller@9200000 {
 		gem_noc: interconnect@9680000 {
 			compatible = "qcom,sc7180-gem-noc";
 			reg = <0 0x09680000 0 0x3e200>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		npu_noc: interconnect@9990000 {
 			compatible = "qcom,sc7180-npu-noc";
 			reg = <0 0x09990000 0 0x1600>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
@@ -2643,8 +2643,8 @@ usb_1: usb@a6f8800 {
 
 			resets = <&gcc GCC_USB30_PRIM_BCR>;
 
-			interconnects = <&aggre2_noc MASTER_USB3 &mc_virt SLAVE_EBI1>,
-					<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3>;
+			interconnects = <&aggre2_noc MASTER_USB3 0 &mc_virt SLAVE_EBI1 0>,
+					<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3 0>;
 			interconnect-names = "usb-ddr", "apps-usb";
 
 			usb_1_dwc3: dwc3@a600000 {
@@ -2675,8 +2675,8 @@ venus: video-codec@aa00000 {
 				      "vcodec0_core", "vcodec0_bus";
 			iommus = <&apps_smmu 0x0c00 0x60>;
 			memory-region = <&venus_mem>;
-			interconnects = <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI1>,
-					<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>;
+			interconnects = <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>,
+					<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_VENUS_CFG 0>;
 			interconnect-names = "video-mem", "cpu-cfg";
 
 			video-decoder {
@@ -2701,7 +2701,7 @@ videocc: clock-controller@ab00000 {
 		camnoc_virt: interconnect@ac00000 {
 			compatible = "qcom,sc7180-camnoc-virt";
 			reg = <0 0x0ac00000 0 0x1000>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 

^ permalink raw reply	[relevance 4%]

* [PATCH v2 6/7] interconnect: qcom: sc7180: Replace xlate with xlate_extended
                     ` (3 preceding siblings ...)
  2020-08-06 16:31  6% ` [PATCH v2 5/7] arm64: dts: qcom: sdm845: Increase the number of interconnect cells Georgi Djakov
@ 2020-08-06 16:31  8% ` Georgi Djakov
  2020-08-06 16:31  4% ` [PATCH v2 7/7] arm64: dts: qcom: sc7180: Increase the number of interconnect cells Georgi Djakov
  5 siblings, 0 replies; 200+ results
From: Georgi Djakov @ 2020-08-06 16:31 UTC (permalink / raw)
  To: linux-pm, devicetree
  Cc: robh+dt, bjorn.andersson, sibis, mka, dianders, georgi.djakov,
	linux-kernel

From: Sibi Sankar <sibis@codeaurora.org>

Use the qcom_icc_xlate_extended() in order to parse tags, that are
specified as an additional arguments to the path endpoints in DT.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
---
 drivers/interconnect/qcom/sc7180.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/interconnect/qcom/sc7180.c b/drivers/interconnect/qcom/sc7180.c
index dcf493d07928..a6f119f363b1 100644
--- a/drivers/interconnect/qcom/sc7180.c
+++ b/drivers/interconnect/qcom/sc7180.c
@@ -535,7 +535,7 @@ static int qnoc_probe(struct platform_device *pdev)
 	provider->set = qcom_icc_set;
 	provider->pre_aggregate = qcom_icc_pre_aggregate;
 	provider->aggregate = qcom_icc_aggregate;
-	provider->xlate = of_icc_xlate_onecell;
+	provider->xlate_extended = qcom_icc_xlate_extended;
 	INIT_LIST_HEAD(&provider->nodes);
 	provider->data = data;
 

^ permalink raw reply	[relevance 8%]

* Re: [PATCH 1/2] soc: qcom: aoss: Don't wait for IRQ if we might be in suspend/resume noirq
  2020-08-06 14:34  6%       ` Sibi Sankar
@ 2020-08-06 17:10  6%         ` Doug Anderson
  2020-08-06 17:33  6%           ` Sibi Sankar
  0 siblings, 1 reply; 200+ results
From: Doug Anderson @ 2020-08-06 17:10 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: Stephen Boyd, Bjorn Andersson, Alex Elder, Matthias Kaehlcke,
	Andy Gross, Vinod Koul, linux-arm-msm, LKML

Hi,

On Thu, Aug 6, 2020 at 7:36 AM Sibi Sankar <sibis@codeaurora.org> wrote:
>
> On 2020-08-06 04:32, Stephen Boyd wrote:
> > +Sibi who wrote the code
> >
> > Quoting Doug Anderson (2020-08-05 13:24:06)
> >>
> >> On Wed, Aug 5, 2020 at 10:36 AM Stephen Boyd <swboyd@chromium.org>
> >> wrote:
> >> >
> >> > Why is the genpd being powered off at all? It looks like the driver is
> >> > written in a way that it doesn't expect this to happen. See where
> >> > adsp_pds_disable() is called from. Looks like the remoteproc "stop"
> >> > callback should be called or the driver should be detached.
> >> >
> >> > It sort of looks like the genpd is expected to be at the max level all
> >> > the time (it sets INT_MAX in adsp_pds_enable(), cool).
> >>
> >> In general in Linux there are some things that, at suspend time, get
> >> done behind a driver's back.  The regulator API, for instance, allows
> >> for regulators to be turned off in suspend even if a driver leaves
> >> them on.  Sure, it's good practice for a driver to be explicit but the
> >> regulator suspend states do allow for the more heavy-handed approach.
> >>
> >> I guess I assume that genpd is a bit similar.  If a driver leaves a
> >> genpd on all the time then it will still be turned off at suspend time
> >> and then turned back on at resume time.  It seems like it must be part
> >> of the genpd API.  Specifically genpd_sync_power_off() says: "Check if
> >> the given PM domain can be powered off (during system suspend or
> >> hibernation) and do that if so."  That makes it seem like it's how
> >> genpd works.
> >>
> >> Reading all the descriptions of things like GENPD_FLAG_ALWAYS_ON,
> >> GENPD_FLAG_ACTIVE_WAKEUP, GENPD_FLAG_RPM_ALWAYS_ON makes me even more
> >> convinced that it's normal (unless otherwise specified) for genpds to
> >> get turned off in suspend even if a driver just blindly left them on.
> >>
> >> Presumably if this "modem" genpd is supposed to stay on in suspend
> >> time it should have been marked "always on"?  I'd guess we'd need to
> >> add "GENPD_FLAG_ALWAYS_ON" in some (or all?) cases in qmp_pd_add() if
> >> this was true?
> >
> > Agreed. I can't read the mind of Sibi so I can only guess that Sibi
> > wasn't expecting this behavior by reading the driver structure. That
> > could be a wrong assumption.
> >
> >>
> >>
> >> > Maybe we need to
> >> > add some sort of suspend hooks to the remote proc driver instead? Where
> >> > those suspend hooks are called earlier and drop the genpd performance
> >> > state request but otherwise leave it enabled across suspend?
> >>
> >> I think you're saying:
> >>
> >> a) You think it's a bug today that the "modem" genpd is being powered
> >> off in suspend.  Any evidence to back this up?
> >>
> >> b) Assuming it's a bug today, we should mark the "modem" as
> >> GENPD_FLAG_ALWAYS_ON.
> >>
> >> c) If there are genpds that sometimes should be left on in suspend but
> >> sometimes not (and that doesn't match up with what
> >> GENPD_FLAG_ACTIVE_WAKEUP does), then we'd have to pass
> >> GENPD_FLAG_ALWAYS_ON as a flag and then add suspend hooks to make the
> >> decision for us.
>
> Doug/Stephen,
>
> Yes this is a bug, we wouldn't want
> to disable aoss_qmp genpd for modem
> during suspend (when the modem is
> running). The qmp send for modem
> is the primary means through which
> aoss determines whether to wait for
> modem before proceeding to sleep. So
> looks like updating the flag with
> GENPD_FLAG_ACTIVE_WAKEUP is the way
> to go. But introducing another flag
> that doesn't touch genpd's during
> suspend/resume should also work.

OK, sounds good.  As per out-of-band conversation:

* You'll plan to post a patch updating the flag.

* There's still nothing here that says my patch is the wrong thing to
do also.  It seems like genpd poweroff routine are expected to be able
to run at "noirq" time so we should make sure we are able to do that.

I'm also curious: my patch doesn't affect the behavior.  The genpd
would be powered off with or without my patch, my patch just removes a
pointless 1 second delay.  Therefore I guess today there is some type
of bug because the genpd is being turned off.  What would be the
visible impact of that bug?  ...or is it somehow masked by something
else keeping this power on so it wasn't an issue right now?

-Doug


-Doug

^ permalink raw reply	[relevance 6%]

* Re: [PATCH 1/2] soc: qcom: aoss: Don't wait for IRQ if we might be in suspend/resume noirq
  2020-08-06 17:10  6%         ` Doug Anderson
@ 2020-08-06 17:33  6%           ` Sibi Sankar
  2020-08-11 21:21  8%             ` Doug Anderson
  0 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-08-06 17:33 UTC (permalink / raw)
  To: Doug Anderson
  Cc: Stephen Boyd, Bjorn Andersson, Alex Elder, Matthias Kaehlcke,
	Andy Gross, Vinod Koul, linux-arm-msm, LKML

On 2020-08-06 22:40, Doug Anderson wrote:
> Hi,
> 
> On Thu, Aug 6, 2020 at 7:36 AM Sibi Sankar <sibis@codeaurora.org> 
> wrote:
>> 
>> On 2020-08-06 04:32, Stephen Boyd wrote:
>> > +Sibi who wrote the code
>> >
>> > Quoting Doug Anderson (2020-08-05 13:24:06)
>> >>
>> >> On Wed, Aug 5, 2020 at 10:36 AM Stephen Boyd <swboyd@chromium.org>
>> >> wrote:
>> >> >
>> >> > Why is the genpd being powered off at all? It looks like the driver is
>> >> > written in a way that it doesn't expect this to happen. See where
>> >> > adsp_pds_disable() is called from. Looks like the remoteproc "stop"
>> >> > callback should be called or the driver should be detached.
>> >> >
>> >> > It sort of looks like the genpd is expected to be at the max level all
>> >> > the time (it sets INT_MAX in adsp_pds_enable(), cool).
>> >>
>> >> In general in Linux there are some things that, at suspend time, get
>> >> done behind a driver's back.  The regulator API, for instance, allows
>> >> for regulators to be turned off in suspend even if a driver leaves
>> >> them on.  Sure, it's good practice for a driver to be explicit but the
>> >> regulator suspend states do allow for the more heavy-handed approach.
>> >>
>> >> I guess I assume that genpd is a bit similar.  If a driver leaves a
>> >> genpd on all the time then it will still be turned off at suspend time
>> >> and then turned back on at resume time.  It seems like it must be part
>> >> of the genpd API.  Specifically genpd_sync_power_off() says: "Check if
>> >> the given PM domain can be powered off (during system suspend or
>> >> hibernation) and do that if so."  That makes it seem like it's how
>> >> genpd works.
>> >>
>> >> Reading all the descriptions of things like GENPD_FLAG_ALWAYS_ON,
>> >> GENPD_FLAG_ACTIVE_WAKEUP, GENPD_FLAG_RPM_ALWAYS_ON makes me even more
>> >> convinced that it's normal (unless otherwise specified) for genpds to
>> >> get turned off in suspend even if a driver just blindly left them on.
>> >>
>> >> Presumably if this "modem" genpd is supposed to stay on in suspend
>> >> time it should have been marked "always on"?  I'd guess we'd need to
>> >> add "GENPD_FLAG_ALWAYS_ON" in some (or all?) cases in qmp_pd_add() if
>> >> this was true?
>> >
>> > Agreed. I can't read the mind of Sibi so I can only guess that Sibi
>> > wasn't expecting this behavior by reading the driver structure. That
>> > could be a wrong assumption.
>> >
>> >>
>> >>
>> >> > Maybe we need to
>> >> > add some sort of suspend hooks to the remote proc driver instead? Where
>> >> > those suspend hooks are called earlier and drop the genpd performance
>> >> > state request but otherwise leave it enabled across suspend?
>> >>
>> >> I think you're saying:
>> >>
>> >> a) You think it's a bug today that the "modem" genpd is being powered
>> >> off in suspend.  Any evidence to back this up?
>> >>
>> >> b) Assuming it's a bug today, we should mark the "modem" as
>> >> GENPD_FLAG_ALWAYS_ON.
>> >>
>> >> c) If there are genpds that sometimes should be left on in suspend but
>> >> sometimes not (and that doesn't match up with what
>> >> GENPD_FLAG_ACTIVE_WAKEUP does), then we'd have to pass
>> >> GENPD_FLAG_ALWAYS_ON as a flag and then add suspend hooks to make the
>> >> decision for us.
>> 
>> Doug/Stephen,
>> 
>> Yes this is a bug, we wouldn't want
>> to disable aoss_qmp genpd for modem
>> during suspend (when the modem is
>> running). The qmp send for modem
>> is the primary means through which
>> aoss determines whether to wait for
>> modem before proceeding to sleep. So
>> looks like updating the flag with
>> GENPD_FLAG_ACTIVE_WAKEUP is the way
>> to go. But introducing another flag
>> that doesn't touch genpd's during
>> suspend/resume should also work.
> 
> OK, sounds good.  As per out-of-band conversation:
> 
> * You'll plan to post a patch updating the flag.
> 
> * There's still nothing here that says my patch is the wrong thing to
> do also.  It seems like genpd poweroff routine are expected to be able
> to run at "noirq" time so we should make sure we are able to do that.
> 
> I'm also curious: my patch doesn't affect the behavior.  The genpd
> would be powered off with or without my patch, my patch just removes a
> pointless 1 second delay.  Therefore I guess today there is some type
> of bug because the genpd is being turned off.  What would be the
> visible impact of that bug?  ...or is it somehow masked by something
> else keeping this power on so it wasn't an issue right now?

I've been told AOSS decides to wait
for modem suspend if its been notified
that modem is on through qmp_send. AFAIK
we never ran into this because AOSS sleep
sequence starts after xo-shutdown which
wont be reached in the presence of active
rpmh votes from modem.

Regardless we definitely want this genpd left
untouched during suspend/resume.

> 
> -Doug
> 
> 
> -Doug

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* [PATCH v2 5/7] arm64: dts: qcom: sdm845: Increase the number of interconnect cells
                     ` (2 preceding siblings ...)
  2020-08-06 16:31  8% ` [PATCH v2 4/7] interconnect: qcom: sdm845: Replace xlate with xlate_extended Georgi Djakov
@ 2020-08-06 16:31  6% ` Georgi Djakov
  2020-08-19 20:07  0%   ` Doug Anderson
  2020-08-06 16:31  8% ` [PATCH v2 6/7] interconnect: qcom: sc7180: Replace xlate with xlate_extended Georgi Djakov
  2020-08-06 16:31  4% ` [PATCH v2 7/7] arm64: dts: qcom: sc7180: Increase the number of interconnect cells Georgi Djakov
  5 siblings, 1 reply; 200+ results
From: Georgi Djakov @ 2020-08-06 16:31 UTC (permalink / raw)
  To: linux-pm, devicetree
  Cc: robh+dt, bjorn.andersson, sibis, mka, dianders, georgi.djakov,
	linux-kernel

Increase the number of interconnect-cells, as now we can include
the tag information. The consumers can specify the path tag as an
additional argument to the endpoints.

Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 44 ++++++++++++++--------------
 1 file changed, 22 insertions(+), 22 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index e506793407d8..94f5d27f2927 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -200,7 +200,7 @@ &LITTLE_CPU_SLEEP_1
 			dynamic-power-coefficient = <100>;
 			qcom,freq-domain = <&cpufreq_hw 0>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
+			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			next-level-cache = <&L2_0>;
@@ -225,7 +225,7 @@ &LITTLE_CPU_SLEEP_1
 			dynamic-power-coefficient = <100>;
 			qcom,freq-domain = <&cpufreq_hw 0>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
+			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			next-level-cache = <&L2_100>;
@@ -247,7 +247,7 @@ &LITTLE_CPU_SLEEP_1
 			dynamic-power-coefficient = <100>;
 			qcom,freq-domain = <&cpufreq_hw 0>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
+			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			next-level-cache = <&L2_200>;
@@ -269,7 +269,7 @@ &LITTLE_CPU_SLEEP_1
 			dynamic-power-coefficient = <100>;
 			qcom,freq-domain = <&cpufreq_hw 0>;
 			operating-points-v2 = <&cpu0_opp_table>;
-			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
+			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			next-level-cache = <&L2_300>;
@@ -291,7 +291,7 @@ &BIG_CPU_SLEEP_1
 			dynamic-power-coefficient = <396>;
 			qcom,freq-domain = <&cpufreq_hw 1>;
 			operating-points-v2 = <&cpu4_opp_table>;
-			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
+			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			next-level-cache = <&L2_400>;
@@ -313,7 +313,7 @@ &BIG_CPU_SLEEP_1
 			dynamic-power-coefficient = <396>;
 			qcom,freq-domain = <&cpufreq_hw 1>;
 			operating-points-v2 = <&cpu4_opp_table>;
-			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
+			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			next-level-cache = <&L2_500>;
@@ -335,7 +335,7 @@ &BIG_CPU_SLEEP_1
 			dynamic-power-coefficient = <396>;
 			qcom,freq-domain = <&cpufreq_hw 1>;
 			operating-points-v2 = <&cpu4_opp_table>;
-			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
+			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			next-level-cache = <&L2_600>;
@@ -357,7 +357,7 @@ &BIG_CPU_SLEEP_1
 			dynamic-power-coefficient = <396>;
 			qcom,freq-domain = <&cpufreq_hw 1>;
 			operating-points-v2 = <&cpu4_opp_table>;
-			interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
+			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
 					<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
 			#cooling-cells = <2>;
 			next-level-cache = <&L2_700>;
@@ -2011,49 +2011,49 @@ pcie1_lane: lanes@1c06200 {
 		mem_noc: interconnect@1380000 {
 			compatible = "qcom,sdm845-mem-noc";
 			reg = <0 0x01380000 0 0x27200>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		dc_noc: interconnect@14e0000 {
 			compatible = "qcom,sdm845-dc-noc";
 			reg = <0 0x014e0000 0 0x400>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		config_noc: interconnect@1500000 {
 			compatible = "qcom,sdm845-config-noc";
 			reg = <0 0x01500000 0 0x5080>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		system_noc: interconnect@1620000 {
 			compatible = "qcom,sdm845-system-noc";
 			reg = <0 0x01620000 0 0x18080>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		aggre1_noc: interconnect@16e0000 {
 			compatible = "qcom,sdm845-aggre1-noc";
 			reg = <0 0x016e0000 0 0x15080>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		aggre2_noc: interconnect@1700000 {
 			compatible = "qcom,sdm845-aggre2-noc";
 			reg = <0 0x01700000 0 0x1f300>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
 		mmss_noc: interconnect@1740000 {
 			compatible = "qcom,sdm845-mmss-noc";
 			reg = <0 0x01740000 0 0x1c100>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
@@ -2156,8 +2156,8 @@ ipa: ipa@1e40000 {
 			clocks = <&rpmhcc RPMH_IPA_CLK>;
 			clock-names = "core";
 
-			interconnects = <&aggre2_noc MASTER_IPA &mem_noc SLAVE_EBI1>,
-				        <&aggre2_noc MASTER_IPA &system_noc SLAVE_IMEM>,
+			interconnects = <&aggre2_noc MASTER_IPA 0 &mem_noc SLAVE_EBI1 0>,
+					<&aggre2_noc MASTER_IPA 0 &system_noc SLAVE_IMEM 0>,
 					<&gladiator_noc MASTER_APPSS_PROC &config_noc SLAVE_IPA_CFG>;
 			interconnect-names = "memory",
 					     "imem",
@@ -3561,8 +3561,8 @@ usb_1: usb@a6f8800 {
 
 			resets = <&gcc GCC_USB30_PRIM_BCR>;
 
-			interconnects = <&aggre2_noc MASTER_USB3_0 &mem_noc SLAVE_EBI1>,
-					<&gladiator_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3_0>;
+			interconnects = <&aggre2_noc MASTER_USB3_0 0 &mem_noc SLAVE_EBI1 0>,
+					<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
 			interconnect-names = "usb-ddr", "apps-usb";
 
 			usb_1_dwc3: dwc3@a600000 {
@@ -3609,8 +3609,8 @@ usb_2: usb@a8f8800 {
 
 			resets = <&gcc GCC_USB30_SEC_BCR>;
 
-			interconnects = <&aggre2_noc MASTER_USB3_1 &mem_noc SLAVE_EBI1>,
-					<&gladiator_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3_1>;
+			interconnects = <&aggre2_noc MASTER_USB3_1 0 &mem_noc SLAVE_EBI1 0>,
+					<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>;
 			interconnect-names = "usb-ddr", "apps-usb";
 
 			usb_2_dwc3: dwc3@a800000 {
@@ -4306,7 +4306,7 @@ lpasscc: clock-controller@17014000 {
 		gladiator_noc: interconnect@17900000 {
 			compatible = "qcom,sdm845-gladiator-noc";
 			reg = <0 0x17900000 0 0xd080>;
-			#interconnect-cells = <1>;
+			#interconnect-cells = <2>;
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 

^ permalink raw reply	[relevance 6%]

* [PATCH v2 4/7] interconnect: qcom: sdm845: Replace xlate with xlate_extended
    2020-08-06 16:31  6% ` [PATCH v2 1/7] interconnect: Introduce xlate_extended() callback Georgi Djakov
  2020-08-06 16:31  8% ` [PATCH v2 3/7] interconnect: qcom: Implement xlate_extended() to parse tags Georgi Djakov
@ 2020-08-06 16:31  8% ` Georgi Djakov
  2020-08-06 16:31  6% ` [PATCH v2 5/7] arm64: dts: qcom: sdm845: Increase the number of interconnect cells Georgi Djakov
                   ` (2 subsequent siblings)
  5 siblings, 0 replies; 200+ results
From: Georgi Djakov @ 2020-08-06 16:31 UTC (permalink / raw)
  To: linux-pm, devicetree
  Cc: robh+dt, bjorn.andersson, sibis, mka, dianders, georgi.djakov,
	linux-kernel

Use the qcom_icc_xlate_extended() in order to parse tags, that are
specified as an additional arguments to the path endpoints in DT.

Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
---
 drivers/interconnect/qcom/sdm845.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/interconnect/qcom/sdm845.c b/drivers/interconnect/qcom/sdm845.c
index f6c7b969520d..3b81dbb71b0b 100644
--- a/drivers/interconnect/qcom/sdm845.c
+++ b/drivers/interconnect/qcom/sdm845.c
@@ -469,7 +469,7 @@ static int qnoc_probe(struct platform_device *pdev)
 	provider->set = qcom_icc_set;
 	provider->pre_aggregate = qcom_icc_pre_aggregate;
 	provider->aggregate = qcom_icc_aggregate;
-	provider->xlate = of_icc_xlate_onecell;
+	provider->xlate_extended = qcom_icc_xlate_extended;
 	INIT_LIST_HEAD(&provider->nodes);
 	provider->data = data;
 

^ permalink raw reply	[relevance 8%]

* [PATCH v2 3/7] interconnect: qcom: Implement xlate_extended() to parse tags
    2020-08-06 16:31  6% ` [PATCH v2 1/7] interconnect: Introduce xlate_extended() callback Georgi Djakov
@ 2020-08-06 16:31  8% ` Georgi Djakov
  2020-08-06 16:31  8% ` [PATCH v2 4/7] interconnect: qcom: sdm845: Replace xlate with xlate_extended Georgi Djakov
                   ` (3 subsequent siblings)
  5 siblings, 0 replies; 200+ results
From: Georgi Djakov @ 2020-08-06 16:31 UTC (permalink / raw)
  To: linux-pm, devicetree
  Cc: robh+dt, bjorn.andersson, sibis, mka, dianders, georgi.djakov,
	linux-kernel

Implement a function to parse the arguments of the "interconnects" DT
property and populate the interconnect path tags if this information
is available.

Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
---
 drivers/interconnect/qcom/icc-rpmh.c | 27 +++++++++++++++++++++++++++
 drivers/interconnect/qcom/icc-rpmh.h |  1 +
 2 files changed, 28 insertions(+)

diff --git a/drivers/interconnect/qcom/icc-rpmh.c b/drivers/interconnect/qcom/icc-rpmh.c
index 3ac5182c9ab2..7e538155e486 100644
--- a/drivers/interconnect/qcom/icc-rpmh.c
+++ b/drivers/interconnect/qcom/icc-rpmh.c
@@ -6,6 +6,8 @@
 #include <linux/interconnect.h>
 #include <linux/interconnect-provider.h>
 #include <linux/module.h>
+#include <linux/of.h>
+#include <linux/slab.h>
 
 #include "bcm-voter.h"
 #include "icc-rpmh.h"
@@ -92,6 +94,31 @@ int qcom_icc_set(struct icc_node *src, struct icc_node *dst)
 }
 EXPORT_SYMBOL_GPL(qcom_icc_set);
 
+struct icc_node_data *qcom_icc_xlate_extended(struct of_phandle_args *spec, void *data)
+{
+	struct icc_node_data *ndata;
+	struct icc_node *node;
+
+	node = of_icc_xlate_onecell(spec, data);
+	if (IS_ERR(node))
+		return ERR_CAST(node);
+
+	ndata = kzalloc(sizeof(*ndata), GFP_KERNEL);
+	if (!ndata)
+		return ERR_PTR(-ENOMEM);
+
+	ndata->node = node;
+
+	if (spec->args_count == 2)
+		ndata->tag = spec->args[1];
+
+	if (spec->args_count > 2)
+		pr_warn("%pOF: Too many arguments, path tag is not parsed\n", spec->np);
+
+	return ndata;
+}
+EXPORT_SYMBOL_GPL(qcom_icc_xlate_extended);
+
 /**
  * qcom_icc_bcm_init - populates bcm aux data and connect qnodes
  * @bcm: bcm to be initialized
diff --git a/drivers/interconnect/qcom/icc-rpmh.h b/drivers/interconnect/qcom/icc-rpmh.h
index 903d25e61984..1dac39bc255d 100644
--- a/drivers/interconnect/qcom/icc-rpmh.h
+++ b/drivers/interconnect/qcom/icc-rpmh.h
@@ -143,6 +143,7 @@ struct qcom_icc_desc {
 int qcom_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
 		       u32 peak_bw, u32 *agg_avg, u32 *agg_peak);
 int qcom_icc_set(struct icc_node *src, struct icc_node *dst);
+struct icc_node_data *qcom_icc_xlate_extended(struct of_phandle_args *spec, void *data);
 int qcom_icc_bcm_init(struct qcom_icc_bcm *bcm, struct device *dev);
 void qcom_icc_pre_aggregate(struct icc_node *node);
 

^ permalink raw reply	[relevance 8%]

* [PATCH v2 1/7] interconnect: Introduce xlate_extended() callback
  @ 2020-08-06 16:31  6% ` Georgi Djakov
  2020-08-06 16:31  8% ` [PATCH v2 3/7] interconnect: qcom: Implement xlate_extended() to parse tags Georgi Djakov
                   ` (4 subsequent siblings)
  5 siblings, 0 replies; 200+ results
From: Georgi Djakov @ 2020-08-06 16:31 UTC (permalink / raw)
  To: linux-pm, devicetree
  Cc: robh+dt, bjorn.andersson, sibis, mka, dianders, georgi.djakov,
	linux-kernel

Currently there is the xlate() callback, which is used by providers for
mapping the nodes from phandle arguments. That's fine for simple mappings,
but the phandle arguments could contain an additional data, such as tag
information. Let's create another callback xlate_extended() for the cases
where providers want also populate the path tag data.

Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
---
 drivers/interconnect/core.c           | 73 ++++++++++++++++++---------
 include/linux/interconnect-provider.h | 17 ++++++-
 2 files changed, 65 insertions(+), 25 deletions(-)

diff --git a/drivers/interconnect/core.c b/drivers/interconnect/core.c
index befd111049c0..6ccf55818e68 100644
--- a/drivers/interconnect/core.c
+++ b/drivers/interconnect/core.c
@@ -336,12 +336,13 @@ EXPORT_SYMBOL_GPL(of_icc_xlate_onecell);
  * Looks for interconnect provider under the node specified by @spec and if
  * found, uses xlate function of the provider to map phandle args to node.
  *
- * Returns a valid pointer to struct icc_node on success or ERR_PTR()
+ * Returns a valid pointer to struct icc_node_data on success or ERR_PTR()
  * on failure.
  */
-struct icc_node *of_icc_get_from_provider(struct of_phandle_args *spec)
+struct icc_node_data *of_icc_get_from_provider(struct of_phandle_args *spec)
 {
 	struct icc_node *node = ERR_PTR(-EPROBE_DEFER);
+	struct icc_node_data *data = NULL;
 	struct icc_provider *provider;
 
 	if (!spec)
@@ -349,14 +350,33 @@ struct icc_node *of_icc_get_from_provider(struct of_phandle_args *spec)
 
 	mutex_lock(&icc_lock);
 	list_for_each_entry(provider, &icc_providers, provider_list) {
-		if (provider->dev->of_node == spec->np)
-			node = provider->xlate(spec, provider->data);
-		if (!IS_ERR(node))
-			break;
+		if (provider->dev->of_node == spec->np) {
+			if (provider->xlate_extended) {
+				data = provider->xlate_extended(spec, provider->data);
+				if (!IS_ERR(data)) {
+					node = data->node;
+					break;
+				}
+			} else {
+				node = provider->xlate(spec, provider->data);
+				if (!IS_ERR(node))
+					break;
+			}
+		}
 	}
 	mutex_unlock(&icc_lock);
 
-	return node;
+	if (IS_ERR(node))
+		return ERR_CAST(node);
+
+	if (!data) {
+		data = kzalloc(sizeof(*data), GFP_KERNEL);
+		if (!data)
+			return ERR_PTR(-ENOMEM);
+		data->node = node;
+	}
+
+	return data;
 }
 EXPORT_SYMBOL_GPL(of_icc_get_from_provider);
 
@@ -403,7 +423,7 @@ EXPORT_SYMBOL_GPL(devm_of_icc_get);
 struct icc_path *of_icc_get_by_index(struct device *dev, int idx)
 {
 	struct icc_path *path;
-	struct icc_node *src_node, *dst_node;
+	struct icc_node_data *src_data, *dst_data;
 	struct device_node *np;
 	struct of_phandle_args src_args, dst_args;
 	int ret;
@@ -441,39 +461,46 @@ struct icc_path *of_icc_get_by_index(struct device *dev, int idx)
 
 	of_node_put(dst_args.np);
 
-	src_node = of_icc_get_from_provider(&src_args);
+	src_data = of_icc_get_from_provider(&src_args);
 
-	if (IS_ERR(src_node)) {
-		if (PTR_ERR(src_node) != -EPROBE_DEFER)
+	if (IS_ERR(src_data)) {
+		if (PTR_ERR(src_data) != -EPROBE_DEFER)
 			dev_err(dev, "error finding src node: %ld\n",
-				PTR_ERR(src_node));
-		return ERR_CAST(src_node);
+				PTR_ERR(src_data));
+		return ERR_CAST(src_data);
 	}
 
-	dst_node = of_icc_get_from_provider(&dst_args);
+	dst_data = of_icc_get_from_provider(&dst_args);
 
-	if (IS_ERR(dst_node)) {
-		if (PTR_ERR(dst_node) != -EPROBE_DEFER)
+	if (IS_ERR(dst_data)) {
+		if (PTR_ERR(dst_data) != -EPROBE_DEFER)
 			dev_err(dev, "error finding dst node: %ld\n",
-				PTR_ERR(dst_node));
-		return ERR_CAST(dst_node);
+				PTR_ERR(dst_data));
+		kfree(src_data);
+		return ERR_CAST(dst_data);
 	}
 
 	mutex_lock(&icc_lock);
-	path = path_find(dev, src_node, dst_node);
+	path = path_find(dev, src_data->node, dst_data->node);
 	mutex_unlock(&icc_lock);
 	if (IS_ERR(path)) {
 		dev_err(dev, "%s: invalid path=%ld\n", __func__, PTR_ERR(path));
-		return path;
+		goto free_icc_data;
 	}
 
+	if (src_data->tag && src_data->tag == dst_data->tag)
+		icc_set_tag(path, src_data->tag);
+
 	path->name = kasprintf(GFP_KERNEL, "%s-%s",
-			       src_node->name, dst_node->name);
+			       src_data->node->name, dst_data->node->name);
 	if (!path->name) {
 		kfree(path);
-		return ERR_PTR(-ENOMEM);
+		path = ERR_PTR(-ENOMEM);
 	}
 
+free_icc_data:
+	kfree(src_data);
+	kfree(dst_data);
 	return path;
 }
 EXPORT_SYMBOL_GPL(of_icc_get_by_index);
@@ -975,7 +1002,7 @@ int icc_provider_add(struct icc_provider *provider)
 {
 	if (WARN_ON(!provider->set))
 		return -EINVAL;
-	if (WARN_ON(!provider->xlate))
+	if (WARN_ON(!provider->xlate && !provider->xlate_extended))
 		return -EINVAL;
 
 	mutex_lock(&icc_lock);
diff --git a/include/linux/interconnect-provider.h b/include/linux/interconnect-provider.h
index 4735518de515..4d535fddd5d3 100644
--- a/include/linux/interconnect-provider.h
+++ b/include/linux/interconnect-provider.h
@@ -14,6 +14,17 @@
 struct icc_node;
 struct of_phandle_args;
 
+/**
+ * struct icc_node_data - icc node data
+ *
+ * @node: icc node
+ * @tag: tag
+ */
+struct icc_node_data {
+	struct icc_node *node;
+	u32 tag;
+};
+
 /**
  * struct icc_onecell_data - driver data for onecell interconnect providers
  *
@@ -39,6 +50,7 @@ struct icc_node *of_icc_xlate_onecell(struct of_phandle_args *spec,
  * @pre_aggregate: pointer to device specific function that is called
  *		   before the aggregation begins (optional)
  * @xlate: provider-specific callback for mapping nodes from phandle arguments
+ * @xlate_extended: vendor-specific callback for mapping node data from phandle arguments
  * @dev: the device this interconnect provider belongs to
  * @users: count of active users
  * @inter_set: whether inter-provider pairs will be configured with @set
@@ -52,6 +64,7 @@ struct icc_provider {
 			 u32 peak_bw, u32 *agg_avg, u32 *agg_peak);
 	void (*pre_aggregate)(struct icc_node *node);
 	struct icc_node* (*xlate)(struct of_phandle_args *spec, void *data);
+	struct icc_node_data* (*xlate_extended)(struct of_phandle_args *spec, void *data);
 	struct device		*dev;
 	int			users;
 	bool			inter_set;
@@ -105,7 +118,7 @@ void icc_node_del(struct icc_node *node);
 int icc_nodes_remove(struct icc_provider *provider);
 int icc_provider_add(struct icc_provider *provider);
 int icc_provider_del(struct icc_provider *provider);
-struct icc_node *of_icc_get_from_provider(struct of_phandle_args *spec);
+struct icc_node_data *of_icc_get_from_provider(struct of_phandle_args *spec);
 
 #else
 
@@ -157,7 +170,7 @@ static inline int icc_provider_del(struct icc_provider *provider)
 	return -ENOTSUPP;
 }
 
-static inline struct icc_node *of_icc_get_from_provider(struct of_phandle_args *spec)
+static inline struct icc_node_data *of_icc_get_from_provider(struct of_phandle_args *spec)
 {
 	return ERR_PTR(-ENOTSUPP);
 }

^ permalink raw reply	[relevance 6%]

* Re: [PATCH 1/2] soc: qcom: aoss: Don't wait for IRQ if we might be in suspend/resume noirq
  @ 2020-08-06 14:34  6%       ` Sibi Sankar
  2020-08-06 17:10  6%         ` Doug Anderson
  0 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-08-06 14:34 UTC (permalink / raw)
  To: Stephen Boyd
  Cc: Doug Anderson, Bjorn Andersson, Alex Elder, Matthias Kaehlcke,
	Andy Gross, Vinod Koul, linux-arm-msm, LKML, linux-kernel-owner

On 2020-08-06 04:32, Stephen Boyd wrote:
> +Sibi who wrote the code
> 
> Quoting Doug Anderson (2020-08-05 13:24:06)
>> 
>> On Wed, Aug 5, 2020 at 10:36 AM Stephen Boyd <swboyd@chromium.org> 
>> wrote:
>> >
>> > Why is the genpd being powered off at all? It looks like the driver is
>> > written in a way that it doesn't expect this to happen. See where
>> > adsp_pds_disable() is called from. Looks like the remoteproc "stop"
>> > callback should be called or the driver should be detached.
>> >
>> > It sort of looks like the genpd is expected to be at the max level all
>> > the time (it sets INT_MAX in adsp_pds_enable(), cool).
>> 
>> In general in Linux there are some things that, at suspend time, get
>> done behind a driver's back.  The regulator API, for instance, allows
>> for regulators to be turned off in suspend even if a driver leaves
>> them on.  Sure, it's good practice for a driver to be explicit but the
>> regulator suspend states do allow for the more heavy-handed approach.
>> 
>> I guess I assume that genpd is a bit similar.  If a driver leaves a
>> genpd on all the time then it will still be turned off at suspend time
>> and then turned back on at resume time.  It seems like it must be part
>> of the genpd API.  Specifically genpd_sync_power_off() says: "Check if
>> the given PM domain can be powered off (during system suspend or
>> hibernation) and do that if so."  That makes it seem like it's how
>> genpd works.
>> 
>> Reading all the descriptions of things like GENPD_FLAG_ALWAYS_ON,
>> GENPD_FLAG_ACTIVE_WAKEUP, GENPD_FLAG_RPM_ALWAYS_ON makes me even more
>> convinced that it's normal (unless otherwise specified) for genpds to
>> get turned off in suspend even if a driver just blindly left them on.
>> 
>> Presumably if this "modem" genpd is supposed to stay on in suspend
>> time it should have been marked "always on"?  I'd guess we'd need to
>> add "GENPD_FLAG_ALWAYS_ON" in some (or all?) cases in qmp_pd_add() if
>> this was true?
> 
> Agreed. I can't read the mind of Sibi so I can only guess that Sibi
> wasn't expecting this behavior by reading the driver structure. That
> could be a wrong assumption.
> 
>> 
>> 
>> > Maybe we need to
>> > add some sort of suspend hooks to the remote proc driver instead? Where
>> > those suspend hooks are called earlier and drop the genpd performance
>> > state request but otherwise leave it enabled across suspend?
>> 
>> I think you're saying:
>> 
>> a) You think it's a bug today that the "modem" genpd is being powered
>> off in suspend.  Any evidence to back this up?
>> 
>> b) Assuming it's a bug today, we should mark the "modem" as
>> GENPD_FLAG_ALWAYS_ON.
>> 
>> c) If there are genpds that sometimes should be left on in suspend but
>> sometimes not (and that doesn't match up with what
>> GENPD_FLAG_ACTIVE_WAKEUP does), then we'd have to pass
>> GENPD_FLAG_ALWAYS_ON as a flag and then add suspend hooks to make the
>> decision for us.

Doug/Stephen,

Yes this is a bug, we wouldn't want
to disable aoss_qmp genpd for modem
during suspend (when the modem is
running). The qmp send for modem
is the primary means through which
aoss determines whether to wait for
modem before proceeding to sleep. So
looks like updating the flag with
GENPD_FLAG_ACTIVE_WAKEUP is the way
to go. But introducing another flag
that doesn't touch genpd's during
suspend/resume should also work.


>> 
>> Did I understand that correctly?
>> 
>> ...or are you suggesting that we work around the fact that
>> qmp_pd_power_off() can't be called at "noirq" time by forcing it to
>> suspend earlier?
>> 
>> ...or am I just totally confused and you meant something else?
>> 
>> 
>> > I know this isn't clearing the land mine that is calling this code from
>> > noirq phase of suspend, but I'm just looking at the driver and thinking
>> > that it never expected to be called from this phase of suspend to begin
>> > with.
>> 
>> You're saying that qmp_pd_power_off() wasn't expecting to be called
>> from the noirq phase of suspend?  Sure, I guess not given the bug.
>> ...but once we fix the bug, it works fine, doesn't it?  ...and it
>> appears that it's part of the genpd API to be able to be called from
>> the noirq phase.  To me that means that, even if we were supposed to
>> be keeping this particular PD on during suspend we should take my
>> patch.
>> 
>> 
>> So the summary is: I still think my patch is correct, but I could
>> certainly still be convinced otherwise.
>> 
> 
> I'm trying to say that the driver looks like it expects to power off 
> the
> genpd in the adsp_stop() callback. That same callback sends some sort 
> of
> message to the modem saying that it is being stopped (see
> qcom_q6v5_request_stop()). Turning the performance state down, or
> turning the power domain off completely, without telling the modem that
> it's happening like as is done in adsp_stop() looks wrong. But who
> knows, maybe the modem is happy with that and doesn't care?
> 
> In general, the whole thing looks weird to me because I would expect 
> the
> modem to take care of its own power requirements, including this
> "load_state" one. Anyway, I hope Sibi can clarify what's going on.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* [PATCH AUTOSEL 5.8 51/72] soc: qcom: pdr: Reorder the PD state indication ack
  @ 2020-08-08 23:35  9% ` Sasha Levin
  0 siblings, 0 replies; 200+ results
From: Sasha Levin @ 2020-08-08 23:35 UTC (permalink / raw)
  To: linux-kernel, stable
  Cc: Sibi Sankar, Bjorn Andersson, Rishabh Bhatnagar, Sasha Levin,
	linux-arm-msm

From: Sibi Sankar <sibis@codeaurora.org>

[ Upstream commit 72fe996f9643043c8f84e32c0610975b01aa555b ]

The Protection Domains (PD) have a mechanism to keep its resources
enabled until the PD down indication is acked. Reorder the PD state
indication ack so that clients get to release the relevant resources
before the PD goes down.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Fixes: fbe639b44a82 ("soc: qcom: Introduce Protection Domain Restart helpers")
Reported-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200701195954.9007-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 drivers/soc/qcom/pdr_interface.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/qcom/pdr_interface.c b/drivers/soc/qcom/pdr_interface.c
index bdcf16f88a97f..4c9225f15c4e6 100644
--- a/drivers/soc/qcom/pdr_interface.c
+++ b/drivers/soc/qcom/pdr_interface.c
@@ -278,13 +278,15 @@ static void pdr_indack_work(struct work_struct *work)
 
 	list_for_each_entry_safe(ind, tmp, &pdr->indack_list, node) {
 		pds = ind->pds;
-		pdr_send_indack_msg(pdr, pds, ind->transaction_id);
 
 		mutex_lock(&pdr->status_lock);
 		pds->state = ind->curr_state;
 		pdr->status(pds->state, pds->service_path, pdr->priv);
 		mutex_unlock(&pdr->status_lock);
 
+		/* Ack the indication after clients release the PD resources */
+		pdr_send_indack_msg(pdr, pds, ind->transaction_id);
+
 		mutex_lock(&pdr->list_lock);
 		list_del(&ind->node);
 		mutex_unlock(&pdr->list_lock);
-- 
2.25.1


^ permalink raw reply	[relevance 9%]

* [PATCH AUTOSEL 5.7 43/58] soc: qcom: pdr: Reorder the PD state indication ack
  @ 2020-08-08 23:37  9% ` Sasha Levin
  0 siblings, 0 replies; 200+ results
From: Sasha Levin @ 2020-08-08 23:37 UTC (permalink / raw)
  To: linux-kernel, stable
  Cc: Sibi Sankar, Bjorn Andersson, Rishabh Bhatnagar, Sasha Levin,
	linux-arm-msm

From: Sibi Sankar <sibis@codeaurora.org>

[ Upstream commit 72fe996f9643043c8f84e32c0610975b01aa555b ]

The Protection Domains (PD) have a mechanism to keep its resources
enabled until the PD down indication is acked. Reorder the PD state
indication ack so that clients get to release the relevant resources
before the PD goes down.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Fixes: fbe639b44a82 ("soc: qcom: Introduce Protection Domain Restart helpers")
Reported-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200701195954.9007-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 drivers/soc/qcom/pdr_interface.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/qcom/pdr_interface.c b/drivers/soc/qcom/pdr_interface.c
index 17ad3b8698e16..cd8828c857234 100644
--- a/drivers/soc/qcom/pdr_interface.c
+++ b/drivers/soc/qcom/pdr_interface.c
@@ -282,13 +282,15 @@ static void pdr_indack_work(struct work_struct *work)
 
 	list_for_each_entry_safe(ind, tmp, &pdr->indack_list, node) {
 		pds = ind->pds;
-		pdr_send_indack_msg(pdr, pds, ind->transaction_id);
 
 		mutex_lock(&pdr->status_lock);
 		pds->state = ind->curr_state;
 		pdr->status(pds->state, pds->service_path, pdr->priv);
 		mutex_unlock(&pdr->status_lock);
 
+		/* Ack the indication after clients release the PD resources */
+		pdr_send_indack_msg(pdr, pds, ind->transaction_id);
+
 		mutex_lock(&pdr->list_lock);
 		list_del(&ind->node);
 		mutex_unlock(&pdr->list_lock);
-- 
2.25.1


^ permalink raw reply	[relevance 9%]

* Re: [PATCH] opp: Fix dev_pm_opp_set_rate() to not return early
  @ 2020-08-10 10:41 13% ` Sibi Sankar
  2020-08-13  4:28  7% ` [PATCH V2 1/4] opp: Enable resources again if they were disabled earlier Viresh Kumar
  1 sibling, 0 replies; 200+ results
From: Sibi Sankar @ 2020-08-10 10:41 UTC (permalink / raw)
  To: Rajendra Nayak
  Cc: vireshk, nm, sboyd, viresh.kumar, linux-pm, linux-kernel,
	linux-arm-msm, linux-arm-msm-owner

On 2020-08-10 12:36, Rajendra Nayak wrote:
> dev_pm_opp_set_rate() can now be called with freq = 0 inorder
> to either drop performance or bandwidth votes or to disable
> regulators on platforms which support them.
> In such cases, a subsequent call to dev_pm_opp_set_rate() with
> the same frequency ends up returning early because 'old_freq == freq'
> Instead make it fall through and put back the dropped performance
> and bandwidth votes and/or enable back the regulators.
> 
> Fixes: cd7ea582 ("opp: Make dev_pm_opp_set_rate() handle freq = 0 to
> drop performance votes")
> Reported-by: Sajida Bhanu <sbhanu@codeaurora.org>
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>

Reviewed-by: Sibi Sankar <sibis@codeaurora.org>

> ---
>  drivers/opp/core.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/opp/core.c b/drivers/opp/core.c
> index 0c8c74a..a994f30 100644
> --- a/drivers/opp/core.c
> +++ b/drivers/opp/core.c
> @@ -901,6 +901,9 @@ int dev_pm_opp_set_rate(struct device *dev,
> unsigned long target_freq)
> 
>  	/* Return early if nothing to do */
>  	if (old_freq == freq) {
> +		if (opp_table->required_opp_tables || opp_table->regulators ||
> +		    opp_table->paths)
> +			goto skip_clk_only;
>  		dev_dbg(dev, "%s: old/new frequencies (%lu Hz) are same, nothing to 
> do\n",
>  			__func__, freq);
>  		ret = 0;
> @@ -919,6 +922,7 @@ int dev_pm_opp_set_rate(struct device *dev,
> unsigned long target_freq)
>  		goto put_opp_table;
>  	}
> 
> +skip_clk_only:
>  	temp_freq = old_freq;
>  	old_opp = _find_freq_ceil(opp_table, &temp_freq);
>  	if (IS_ERR(old_opp)) {
> @@ -954,8 +958,10 @@ int dev_pm_opp_set_rate(struct device *dev,
> unsigned long target_freq)
>  						 IS_ERR(old_opp) ? NULL : old_opp->supplies,
>  						 opp->supplies);
>  	} else {
> +		ret = 0;
>  		/* Only frequency scaling */
> -		ret = _generic_set_opp_clk_only(dev, clk, freq);
> +		if (freq != old_freq)
> +			ret = _generic_set_opp_clk_only(dev, clk, freq);
>  	}
> 
>  	/* Scaling down? Configure required OPPs after frequency */

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 13%]

* [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag
@ 2020-08-11 19:02 20% Sibi Sankar
  2020-08-11 19:02 22% ` [PATCH 2/2] soc: qcom: aoss: Use " Sibi Sankar
                   ` (4 more replies)
  0 siblings, 5 replies; 200+ results
From: Sibi Sankar @ 2020-08-11 19:02 UTC (permalink / raw)
  To: bjorn.andersson, ulf.hansson, rjw
  Cc: agross, linux-kernel, linux-arm-msm, linux-pm, gregkh, pavel,
	len.brown, rnayak, dianders, khilman, Sibi Sankar

This is for power domains which needs to stay powered on for suspend
but can be powered on/off as part of runtime PM. This flag is aimed at
power domains coupled to remote processors which enter suspend states
independent to that of the application processor. Such power domains
are turned off only on remote processor crash/shutdown.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 drivers/base/power/domain.c | 3 ++-
 include/linux/pm_domain.h   | 5 +++++
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
index 2cb5e04cf86cd..ba78ac4a450d4 100644
--- a/drivers/base/power/domain.c
+++ b/drivers/base/power/domain.c
@@ -129,6 +129,7 @@ static const struct genpd_lock_ops genpd_spin_ops = {
 #define genpd_is_active_wakeup(genpd)	(genpd->flags & GENPD_FLAG_ACTIVE_WAKEUP)
 #define genpd_is_cpu_domain(genpd)	(genpd->flags & GENPD_FLAG_CPU_DOMAIN)
 #define genpd_is_rpm_always_on(genpd)	(genpd->flags & GENPD_FLAG_RPM_ALWAYS_ON)
+#define genpd_is_suspend_on(genpd)	(genpd->flags & GENPD_FLAG_SUSPEND_ON)
 
 static inline bool irq_safe_dev_in_no_sleep_domain(struct device *dev,
 		const struct generic_pm_domain *genpd)
@@ -949,7 +950,7 @@ static void genpd_sync_power_off(struct generic_pm_domain *genpd, bool use_lock,
 {
 	struct gpd_link *link;
 
-	if (!genpd_status_on(genpd) || genpd_is_always_on(genpd))
+	if (!genpd_status_on(genpd) || genpd_is_always_on(genpd) || genpd_is_suspend_on(genpd))
 		return;
 
 	if (genpd->suspended_count != genpd->device_count
diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
index ee11502a575b0..3002a2d68936a 100644
--- a/include/linux/pm_domain.h
+++ b/include/linux/pm_domain.h
@@ -55,6 +55,10 @@
  *
  * GENPD_FLAG_RPM_ALWAYS_ON:	Instructs genpd to always keep the PM domain
  *				powered on except for system suspend.
+ *
+ * GENPD_FLAG_SUSPEND_ON:	Instructs genpd to keep the PM domain powered
+ *				on during suspend and runtime PM controlled
+ *				otherwise.
  */
 #define GENPD_FLAG_PM_CLK	 (1U << 0)
 #define GENPD_FLAG_IRQ_SAFE	 (1U << 1)
@@ -62,6 +66,7 @@
 #define GENPD_FLAG_ACTIVE_WAKEUP (1U << 3)
 #define GENPD_FLAG_CPU_DOMAIN	 (1U << 4)
 #define GENPD_FLAG_RPM_ALWAYS_ON (1U << 5)
+#define GENPD_FLAG_SUSPEND_ON	 (1U << 6)
 
 enum gpd_status {
 	GPD_STATE_ACTIVE = 0,	/* PM domain is active */
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 20%]

* [PATCH 2/2] soc: qcom: aoss: Use GENPD_FLAG_SUSPEND_ON flag
  2020-08-11 19:02 20% [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag Sibi Sankar
@ 2020-08-11 19:02 22% ` Sibi Sankar
  2020-08-11 21:16  6%   ` Doug Anderson
  2020-08-11 21:17  6% ` [PATCH 1/2] PM / Domains: Add " Doug Anderson
                   ` (3 subsequent siblings)
  4 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-08-11 19:02 UTC (permalink / raw)
  To: bjorn.andersson, ulf.hansson, rjw
  Cc: agross, linux-kernel, linux-arm-msm, linux-pm, gregkh, pavel,
	len.brown, rnayak, dianders, khilman, Sibi Sankar

All the power domains exposed as part of AOSS QMP driver require to stay
powered on for suspend. They are powered on when the remote processors
boots up and powered off on remote processor crash/shutdown. Mark the
power domains with GENPD_FLAG_SUSPEND_ON to model this behavior.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
 drivers/soc/qcom/qcom_aoss.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/soc/qcom/qcom_aoss.c b/drivers/soc/qcom/qcom_aoss.c
index ed2c687c16b31..5a5b4bf928147 100644
--- a/drivers/soc/qcom/qcom_aoss.c
+++ b/drivers/soc/qcom/qcom_aoss.c
@@ -366,6 +366,7 @@ static int qmp_pd_add(struct qmp *qmp)
 		res[i].pd.name = sdm845_resources[i];
 		res[i].pd.power_on = qmp_pd_power_on;
 		res[i].pd.power_off = qmp_pd_power_off;
+		res[i].pd.flags = GENPD_FLAG_SUSPEND_ON;
 
 		ret = pm_genpd_init(&res[i].pd, NULL, true);
 		if (ret < 0) {
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


^ permalink raw reply	[relevance 22%]

* Re: [PATCH 2/2] soc: qcom: aoss: Use GENPD_FLAG_SUSPEND_ON flag
  2020-08-11 19:02 22% ` [PATCH 2/2] soc: qcom: aoss: Use " Sibi Sankar
@ 2020-08-11 21:16  6%   ` Doug Anderson
  0 siblings, 0 replies; 200+ results
From: Doug Anderson @ 2020-08-11 21:16 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: Bjorn Andersson, Ulf Hansson, Rafael J. Wysocki, Andy Gross,
	LKML, linux-arm-msm, Linux PM, Greg Kroah-Hartman, Pavel Machek,
	Brown, Len, Rajendra Nayak, Kevin Hilman

Hi,

On Tue, Aug 11, 2020 at 12:03 PM Sibi Sankar <sibis@codeaurora.org> wrote:
>
> All the power domains exposed as part of AOSS QMP driver require to stay
> powered on for suspend. They are powered on when the remote processors
> boots up and powered off on remote processor crash/shutdown. Mark the
> power domains with GENPD_FLAG_SUSPEND_ON to model this behavior.
>
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> ---
>  drivers/soc/qcom/qcom_aoss.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/soc/qcom/qcom_aoss.c b/drivers/soc/qcom/qcom_aoss.c
> index ed2c687c16b31..5a5b4bf928147 100644
> --- a/drivers/soc/qcom/qcom_aoss.c
> +++ b/drivers/soc/qcom/qcom_aoss.c
> @@ -366,6 +366,7 @@ static int qmp_pd_add(struct qmp *qmp)
>                 res[i].pd.name = sdm845_resources[i];
>                 res[i].pd.power_on = qmp_pd_power_on;
>                 res[i].pd.power_off = qmp_pd_power_off;
> +               res[i].pd.flags = GENPD_FLAG_SUSPEND_ON;

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>

This makes my patch [1] unnecessary.

[1] https://lore.kernel.org/r/20200805091141.1.I86b3faaecb0d82997b599b1300f879606c71e116@changeid

-Doug

^ permalink raw reply	[relevance 6%]

* Re: [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag
  2020-08-11 19:02 20% [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag Sibi Sankar
  2020-08-11 19:02 22% ` [PATCH 2/2] soc: qcom: aoss: Use " Sibi Sankar
@ 2020-08-11 21:17  6% ` Doug Anderson
                     ` (2 subsequent siblings)
  4 siblings, 0 replies; 200+ results
From: Doug Anderson @ 2020-08-11 21:17 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: Bjorn Andersson, Ulf Hansson, Rafael J. Wysocki, Andy Gross,
	LKML, linux-arm-msm, Linux PM, Greg Kroah-Hartman, Pavel Machek,
	Brown, Len, Rajendra Nayak, Kevin Hilman

Hi,

On Tue, Aug 11, 2020 at 12:03 PM Sibi Sankar <sibis@codeaurora.org> wrote:
>
> This is for power domains which needs to stay powered on for suspend
> but can be powered on/off as part of runtime PM. This flag is aimed at
> power domains coupled to remote processors which enter suspend states
> independent to that of the application processor. Such power domains
> are turned off only on remote processor crash/shutdown.
>
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> ---
>  drivers/base/power/domain.c | 3 ++-
>  include/linux/pm_domain.h   | 5 +++++
>  2 files changed, 7 insertions(+), 1 deletion(-)

Seems sane to me.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>

^ permalink raw reply	[relevance 6%]

* Re: [PATCH 1/2] soc: qcom: aoss: Don't wait for IRQ if we might be in suspend/resume noirq
  2020-08-06 17:33  6%           ` Sibi Sankar
@ 2020-08-11 21:21  8%             ` Doug Anderson
  0 siblings, 0 replies; 200+ results
From: Doug Anderson @ 2020-08-11 21:21 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: Stephen Boyd, Bjorn Andersson, Alex Elder, Matthias Kaehlcke,
	Andy Gross, Vinod Koul, linux-arm-msm, LKML

Hi,

On Thu, Aug 6, 2020 at 10:33 AM Sibi Sankar <sibis@codeaurora.org> wrote:
>
> On 2020-08-06 22:40, Doug Anderson wrote:
> > Hi,
> >
> > On Thu, Aug 6, 2020 at 7:36 AM Sibi Sankar <sibis@codeaurora.org>
> > wrote:
> >>
> >> On 2020-08-06 04:32, Stephen Boyd wrote:
> >> > +Sibi who wrote the code
> >> >
> >> > Quoting Doug Anderson (2020-08-05 13:24:06)
> >> >>
> >> >> On Wed, Aug 5, 2020 at 10:36 AM Stephen Boyd <swboyd@chromium.org>
> >> >> wrote:
> >> >> >
> >> >> > Why is the genpd being powered off at all? It looks like the driver is
> >> >> > written in a way that it doesn't expect this to happen. See where
> >> >> > adsp_pds_disable() is called from. Looks like the remoteproc "stop"
> >> >> > callback should be called or the driver should be detached.
> >> >> >
> >> >> > It sort of looks like the genpd is expected to be at the max level all
> >> >> > the time (it sets INT_MAX in adsp_pds_enable(), cool).
> >> >>
> >> >> In general in Linux there are some things that, at suspend time, get
> >> >> done behind a driver's back.  The regulator API, for instance, allows
> >> >> for regulators to be turned off in suspend even if a driver leaves
> >> >> them on.  Sure, it's good practice for a driver to be explicit but the
> >> >> regulator suspend states do allow for the more heavy-handed approach.
> >> >>
> >> >> I guess I assume that genpd is a bit similar.  If a driver leaves a
> >> >> genpd on all the time then it will still be turned off at suspend time
> >> >> and then turned back on at resume time.  It seems like it must be part
> >> >> of the genpd API.  Specifically genpd_sync_power_off() says: "Check if
> >> >> the given PM domain can be powered off (during system suspend or
> >> >> hibernation) and do that if so."  That makes it seem like it's how
> >> >> genpd works.
> >> >>
> >> >> Reading all the descriptions of things like GENPD_FLAG_ALWAYS_ON,
> >> >> GENPD_FLAG_ACTIVE_WAKEUP, GENPD_FLAG_RPM_ALWAYS_ON makes me even more
> >> >> convinced that it's normal (unless otherwise specified) for genpds to
> >> >> get turned off in suspend even if a driver just blindly left them on.
> >> >>
> >> >> Presumably if this "modem" genpd is supposed to stay on in suspend
> >> >> time it should have been marked "always on"?  I'd guess we'd need to
> >> >> add "GENPD_FLAG_ALWAYS_ON" in some (or all?) cases in qmp_pd_add() if
> >> >> this was true?
> >> >
> >> > Agreed. I can't read the mind of Sibi so I can only guess that Sibi
> >> > wasn't expecting this behavior by reading the driver structure. That
> >> > could be a wrong assumption.
> >> >
> >> >>
> >> >>
> >> >> > Maybe we need to
> >> >> > add some sort of suspend hooks to the remote proc driver instead? Where
> >> >> > those suspend hooks are called earlier and drop the genpd performance
> >> >> > state request but otherwise leave it enabled across suspend?
> >> >>
> >> >> I think you're saying:
> >> >>
> >> >> a) You think it's a bug today that the "modem" genpd is being powered
> >> >> off in suspend.  Any evidence to back this up?
> >> >>
> >> >> b) Assuming it's a bug today, we should mark the "modem" as
> >> >> GENPD_FLAG_ALWAYS_ON.
> >> >>
> >> >> c) If there are genpds that sometimes should be left on in suspend but
> >> >> sometimes not (and that doesn't match up with what
> >> >> GENPD_FLAG_ACTIVE_WAKEUP does), then we'd have to pass
> >> >> GENPD_FLAG_ALWAYS_ON as a flag and then add suspend hooks to make the
> >> >> decision for us.
> >>
> >> Doug/Stephen,
> >>
> >> Yes this is a bug, we wouldn't want
> >> to disable aoss_qmp genpd for modem
> >> during suspend (when the modem is
> >> running). The qmp send for modem
> >> is the primary means through which
> >> aoss determines whether to wait for
> >> modem before proceeding to sleep. So
> >> looks like updating the flag with
> >> GENPD_FLAG_ACTIVE_WAKEUP is the way
> >> to go. But introducing another flag
> >> that doesn't touch genpd's during
> >> suspend/resume should also work.
> >
> > OK, sounds good.  As per out-of-band conversation:
> >
> > * You'll plan to post a patch updating the flag.
> >
> > * There's still nothing here that says my patch is the wrong thing to
> > do also.  It seems like genpd poweroff routine are expected to be able
> > to run at "noirq" time so we should make sure we are able to do that.
> >
> > I'm also curious: my patch doesn't affect the behavior.  The genpd
> > would be powered off with or without my patch, my patch just removes a
> > pointless 1 second delay.  Therefore I guess today there is some type
> > of bug because the genpd is being turned off.  What would be the
> > visible impact of that bug?  ...or is it somehow masked by something
> > else keeping this power on so it wasn't an issue right now?
>
> I've been told AOSS decides to wait
> for modem suspend if its been notified
> that modem is on through qmp_send. AFAIK
> we never ran into this because AOSS sleep
> sequence starts after xo-shutdown which
> wont be reached in the presence of active
> rpmh votes from modem.
>
> Regardless we definitely want this genpd left
> untouched during suspend/resume.

With Sibi's patch [1] then ${SUBJECT} patch is no longer needed since
we are no longer called during "noirq" / "syscore" time.  Assuming
Sibi's patches (or something similar to them) are OK, we can consider
this patch abandoned.  I'll re-post patch #2 on its own once we get
confirmation that Sibi's patches are OK w/ folks.

[1] https://lore.kernel.org/r/20200811190252.10559-2-sibis@codeaurora.org

-Doug

^ permalink raw reply	[relevance 8%]

* Re: [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag
  2020-08-11 19:02 20% [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag Sibi Sankar
                   ` (2 preceding siblings ...)
  @ 2020-08-12  0:19  6% ` Kevin Hilman
  2020-08-12 16:12  6%   ` Sibi Sankar
  2020-08-12  9:45  6% ` Ulf Hansson
  4 siblings, 1 reply; 200+ results
From: Kevin Hilman @ 2020-08-12  0:19 UTC (permalink / raw)
  To: Sibi Sankar, bjorn.andersson, ulf.hansson, rjw
  Cc: agross, linux-kernel, linux-arm-msm, linux-pm, gregkh, pavel,
	len.brown, rnayak, dianders, khilman, Sibi Sankar

Sibi Sankar <sibis@codeaurora.org> writes:

> This is for power domains which needs to stay powered on for suspend
> but can be powered on/off as part of runtime PM. This flag is aimed at
> power domains coupled to remote processors which enter suspend states
> independent to that of the application processor. Such power domains
> are turned off only on remote processor crash/shutdown.
>
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>

Seems like a useful use-case, but i think there should be a bit more
description/documentation about what is the expected/desired behavior
during system suspsend when a power-domain with this flag is already
runtime-PM suspended.  Similarily, on system resume, what is the
expected/desired behavior?

Kevin

^ permalink raw reply	[relevance 6%]

* Re: [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag
  2020-08-11 19:02 20% [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag Sibi Sankar
                   ` (3 preceding siblings ...)
  2020-08-12  0:19  6% ` Kevin Hilman
@ 2020-08-12  9:45  6% ` Ulf Hansson
  2020-08-12 17:02  6%   ` Sibi Sankar
  4 siblings, 1 reply; 200+ results
From: Ulf Hansson @ 2020-08-12  9:45 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: Bjorn Andersson, Rafael J. Wysocki, Andy Gross,
	Linux Kernel Mailing List, linux-arm-msm, Linux PM,
	Greg Kroah-Hartman, Pavel Machek, Len Brown, Rajendra Nayak,
	Doug Anderson, Kevin Hilman

On Tue, 11 Aug 2020 at 21:03, Sibi Sankar <sibis@codeaurora.org> wrote:
>
> This is for power domains which needs to stay powered on for suspend
> but can be powered on/off as part of runtime PM. This flag is aimed at
> power domains coupled to remote processors which enter suspend states
> independent to that of the application processor. Such power domains
> are turned off only on remote processor crash/shutdown.

As Kevin also requested, please elaborate more on the use case.

Why exactly must the PM domain stay powered on during system suspend?
Is there a wakeup configured that needs to be managed - or is there a
co-processor/FW behaviour that needs to be obeyed to?

Kind regards
Uffe

>
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> ---
>  drivers/base/power/domain.c | 3 ++-
>  include/linux/pm_domain.h   | 5 +++++
>  2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
> index 2cb5e04cf86cd..ba78ac4a450d4 100644
> --- a/drivers/base/power/domain.c
> +++ b/drivers/base/power/domain.c
> @@ -129,6 +129,7 @@ static const struct genpd_lock_ops genpd_spin_ops = {
>  #define genpd_is_active_wakeup(genpd)  (genpd->flags & GENPD_FLAG_ACTIVE_WAKEUP)
>  #define genpd_is_cpu_domain(genpd)     (genpd->flags & GENPD_FLAG_CPU_DOMAIN)
>  #define genpd_is_rpm_always_on(genpd)  (genpd->flags & GENPD_FLAG_RPM_ALWAYS_ON)
> +#define genpd_is_suspend_on(genpd)     (genpd->flags & GENPD_FLAG_SUSPEND_ON)
>
>  static inline bool irq_safe_dev_in_no_sleep_domain(struct device *dev,
>                 const struct generic_pm_domain *genpd)
> @@ -949,7 +950,7 @@ static void genpd_sync_power_off(struct generic_pm_domain *genpd, bool use_lock,
>  {
>         struct gpd_link *link;
>
> -       if (!genpd_status_on(genpd) || genpd_is_always_on(genpd))
> +       if (!genpd_status_on(genpd) || genpd_is_always_on(genpd) || genpd_is_suspend_on(genpd))
>                 return;
>
>         if (genpd->suspended_count != genpd->device_count
> diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
> index ee11502a575b0..3002a2d68936a 100644
> --- a/include/linux/pm_domain.h
> +++ b/include/linux/pm_domain.h
> @@ -55,6 +55,10 @@
>   *
>   * GENPD_FLAG_RPM_ALWAYS_ON:   Instructs genpd to always keep the PM domain
>   *                             powered on except for system suspend.
> + *
> + * GENPD_FLAG_SUSPEND_ON:      Instructs genpd to keep the PM domain powered
> + *                             on during suspend and runtime PM controlled
> + *                             otherwise.
>   */
>  #define GENPD_FLAG_PM_CLK       (1U << 0)
>  #define GENPD_FLAG_IRQ_SAFE     (1U << 1)
> @@ -62,6 +66,7 @@
>  #define GENPD_FLAG_ACTIVE_WAKEUP (1U << 3)
>  #define GENPD_FLAG_CPU_DOMAIN   (1U << 4)
>  #define GENPD_FLAG_RPM_ALWAYS_ON (1U << 5)
> +#define GENPD_FLAG_SUSPEND_ON   (1U << 6)
>
>  enum gpd_status {
>         GPD_STATE_ACTIVE = 0,   /* PM domain is active */
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>

^ permalink raw reply	[relevance 6%]

* Re: [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag
  @ 2020-08-12 13:36  6%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-08-12 13:36 UTC (permalink / raw)
  To: Stephen Boyd
  Cc: bjorn.andersson, rjw, ulf.hansson, agross, linux-kernel,
	linux-arm-msm, linux-pm, gregkh, pavel, len.brown, rnayak,
	dianders, khilman

Hey Stephen,
Thanks for taking time to review the
series!

On 2020-08-12 03:08, Stephen Boyd wrote:
> Quoting Sibi Sankar (2020-08-11 12:02:51)
>> diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
>> index ee11502a575b0..3002a2d68936a 100644
>> --- a/include/linux/pm_domain.h
>> +++ b/include/linux/pm_domain.h
>> @@ -55,6 +55,10 @@
>>   *
>>   * GENPD_FLAG_RPM_ALWAYS_ON:   Instructs genpd to always keep the PM 
>> domain
>>   *                             powered on except for system suspend.
>> + *
>> + * GENPD_FLAG_SUSPEND_ON:      Instructs genpd to keep the PM domain 
>> powered
>> + *                             on during suspend and runtime PM 
>> controlled
> 
> Maybe, "powered on across system suspend (if it is already powered on)"
> to match the hunk above that talks about system suspend for
> GENPD_FLAG_RPM_ALWAYS_ON. Otherwise someone may think that this powers
> on the genpd during suspend or powers it on during runtime suspend.

Sure, I'll add ^^ in the next re-spin.

> 
>> + *                             otherwise.
>>   */
>>  #define GENPD_FLAG_PM_CLK       (1U << 0)
>>  #define GENPD_FLAG_IRQ_SAFE     (1U << 1)

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* Re: [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag
  2020-08-12  0:19  6% ` Kevin Hilman
@ 2020-08-12 16:12  6%   ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-08-12 16:12 UTC (permalink / raw)
  To: Kevin Hilman
  Cc: bjorn.andersson, ulf.hansson, rjw, agross, linux-kernel,
	linux-arm-msm, linux-pm, gregkh, pavel, len.brown, rnayak,
	dianders, khilman, linux-arm-msm-owner

Kevin,
Thanks for taking time to review the
series!

On 2020-08-12 05:49, Kevin Hilman wrote:
> Sibi Sankar <sibis@codeaurora.org> writes:
> 
>> This is for power domains which needs to stay powered on for suspend
>> but can be powered on/off as part of runtime PM. This flag is aimed at
>> power domains coupled to remote processors which enter suspend states
>> independent to that of the application processor. Such power domains
>> are turned off only on remote processor crash/shutdown.
>> 
>> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> 
> Seems like a useful use-case, but i think there should be a bit more
> description/documentation about what is the expected/desired behavior
> during system suspsend when a power-domain with this flag is already
> runtime-PM suspended.  Similarily, on system resume, what is the
> expected/desired behavior?

SUSPEND_ON flag is only aimed at
keeping power domains powered on
across suspend (only if its already
powered on). Also if the power domain
is runtime-PM suspended we wouldn't
want to power it on during resume.

diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
index 0a5afca250d03..547c091618008 100644
--- a/drivers/base/power/domain.c
+++ b/drivers/base/power/domain.c
@@ -1003,7 +1003,7 @@ static void genpd_sync_power_on(struct 
generic_pm_domain *genpd, bool use_lock,
  {
         struct gpd_link *link;

-       if (genpd_status_on(genpd))
+       if (genpd_status_on(genpd) || genpd_is_suspend_on(genpd))
                 return;

I'll add the ^^ diff in the next
re-spin to prevent power on of
a runtime-PM suspended power
domain.

> 
> Kevin

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* Re: [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag
  2020-08-12  9:45  6% ` Ulf Hansson
@ 2020-08-12 17:02  6%   ` Sibi Sankar
  2020-08-13 12:34  6%     ` Ulf Hansson
  0 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-08-12 17:02 UTC (permalink / raw)
  To: Ulf Hansson
  Cc: Bjorn Andersson, Rafael J. Wysocki, Andy Gross,
	Linux Kernel Mailing List, linux-arm-msm, Linux PM,
	Greg Kroah-Hartman, Pavel Machek, Len Brown, Rajendra Nayak,
	Doug Anderson, linux-kernel-owner, Kevin Hilman

Uffe,
Thanks for taking time to review the
series!

On 2020-08-12 15:15, Ulf Hansson wrote:
> On Tue, 11 Aug 2020 at 21:03, Sibi Sankar <sibis@codeaurora.org> wrote:
>> 
>> This is for power domains which needs to stay powered on for suspend
>> but can be powered on/off as part of runtime PM. This flag is aimed at
>> power domains coupled to remote processors which enter suspend states
>> independent to that of the application processor. Such power domains
>> are turned off only on remote processor crash/shutdown.
> 
> As Kevin also requested, please elaborate more on the use case.
> 
> Why exactly must the PM domain stay powered on during system suspend?
> Is there a wakeup configured that needs to be managed - or is there a
> co-processor/FW behaviour that needs to be obeyed to?

Yes this is a co-processor behavior that
needs to be obeyed. Specifically application
processor notifies the Always on Subsystem
(AOSS) that a particular co-processor is up
using the power domains exposed by AOSS QMP
driver. AOSS uses this information to wait
for the co-processors to suspend before
starting its sleep sequence. The application
processor powers off these power domains only
if the co-processor has crashed or powered
off.

> 
> Kind regards
> Uffe
> 
>> 
>> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
>> ---
>>  drivers/base/power/domain.c | 3 ++-
>>  include/linux/pm_domain.h   | 5 +++++
>>  2 files changed, 7 insertions(+), 1 deletion(-)
>> 
>> diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
>> index 2cb5e04cf86cd..ba78ac4a450d4 100644
>> --- a/drivers/base/power/domain.c
>> +++ b/drivers/base/power/domain.c
>> @@ -129,6 +129,7 @@ static const struct genpd_lock_ops genpd_spin_ops 
>> = {
>>  #define genpd_is_active_wakeup(genpd)  (genpd->flags & 
>> GENPD_FLAG_ACTIVE_WAKEUP)
>>  #define genpd_is_cpu_domain(genpd)     (genpd->flags & 
>> GENPD_FLAG_CPU_DOMAIN)
>>  #define genpd_is_rpm_always_on(genpd)  (genpd->flags & 
>> GENPD_FLAG_RPM_ALWAYS_ON)
>> +#define genpd_is_suspend_on(genpd)     (genpd->flags & 
>> GENPD_FLAG_SUSPEND_ON)
>> 
>>  static inline bool irq_safe_dev_in_no_sleep_domain(struct device 
>> *dev,
>>                 const struct generic_pm_domain *genpd)
>> @@ -949,7 +950,7 @@ static void genpd_sync_power_off(struct 
>> generic_pm_domain *genpd, bool use_lock,
>>  {
>>         struct gpd_link *link;
>> 
>> -       if (!genpd_status_on(genpd) || genpd_is_always_on(genpd))
>> +       if (!genpd_status_on(genpd) || genpd_is_always_on(genpd) || 
>> genpd_is_suspend_on(genpd))
>>                 return;
>> 
>>         if (genpd->suspended_count != genpd->device_count
>> diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
>> index ee11502a575b0..3002a2d68936a 100644
>> --- a/include/linux/pm_domain.h
>> +++ b/include/linux/pm_domain.h
>> @@ -55,6 +55,10 @@
>>   *
>>   * GENPD_FLAG_RPM_ALWAYS_ON:   Instructs genpd to always keep the PM 
>> domain
>>   *                             powered on except for system suspend.
>> + *
>> + * GENPD_FLAG_SUSPEND_ON:      Instructs genpd to keep the PM domain 
>> powered
>> + *                             on during suspend and runtime PM 
>> controlled
>> + *                             otherwise.
>>   */
>>  #define GENPD_FLAG_PM_CLK       (1U << 0)
>>  #define GENPD_FLAG_IRQ_SAFE     (1U << 1)
>> @@ -62,6 +66,7 @@
>>  #define GENPD_FLAG_ACTIVE_WAKEUP (1U << 3)
>>  #define GENPD_FLAG_CPU_DOMAIN   (1U << 4)
>>  #define GENPD_FLAG_RPM_ALWAYS_ON (1U << 5)
>> +#define GENPD_FLAG_SUSPEND_ON   (1U << 6)
>> 
>>  enum gpd_status {
>>         GPD_STATE_ACTIVE = 0,   /* PM domain is active */
>> --
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora 
>> Forum,
>> a Linux Foundation Collaborative Project
>> 

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* [PATCH V2 1/4] opp: Enable resources again if they were disabled earlier
    2020-08-10 10:41 13% ` Sibi Sankar
@ 2020-08-13  4:28  7% ` Viresh Kumar
  1 sibling, 0 replies; 200+ results
From: Viresh Kumar @ 2020-08-13  4:28 UTC (permalink / raw)
  To: Viresh Kumar, Nishanth Menon, Stephen Boyd, Rajendra Nayak
  Cc: Viresh Kumar, linux-pm, Vincent Guittot, Rafael Wysocki, mka,
	sibis, v5 . 3+,
	Sajida Bhanu, Stephen Boyd, linux-kernel

From: Rajendra Nayak <rnayak@codeaurora.org>

dev_pm_opp_set_rate() can now be called with freq = 0 in order
to either drop performance or bandwidth votes or to disable
regulators on platforms which support them.

In such cases, a subsequent call to dev_pm_opp_set_rate() with
the same frequency ends up returning early because 'old_freq == freq'

Instead make it fall through and put back the dropped performance
and bandwidth votes and/or enable back the regulators.

Cc: v5.3+ <stable@vger.kernel.org> # v5.3+
Fixes: cd7ea582 ("opp: Make dev_pm_opp_set_rate() handle freq = 0 to drop performance votes")
Reported-by: Sajida Bhanu <sbhanu@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Reported-by: Matthias Kaehlcke <mka@chromium.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
[ Viresh: Don't skip clk_set_rate() and massaged changelog ]
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
Hi Rajendra,

I wasn't able to test this stuff, please give it a try. I have
simplified your patch and cleaned up a bunch of stuff as well.

 drivers/opp/core.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/opp/core.c b/drivers/opp/core.c
index bdb028c7793d..9668ea04cc80 100644
--- a/drivers/opp/core.c
+++ b/drivers/opp/core.c
@@ -934,10 +934,13 @@ int dev_pm_opp_set_rate(struct device *dev, unsigned long target_freq)
 
 	/* Return early if nothing to do */
 	if (old_freq == freq) {
-		dev_dbg(dev, "%s: old/new frequencies (%lu Hz) are same, nothing to do\n",
-			__func__, freq);
-		ret = 0;
-		goto put_opp_table;
+		if (!opp_table->required_opp_tables && !opp_table->regulators &&
+		    !opp_table->paths) {
+			dev_dbg(dev, "%s: old/new frequencies (%lu Hz) are same, nothing to do\n",
+				__func__, freq);
+			ret = 0;
+			goto put_opp_table;
+		}
 	}
 
 	/*
-- 
2.14.1


^ permalink raw reply	[relevance 7%]

* Re: [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag
  2020-08-12 17:02  6%   ` Sibi Sankar
@ 2020-08-13 12:34  6%     ` Ulf Hansson
  2020-08-13 17:26  6%       ` Sibi Sankar
  0 siblings, 1 reply; 200+ results
From: Ulf Hansson @ 2020-08-13 12:34 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: Bjorn Andersson, Rafael J. Wysocki, Andy Gross,
	Linux Kernel Mailing List, linux-arm-msm, Linux PM,
	Greg Kroah-Hartman, Pavel Machek, Len Brown, Rajendra Nayak,
	Doug Anderson, linux-kernel-owner, Kevin Hilman

On Wed, 12 Aug 2020 at 19:03, Sibi Sankar <sibis@codeaurora.org> wrote:
>
> Uffe,
> Thanks for taking time to review the
> series!
>
> On 2020-08-12 15:15, Ulf Hansson wrote:
> > On Tue, 11 Aug 2020 at 21:03, Sibi Sankar <sibis@codeaurora.org> wrote:
> >>
> >> This is for power domains which needs to stay powered on for suspend
> >> but can be powered on/off as part of runtime PM. This flag is aimed at
> >> power domains coupled to remote processors which enter suspend states
> >> independent to that of the application processor. Such power domains
> >> are turned off only on remote processor crash/shutdown.
> >
> > As Kevin also requested, please elaborate more on the use case.
> >
> > Why exactly must the PM domain stay powered on during system suspend?
> > Is there a wakeup configured that needs to be managed - or is there a
> > co-processor/FW behaviour that needs to be obeyed to?
>
> Yes this is a co-processor behavior that
> needs to be obeyed. Specifically application
> processor notifies the Always on Subsystem
> (AOSS) that a particular co-processor is up
> using the power domains exposed by AOSS QMP
> driver. AOSS uses this information to wait
> for the co-processors to suspend before
> starting its sleep sequence. The application
> processor powers off these power domains only
> if the co-processor has crashed or powered
> off.

Thanks for clarifying!

Although, can you please elaborate a bit more on the actual use case?
What are the typical co-processor and what drivers are involved in
managing it?

As you may know, runtime PM becomes disabled during system suspend of
a device. Which means, if the driver tries to power off the
coprocessor (via calling pm_runtime_put() for example), somewhere in
the system suspend phase of the corresponding device, its attached PM
domain stays powered on when managed by genpd.

Then in the suspend_noirq phase, genpd tries to power off the PM
domain, unless there are wakeups to consider.

Taking the above into account, wouldn't that mean that you potentially
may end up keeping the PM domain powered on, even if it actually can
be powered off in the suspend_noirq phase by genpd?

Kind regards
Uffe

> >
> >>
> >> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> >> ---
> >>  drivers/base/power/domain.c | 3 ++-
> >>  include/linux/pm_domain.h   | 5 +++++
> >>  2 files changed, 7 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
> >> index 2cb5e04cf86cd..ba78ac4a450d4 100644
> >> --- a/drivers/base/power/domain.c
> >> +++ b/drivers/base/power/domain.c
> >> @@ -129,6 +129,7 @@ static const struct genpd_lock_ops genpd_spin_ops
> >> = {
> >>  #define genpd_is_active_wakeup(genpd)  (genpd->flags &
> >> GENPD_FLAG_ACTIVE_WAKEUP)
> >>  #define genpd_is_cpu_domain(genpd)     (genpd->flags &
> >> GENPD_FLAG_CPU_DOMAIN)
> >>  #define genpd_is_rpm_always_on(genpd)  (genpd->flags &
> >> GENPD_FLAG_RPM_ALWAYS_ON)
> >> +#define genpd_is_suspend_on(genpd)     (genpd->flags &
> >> GENPD_FLAG_SUSPEND_ON)
> >>
> >>  static inline bool irq_safe_dev_in_no_sleep_domain(struct device
> >> *dev,
> >>                 const struct generic_pm_domain *genpd)
> >> @@ -949,7 +950,7 @@ static void genpd_sync_power_off(struct
> >> generic_pm_domain *genpd, bool use_lock,
> >>  {
> >>         struct gpd_link *link;
> >>
> >> -       if (!genpd_status_on(genpd) || genpd_is_always_on(genpd))
> >> +       if (!genpd_status_on(genpd) || genpd_is_always_on(genpd) ||
> >> genpd_is_suspend_on(genpd))
> >>                 return;
> >>
> >>         if (genpd->suspended_count != genpd->device_count
> >> diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
> >> index ee11502a575b0..3002a2d68936a 100644
> >> --- a/include/linux/pm_domain.h
> >> +++ b/include/linux/pm_domain.h
> >> @@ -55,6 +55,10 @@
> >>   *
> >>   * GENPD_FLAG_RPM_ALWAYS_ON:   Instructs genpd to always keep the PM
> >> domain
> >>   *                             powered on except for system suspend.
> >> + *
> >> + * GENPD_FLAG_SUSPEND_ON:      Instructs genpd to keep the PM domain
> >> powered
> >> + *                             on during suspend and runtime PM
> >> controlled
> >> + *                             otherwise.
> >>   */
> >>  #define GENPD_FLAG_PM_CLK       (1U << 0)
> >>  #define GENPD_FLAG_IRQ_SAFE     (1U << 1)
> >> @@ -62,6 +66,7 @@
> >>  #define GENPD_FLAG_ACTIVE_WAKEUP (1U << 3)
> >>  #define GENPD_FLAG_CPU_DOMAIN   (1U << 4)
> >>  #define GENPD_FLAG_RPM_ALWAYS_ON (1U << 5)
> >> +#define GENPD_FLAG_SUSPEND_ON   (1U << 6)
> >>
> >>  enum gpd_status {
> >>         GPD_STATE_ACTIVE = 0,   /* PM domain is active */
> >> --
> >> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
> >> Forum,
> >> a Linux Foundation Collaborative Project
> >>
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* Re: [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag
  2020-08-13 12:34  6%     ` Ulf Hansson
@ 2020-08-13 17:26  6%       ` Sibi Sankar
  2020-08-17  8:44  6%         ` Ulf Hansson
  0 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-08-13 17:26 UTC (permalink / raw)
  To: Ulf Hansson
  Cc: Bjorn Andersson, Rafael J. Wysocki, Andy Gross,
	Linux Kernel Mailing List, linux-arm-msm, Linux PM,
	Greg Kroah-Hartman, Pavel Machek, Len Brown, Rajendra Nayak,
	Doug Anderson, linux-kernel-owner, Kevin Hilman

On 2020-08-13 18:04, Ulf Hansson wrote:
> On Wed, 12 Aug 2020 at 19:03, Sibi Sankar <sibis@codeaurora.org> wrote:
>> 
>> Uffe,
>> Thanks for taking time to review the
>> series!
>> 
>> On 2020-08-12 15:15, Ulf Hansson wrote:
>> > On Tue, 11 Aug 2020 at 21:03, Sibi Sankar <sibis@codeaurora.org> wrote:
>> >>
>> >> This is for power domains which needs to stay powered on for suspend
>> >> but can be powered on/off as part of runtime PM. This flag is aimed at
>> >> power domains coupled to remote processors which enter suspend states
>> >> independent to that of the application processor. Such power domains
>> >> are turned off only on remote processor crash/shutdown.
>> >
>> > As Kevin also requested, please elaborate more on the use case.
>> >
>> > Why exactly must the PM domain stay powered on during system suspend?
>> > Is there a wakeup configured that needs to be managed - or is there a
>> > co-processor/FW behaviour that needs to be obeyed to?
>> 
>> Yes this is a co-processor behavior that
>> needs to be obeyed. Specifically application
>> processor notifies the Always on Subsystem
>> (AOSS) that a particular co-processor is up
>> using the power domains exposed by AOSS QMP
>> driver. AOSS uses this information to wait
>> for the co-processors to suspend before
>> starting its sleep sequence. The application
>> processor powers off these power domains only
>> if the co-processor has crashed or powered
>> off.
> 
> Thanks for clarifying!
> 
> Although, can you please elaborate a bit more on the actual use case?
> What are the typical co-processor and what drivers are involved in
> managing it?

The co-processors using the power domains
exposed by qcom_aoss driver are modem,
audio dsp, compute dsp managed using
qcom_q6v5_mss and qcom_q6v5_pas driver.

> 
> As you may know, runtime PM becomes disabled during system suspend of
> a device. Which means, if the driver tries to power off the
> coprocessor (via calling pm_runtime_put() for example), somewhere in
> the system suspend phase of the corresponding device, its attached PM
> domain stays powered on when managed by genpd.

The drivers aren't really expected
do anything during suspend/resume
pretty much because the co-processors
enter low-power modes independent to
that of the application processor. On
co-processor crash the remoteproc core
does a pm_stay_awake followed by a
pm_relax after crash recovery.

> 
> Then in the suspend_noirq phase, genpd tries to power off the PM
> domain, unless there are wakeups to consider.
> 
> Taking the above into account, wouldn't that mean that you potentially
> may end up keeping the PM domain powered on, even if it actually can
> be powered off in the suspend_noirq phase by genpd?
> 
> Kind regards
> Uffe
> 
>> >
>> >>
>> >> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
>> >> ---
>> >>  drivers/base/power/domain.c | 3 ++-
>> >>  include/linux/pm_domain.h   | 5 +++++
>> >>  2 files changed, 7 insertions(+), 1 deletion(-)
>> >>
>> >> diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
>> >> index 2cb5e04cf86cd..ba78ac4a450d4 100644
>> >> --- a/drivers/base/power/domain.c
>> >> +++ b/drivers/base/power/domain.c
>> >> @@ -129,6 +129,7 @@ static const struct genpd_lock_ops genpd_spin_ops
>> >> = {
>> >>  #define genpd_is_active_wakeup(genpd)  (genpd->flags &
>> >> GENPD_FLAG_ACTIVE_WAKEUP)
>> >>  #define genpd_is_cpu_domain(genpd)     (genpd->flags &
>> >> GENPD_FLAG_CPU_DOMAIN)
>> >>  #define genpd_is_rpm_always_on(genpd)  (genpd->flags &
>> >> GENPD_FLAG_RPM_ALWAYS_ON)
>> >> +#define genpd_is_suspend_on(genpd)     (genpd->flags &
>> >> GENPD_FLAG_SUSPEND_ON)
>> >>
>> >>  static inline bool irq_safe_dev_in_no_sleep_domain(struct device
>> >> *dev,
>> >>                 const struct generic_pm_domain *genpd)
>> >> @@ -949,7 +950,7 @@ static void genpd_sync_power_off(struct
>> >> generic_pm_domain *genpd, bool use_lock,
>> >>  {
>> >>         struct gpd_link *link;
>> >>
>> >> -       if (!genpd_status_on(genpd) || genpd_is_always_on(genpd))
>> >> +       if (!genpd_status_on(genpd) || genpd_is_always_on(genpd) ||
>> >> genpd_is_suspend_on(genpd))
>> >>                 return;
>> >>
>> >>         if (genpd->suspended_count != genpd->device_count
>> >> diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
>> >> index ee11502a575b0..3002a2d68936a 100644
>> >> --- a/include/linux/pm_domain.h
>> >> +++ b/include/linux/pm_domain.h
>> >> @@ -55,6 +55,10 @@
>> >>   *
>> >>   * GENPD_FLAG_RPM_ALWAYS_ON:   Instructs genpd to always keep the PM
>> >> domain
>> >>   *                             powered on except for system suspend.
>> >> + *
>> >> + * GENPD_FLAG_SUSPEND_ON:      Instructs genpd to keep the PM domain
>> >> powered
>> >> + *                             on during suspend and runtime PM
>> >> controlled
>> >> + *                             otherwise.
>> >>   */
>> >>  #define GENPD_FLAG_PM_CLK       (1U << 0)
>> >>  #define GENPD_FLAG_IRQ_SAFE     (1U << 1)
>> >> @@ -62,6 +66,7 @@
>> >>  #define GENPD_FLAG_ACTIVE_WAKEUP (1U << 3)
>> >>  #define GENPD_FLAG_CPU_DOMAIN   (1U << 4)
>> >>  #define GENPD_FLAG_RPM_ALWAYS_ON (1U << 5)
>> >> +#define GENPD_FLAG_SUSPEND_ON   (1U << 6)
>> >>
>> >>  enum gpd_status {
>> >>         GPD_STATE_ACTIVE = 0,   /* PM domain is active */
>> >> --
>> >> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
>> >> Forum,
>> >> a Linux Foundation Collaborative Project
>> >>
>> 
>> --
>> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
>> a Linux Foundation Collaborative Project.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* Re: [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag
  2020-08-13 17:26  6%       ` Sibi Sankar
@ 2020-08-17  8:44  6%         ` Ulf Hansson
  2020-08-17 16:49  6%           ` Sibi Sankar
  0 siblings, 1 reply; 200+ results
From: Ulf Hansson @ 2020-08-17  8:44 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: Bjorn Andersson, Rafael J. Wysocki, Andy Gross,
	Linux Kernel Mailing List, linux-arm-msm, Linux PM,
	Greg Kroah-Hartman, Pavel Machek, Len Brown, Rajendra Nayak,
	Doug Anderson, linux-kernel-owner, Kevin Hilman

On Thu, 13 Aug 2020 at 19:26, Sibi Sankar <sibis@codeaurora.org> wrote:
>
> On 2020-08-13 18:04, Ulf Hansson wrote:
> > On Wed, 12 Aug 2020 at 19:03, Sibi Sankar <sibis@codeaurora.org> wrote:
> >>
> >> Uffe,
> >> Thanks for taking time to review the
> >> series!
> >>
> >> On 2020-08-12 15:15, Ulf Hansson wrote:
> >> > On Tue, 11 Aug 2020 at 21:03, Sibi Sankar <sibis@codeaurora.org> wrote:
> >> >>
> >> >> This is for power domains which needs to stay powered on for suspend
> >> >> but can be powered on/off as part of runtime PM. This flag is aimed at
> >> >> power domains coupled to remote processors which enter suspend states
> >> >> independent to that of the application processor. Such power domains
> >> >> are turned off only on remote processor crash/shutdown.
> >> >
> >> > As Kevin also requested, please elaborate more on the use case.
> >> >
> >> > Why exactly must the PM domain stay powered on during system suspend?
> >> > Is there a wakeup configured that needs to be managed - or is there a
> >> > co-processor/FW behaviour that needs to be obeyed to?
> >>
> >> Yes this is a co-processor behavior that
> >> needs to be obeyed. Specifically application
> >> processor notifies the Always on Subsystem
> >> (AOSS) that a particular co-processor is up
> >> using the power domains exposed by AOSS QMP
> >> driver. AOSS uses this information to wait
> >> for the co-processors to suspend before
> >> starting its sleep sequence. The application
> >> processor powers off these power domains only
> >> if the co-processor has crashed or powered
> >> off.
> >
> > Thanks for clarifying!
> >
> > Although, can you please elaborate a bit more on the actual use case?
> > What are the typical co-processor and what drivers are involved in
> > managing it?
>
> The co-processors using the power domains
> exposed by qcom_aoss driver are modem,
> audio dsp, compute dsp managed using
> qcom_q6v5_mss and qcom_q6v5_pas driver.
>
> >
> > As you may know, runtime PM becomes disabled during system suspend of
> > a device. Which means, if the driver tries to power off the
> > coprocessor (via calling pm_runtime_put() for example), somewhere in
> > the system suspend phase of the corresponding device, its attached PM
> > domain stays powered on when managed by genpd.
>
> The drivers aren't really expected
> do anything during suspend/resume
> pretty much because the co-processors
> enter low-power modes independent to
> that of the application processor. On
> co-processor crash the remoteproc core
> does a pm_stay_awake followed by a
> pm_relax after crash recovery.

Okay, thanks again for clarifying. You have convinced me about the
need for a new flag to cope with these use cases.

Would you mind updating the commit message with some of the
information you just provided?

Additionally, to make it clear that the flag should be used to keep
the PM domain powered on during system suspend, but only if it's
already powered on - please rename the flag to GENPD_FLAG_NO_SUSPEND,
and update the corresponding description of it in the header file.

[...]

Kind regards
Uffe

^ permalink raw reply	[relevance 6%]

* [PATCH 5.7 047/393] soc: qcom: pdr: Reorder the PD state indication ack
  2020-08-17 15:10  2% [PATCH 5.7 000/393] 5.7.16-rc1 review Greg Kroah-Hartman
@ 2020-08-17 15:11  9% ` Greg Kroah-Hartman
  0 siblings, 0 replies; 200+ results
From: Greg Kroah-Hartman @ 2020-08-17 15:11 UTC (permalink / raw)
  To: linux-kernel
  Cc: Greg Kroah-Hartman, stable, Bjorn Andersson, Rishabh Bhatnagar,
	Sibi Sankar, Sasha Levin

From: Sibi Sankar <sibis@codeaurora.org>

[ Upstream commit 72fe996f9643043c8f84e32c0610975b01aa555b ]

The Protection Domains (PD) have a mechanism to keep its resources
enabled until the PD down indication is acked. Reorder the PD state
indication ack so that clients get to release the relevant resources
before the PD goes down.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Fixes: fbe639b44a82 ("soc: qcom: Introduce Protection Domain Restart helpers")
Reported-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200701195954.9007-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 drivers/soc/qcom/pdr_interface.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/qcom/pdr_interface.c b/drivers/soc/qcom/pdr_interface.c
index 17ad3b8698e16..cd8828c857234 100644
--- a/drivers/soc/qcom/pdr_interface.c
+++ b/drivers/soc/qcom/pdr_interface.c
@@ -282,13 +282,15 @@ static void pdr_indack_work(struct work_struct *work)
 
 	list_for_each_entry_safe(ind, tmp, &pdr->indack_list, node) {
 		pds = ind->pds;
-		pdr_send_indack_msg(pdr, pds, ind->transaction_id);
 
 		mutex_lock(&pdr->status_lock);
 		pds->state = ind->curr_state;
 		pdr->status(pds->state, pds->service_path, pdr->priv);
 		mutex_unlock(&pdr->status_lock);
 
+		/* Ack the indication after clients release the PD resources */
+		pdr_send_indack_msg(pdr, pds, ind->transaction_id);
+
 		mutex_lock(&pdr->list_lock);
 		list_del(&ind->node);
 		mutex_unlock(&pdr->list_lock);
-- 
2.25.1




^ permalink raw reply	[relevance 9%]

* Re: [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag
  2020-08-17  8:44  6%         ` Ulf Hansson
@ 2020-08-17 16:49  6%           ` Sibi Sankar
  2020-08-18  8:31  6%             ` Ulf Hansson
  0 siblings, 1 reply; 200+ results
From: Sibi Sankar @ 2020-08-17 16:49 UTC (permalink / raw)
  To: Ulf Hansson
  Cc: Bjorn Andersson, Rafael J. Wysocki, Andy Gross,
	Linux Kernel Mailing List, linux-arm-msm, Linux PM,
	Greg Kroah-Hartman, Pavel Machek, Len Brown, Rajendra Nayak,
	Doug Anderson, linux-kernel-owner, Kevin Hilman,
	linux-arm-msm-owner

On 2020-08-17 14:14, Ulf Hansson wrote:
> On Thu, 13 Aug 2020 at 19:26, Sibi Sankar <sibis@codeaurora.org> wrote:
>> 
>> On 2020-08-13 18:04, Ulf Hansson wrote:
>> > On Wed, 12 Aug 2020 at 19:03, Sibi Sankar <sibis@codeaurora.org> wrote:
>> >>
>> >> Uffe,
>> >> Thanks for taking time to review the
>> >> series!
>> >>
>> >> On 2020-08-12 15:15, Ulf Hansson wrote:
>> >> > On Tue, 11 Aug 2020 at 21:03, Sibi Sankar <sibis@codeaurora.org> wrote:
>> >> >>
>> >> >> This is for power domains which needs to stay powered on for suspend
>> >> >> but can be powered on/off as part of runtime PM. This flag is aimed at
>> >> >> power domains coupled to remote processors which enter suspend states
>> >> >> independent to that of the application processor. Such power domains
>> >> >> are turned off only on remote processor crash/shutdown.
>> >> >
>> >> > As Kevin also requested, please elaborate more on the use case.
>> >> >
>> >> > Why exactly must the PM domain stay powered on during system suspend?
>> >> > Is there a wakeup configured that needs to be managed - or is there a
>> >> > co-processor/FW behaviour that needs to be obeyed to?
>> >>
>> >> Yes this is a co-processor behavior that
>> >> needs to be obeyed. Specifically application
>> >> processor notifies the Always on Subsystem
>> >> (AOSS) that a particular co-processor is up
>> >> using the power domains exposed by AOSS QMP
>> >> driver. AOSS uses this information to wait
>> >> for the co-processors to suspend before
>> >> starting its sleep sequence. The application
>> >> processor powers off these power domains only
>> >> if the co-processor has crashed or powered
>> >> off.
>> >
>> > Thanks for clarifying!
>> >
>> > Although, can you please elaborate a bit more on the actual use case?
>> > What are the typical co-processor and what drivers are involved in
>> > managing it?
>> 
>> The co-processors using the power domains
>> exposed by qcom_aoss driver are modem,
>> audio dsp, compute dsp managed using
>> qcom_q6v5_mss and qcom_q6v5_pas driver.
>> 
>> >
>> > As you may know, runtime PM becomes disabled during system suspend of
>> > a device. Which means, if the driver tries to power off the
>> > coprocessor (via calling pm_runtime_put() for example), somewhere in
>> > the system suspend phase of the corresponding device, its attached PM
>> > domain stays powered on when managed by genpd.
>> 
>> The drivers aren't really expected
>> do anything during suspend/resume
>> pretty much because the co-processors
>> enter low-power modes independent to
>> that of the application processor. On
>> co-processor crash the remoteproc core
>> does a pm_stay_awake followed by a
>> pm_relax after crash recovery.
> 
> Okay, thanks again for clarifying. You have convinced me about the
> need for a new flag to cope with these use cases.
> 
> Would you mind updating the commit message with some of the
> information you just provided?
> 
> Additionally, to make it clear that the flag should be used to keep
> the PM domain powered on during system suspend, but only if it's
> already powered on - please rename the flag to GENPD_FLAG_NO_SUSPEND,
> and update the corresponding description of it in the header file.

Thanks, naming it ^^ makes more sense :)

https://lore.kernel.org/lkml/340a7aafcf0301ff3158a4e211992041@codeaurora.org/

Also we wouldn't want to power on
runtime suspended power domains with
the NO_SUSPEND flag set, on resume as
explained ^^. Do you agree with that
as well?

> 
> [...]
> 
> Kind regards
> Uffe

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* [PATCH 5.7 000/393] 5.7.16-rc1 review
@ 2020-08-17 15:10  2% Greg Kroah-Hartman
  2020-08-17 15:11  9% ` [PATCH 5.7 047/393] soc: qcom: pdr: Reorder the PD state indication ack Greg Kroah-Hartman
  0 siblings, 1 reply; 200+ results
From: Greg Kroah-Hartman @ 2020-08-17 15:10 UTC (permalink / raw)
  To: linux-kernel
  Cc: Greg Kroah-Hartman, torvalds, akpm, linux, shuah, patches,
	ben.hutchings, lkft-triage, stable

This is the start of the stable review cycle for the 5.7.16 release.
There are 393 patches in this series, all will be posted as a response
to this one.  If anyone has any issues with these being applied, please
let me know.

Responses should be made by Wed, 19 Aug 2020 14:36:49 +0000.
Anything received after that time might be too late.

The whole patch series can be found in one patch at:
	https://www.kernel.org/pub/linux/kernel/v5.x/stable-review/patch-5.7.16-rc1.gz
or in the git tree and branch at:
	git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git linux-5.7.y
and the diffstat can be found below.

thanks,

greg k-h

-------------
Pseudo-Shortlog of commits:

Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    Linux 5.7.16-rc1

Jens Axboe <axboe@kernel.dk>
    io_uring: hold 'ctx' reference around task_work queue + execute

Jens Axboe <axboe@kernel.dk>
    io_uring: enable lookup of links holding inflight files

Jens Axboe <axboe@kernel.dk>
    io_uring: add missing REQ_F_COMP_LOCKED for nested requests

Jens Axboe <axboe@kernel.dk>
    task_work: only grab task signal lock when needed

Guoyu Huang <hgy5945@gmail.com>
    io_uring: Fix NULL pointer dereference in loop_rw_iter()

Jens Axboe <axboe@kernel.dk>
    io_uring: sanitize double poll handling

Gerald Schaefer <gerald.schaefer@linux.ibm.com>
    s390/gmap: improve THP splitting

Alexander Gordeev <agordeev@linux.ibm.com>
    s390/numa: set node distance to LOCAL_DISTANCE

Stefan Haberland <sth@linux.ibm.com>
    s390/dasd: fix inability to use DASD with DIAG driver

Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
    drm/xen-front: Fix misused IS_ERR_OR_NULL checks

Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
    xen/gntdev: Fix dmabuf import with non-zero sgt offset

Roger Pau Monne <roger.pau@citrix.com>
    xen/balloon: make the balloon wait interruptible

Roger Pau Monne <roger.pau@citrix.com>
    xen/balloon: fix accounting in alloc_xenballooned_pages error path

Kees Cook <keescook@chromium.org>
    firmware_loader: EFI firmware loader must handle pre-allocated buffer

Jon Derrick <jonathan.derrick@intel.com>
    irqdomain/treewide: Free firmware node after domain removal

Jonathan McDowell <noodles@earth.li>
    firmware: qcom_scm: Fix legacy convention SCM accessors

Nathan Huckleberry <nhuck@google.com>
    ARM: 8992/1: Fix unwind_frame for clang-built kernels

Marek Szyprowski <m.szyprowski@samsung.com>
    ARM: dts: exynos: Extend all Exynos5800 A15's OPPs with max voltage data

Sven Schnelle <svens@stackframe.org>
    parisc: mask out enable and reserved bits from sba imask

John David Anglin <dave.anglin@bell.net>
    parisc: Implement __smp_store_release and __smp_load_acquire barriers

John David Anglin <dave.anglin@bell.net>
    parisc: Do not use an ordered store in pa_tlb_lock()

Helge Deller <deller@gmx.de>
    Revert "parisc: Revert "Release spinlocks using ordered store""

Helge Deller <deller@gmx.de>
    Revert "parisc: Use ldcw instruction for SMP spinlock release barrier"

Helge Deller <deller@gmx.de>
    Revert "parisc: Drop LDCW barrier in CAS code when running UP"

Helge Deller <deller@gmx.de>
    Revert "parisc: Improve interrupt handling in arch_spin_lock_flags()"

Gao Xiang <hsiangkao@redhat.com>
    erofs: fix extended inode could cross boundary

Alexander Sverdlin <alexander.sverdlin@nokia.com>
    mtd: spi-nor: intel-spi: Simulate WRDI command

Sivaprakash Murugesan <sivaprak@codeaurora.org>
    mtd: rawnand: qcom: avoid write to unavailable register

Christian Eggers <ceggers@arri.de>
    spi: spidev: Align buffers for DMA

Chanwoo Choi <cw00.choi@samsung.com>
    PM / devfreq: Fix indentaion of devfreq_summary debugfs node

Marc Zyngier <maz@kernel.org>
    PM / devfreq: rk3399_dmc: Fix kernel oops when rockchip,pmu is absent

Romain Naour <romain.naour@gmail.com>
    include/asm-generic/vmlinux.lds.h: align ro_after_init

Ivan Kokshaysky <ink@jurassic.park.msu.ru>
    cpufreq: dt: fix oops on armada37xx

Viresh Kumar <viresh.kumar@linaro.org>
    cpufreq: Fix locking issues with governors

Trond Myklebust <trond.myklebust@hammerspace.com>
    NFS: Don't return layout segments that are in use

Trond Myklebust <trond.myklebust@hammerspace.com>
    NFS: Don't move layouts to plh_return_segs list while in use

Jens Axboe <axboe@kernel.dk>
    io_uring: fail poll arm on queue proc failure

Jens Axboe <axboe@kernel.dk>
    io_uring: use TWA_SIGNAL for task_work uncondtionally

Jens Axboe <axboe@kernel.dk>
    io_uring: set ctx sq/cq entry count earlier

Dave Airlie <airlied@redhat.com>
    drm/ttm/nouveau: don't call tt destroy callback on alloc failure.

Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    media: media-request: Fix crash if memory allocation fails

Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
    driver core: Fix probe_count imbalance in really_probe()

Zheng Bin <zhengbin13@huawei.com>
    9p: Fix memory leak in v9fs_mount

Maxim Levitsky <mlevitsk@redhat.com>
    kvm: x86: replace kvm_spec_ctrl_test_value with runtime test on the host

Eric Biggers <ebiggers@google.com>
    fs/minix: reject too-large maximum file size

Eric Biggers <ebiggers@google.com>
    fs/minix: don't allow getting deleted inodes

Eric Biggers <ebiggers@google.com>
    fs/minix: check return value of sb_getblk()

Jakub Kicinski <kuba@kernel.org>
    bitfield.h: don't compile-time validate _val in FIELD_FIT

Frederic Weisbecker <frederic@kernel.org>
    tick/nohz: Narrow down noise while setting current task's tick dependency

Mikulas Patocka <mpatocka@redhat.com>
    crypto: cpt - don't sleep of CRYPTO_TFM_REQ_MAY_SLEEP was not specified

John Allen <john.allen@amd.com>
    crypto: ccp - Fix use of merged scatterlists

Tom Rix <trix@redhat.com>
    crypto: qat - fix double free in qat_uclo_create_batch_init_list

Mikulas Patocka <mpatocka@redhat.com>
    crypto: hisilicon - don't sleep of CRYPTO_TFM_REQ_MAY_SLEEP was not specified

Matteo Croce <mcroce@linux.microsoft.com>
    pstore: Fix linking when crypto API disabled

Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
    tpm: Unify the mismatching TPM space buffer sizes

Hector Martin <marcan@marcan.st>
    ALSA: usb-audio: add quirk for Pioneer DDJ-RB

Hector Martin <marcan@marcan.st>
    ALSA: usb-audio: work around streaming quirk for MacroSilicon MS2109

Hector Martin <marcan@marcan.st>
    ALSA: usb-audio: fix overeager device match for MacroSilicon MS2109

Mirko Dietrich <buzz@l4m1.de>
    ALSA: usb-audio: Creative USB X-Fi Pro SB1095 volume knob support

Hui Wang <hui.wang@canonical.com>
    ALSA: hda - fix the micmute led status for Lenovo ThinkCentre AIO

Max Gurtovoy <maxg@mellanox.com>
    vdpasim: protect concurrent access to iommu iotlb

Peter Chen <peter.chen@nxp.com>
    usb: cdns3: gadget: always zeroed TRB buffer when enable endpoint

Brant Merryman <brant.merryman@silabs.com>
    USB: serial: cp210x: enable usb generic throttle/unthrottle

Brant Merryman <brant.merryman@silabs.com>
    USB: serial: cp210x: re-enable auto-RTS on open

Marek Behún <marek.behun@nic.cz>
    net: phy: marvell10g: fix null pointer dereference

Stefano Garzarella <sgarzare@redhat.com>
    vsock: fix potential null pointer dereference in vsock_poll()

Tim Froidcoeur <tim.froidcoeur@tessares.net>
    net: initialize fastreuse on inet_inherit_port

Tim Froidcoeur <tim.froidcoeur@tessares.net>
    net: refactor bind_bucket fastreuse into helper

Ronak Doshi <doshir@vmware.com>
    vmxnet3: use correct tcp hdr length when packet is encapsulated

Jason Baron <jbaron@akamai.com>
    tcp: correct read of TFO keys on big endian systems

Ira Weiny <ira.weiny@intel.com>
    net/tls: Fix kmap usage

Miaohe Lin <linmiaohe@huawei.com>
    net: Set fput_needed iff FDPUT_FPUT is set

Johan Hovold <johan@kernel.org>
    net: phy: fix memory leak in device-create error path

Qingyu Li <ieatmuttonchuan@gmail.com>
    net/nfc/rawsock.c: add CAP_NET_RAW check.

Miaohe Lin <linmiaohe@huawei.com>
    net: Fix potential memory leak in proto_register()

Xie He <xie.he.0141@gmail.com>
    drivers/net/wan/lapbether: Added needed_headroom and a skb->len check

John Ogness <john.ogness@linutronix.de>
    af_packet: TPACKET_V3: fix fill status rwlock imbalance

Jian Cai <caij2003@gmail.com>
    crypto: aesni - add compatibility with IAS

Eric Dumazet <edumazet@google.com>
    x86/fsgsbase/64: Fix NULL deref in 86_fsgsbase_read_task

Chuck Lever <chuck.lever@oracle.com>
    SUNRPC: Fix ("SUNRPC: Add "@len" parameter to gss_unwrap()")

Scott Mayhew <smayhew@redhat.com>
    nfsd: avoid a NULL dereference in __cld_pipe_upcall()

Chuck Lever <chuck.lever@oracle.com>
    svcrdma: Fix page leak in svc_rdma_recv_read_chunk()

Kamal Dasu <kdasu.kdev@gmail.com>
    mtd: rawnand: brcmnand: Don't default to edu transfer

Drew Fustini <drew@beagleboard.org>
    pinctrl-single: fix pcs_parse_pinconf() return value

Pavel Machek <pavel@ucw.cz>
    ocfs2: fix unbalanced locking

Wang Hai <wanghai38@huawei.com>
    dlm: Fix kobject memleak

Dan Carpenter <dan.carpenter@oracle.com>
    media: mtk-mdp: Fix a refcounting bug on error in init

Dean Nelson <dnelson@redhat.com>
    net: thunderx: initialize VF's mailbox mutex before first usage

Ahmad Fatoum <a.fatoum@pengutronix.de>
    gpio: don't use same lockdep class for all devm_gpiochip_add_data users

Florinel Iordache <florinel.iordache@nxp.com>
    fsl/fman: fix eth hash table allocation

Florinel Iordache <florinel.iordache@nxp.com>
    fsl/fman: check dereferencing null pointer

Florinel Iordache <florinel.iordache@nxp.com>
    fsl/fman: fix unreachable code

Florinel Iordache <florinel.iordache@nxp.com>
    fsl/fman: fix dereference null return value

Florinel Iordache <florinel.iordache@nxp.com>
    fsl/fman: use 32-bit unsigned integer

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    net: spider_net: Fix the size used in a 'dma_free_coherent()' call

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    net: sgi: ioc3-eth: Fix the size used in some 'dma_free_coherent()' calls

Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
    liquidio: Fix wrong return value in cn23xx_get_pf_num()

Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
    net: ethernet: aquantia: Fix wrong return value

Josef Bacik <josef@toxicpanda.com>
    ftrace: Fix ftrace_trace_task return value

Leon Romanovsky <leon@kernel.org>
    net/mlx5: Delete extra dump stack that gives nothing

Alex Vesker <valex@mellanox.com>
    net/mlx5: DR, Change push vlan action sequence

Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
    tools, bpftool: Fix wrong return value in do_dump()

Andrii Nakryiko <andriin@fb.com>
    tools, build: Propagate build failures from tools/build/Makefile.build

Wang Hai <wanghai38@huawei.com>
    wl1251: fix always return 0 error

Wang Hai <wanghai38@huawei.com>
    qtnfmac: Missing platform_device_unregister() on error in qtnf_core_mac_alloc()

Yan-Hsuan Chuang <yhchuang@realtek.com>
    rtw88: coex: only skip coex triggered by BT info

Tsang-Shian Lin <thlin@realtek.com>
    rtw88: fix short GI capability based on current bandwidth

Tsang-Shian Lin <thlin@realtek.com>
    rtw88: fix LDPC field for RA info

Florian Westphal <fw@strlen.de>
    netfilter: nft_meta: fix iifgroup matching

Surabhi Boob <surabhi.boob@intel.com>
    ice: Graceful error handling in HW table calloc failure

Vignesh Sridhar <vignesh.sridhar@intel.com>
    ice: Clear and free XLT entries on reset

Julian Wiedmann <jwi@linux.ibm.com>
    s390/qeth: don't process empty bridge port events

Julian Wiedmann <jwi@linux.ibm.com>
    s390/qeth: tolerate pre-filled RX buffer

Shengjiu Wang <shengjiu.wang@nxp.com>
    ASoC: fsl_sai: Fix value of FSL_SAI_CR1_RFW_MASK

Jerry Crunchtime <jerry.c.t@web.de>
    libbpf: Fix register in PT_REGS MIPS macros

Charles Keepax <ckeepax@opensource.cirrus.com>
    ASoC: soc-core: Fix regression causing sysfs entries to disappear

Jerome Brunet <jbrunet@baylibre.com>
    ASoC: meson: axg-tdm-formatters: fix sclk inversion

Jerome Brunet <jbrunet@baylibre.com>
    ASoC: meson: axg-tdmin: fix g12a skew

Jerome Brunet <jbrunet@baylibre.com>
    ASoC: meson: axg-tdm-interface: fix link fmt setup

Sandipan Das <sandipan@linux.ibm.com>
    selftests/powerpc: Fix online CPU selection

Nathan Lynch <nathanl@linux.ibm.com>
    powerpc/pseries/hotplug-cpu: Remove double free in error path

Sven Auhagen <sven.auhagen@voleatech.de>
    cpufreq: ap806: fix cpufreq driver needs ap cpu clk

Hanjun Guo <guohanjun@huawei.com>
    PCI: Release IVRS table in AMD ACS quirk

Mark Zhang <markz@mellanox.com>
    RDMA/netlink: Remove CAP_NET_RAW check when dump a raw QP

Tiezhu Yang <yangtiezhu@loongson.cn>
    nvmem: sprd: Fix return value of sprd_efuse_probe()

Harish <harish@linux.ibm.com>
    selftests/powerpc: Fix CPU affinity for child process

Michael Ellerman <mpe@ellerman.id.au>
    powerpc/boot: Fix CONFIG_PPC_MPC52XX references

Michael Ellerman <mpe@ellerman.id.au>
    powerpc/32s: Fix CONFIG_BOOK3S_601 uses

Oliver O'Halloran <oohall@gmail.com>
    selftests/powerpc: Squash spurious errors due to device removal

Darrick J. Wong <darrick.wong@oracle.com>
    xfs: clear XFS_DQ_FREEING if we can't lock the dquot buffer to flush

Brian Foster <bfoster@redhat.com>
    xfs: fix inode allocation block res calculation precedence

Linus Walleij <linus.walleij@linaro.org>
    net: dsa: rtl8366: Fix VLAN set-up

Linus Walleij <linus.walleij@linaro.org>
    net: dsa: rtl8366: Fix VLAN semantics

Venkata Lakshmi Narayana Gubba <gubbaven@codeaurora.org>
    Bluetooth: hci_qca: Stop collecting memdump again for command timeout during SSR

Abhishek Pandit-Subedi <abhishekpandit@chromium.org>
    Bluetooth: Fix suspend notifier race

Nicolas Boichat <drinkcat@chromium.org>
    Bluetooth: hci_serdev: Only unregister device if it was registered

Nicolas Boichat <drinkcat@chromium.org>
    Bluetooth: hci_h5: Set HCI_UART_RESET_ON_INIT to correct flags

Ismael Ferreras Morezuelas <swyterzone@gmail.com>
    Bluetooth: btusb: Fix and detect most of the Chinese Bluetooth controllers

Tom Rix <trix@redhat.com>
    power: supply: check if calc_soc succeeded in pm860x_init_battery

Dan Carpenter <dan.carpenter@oracle.com>
    Smack: prevent underflow in smk_set_cipso()

Dan Carpenter <dan.carpenter@oracle.com>
    Smack: fix another vsscanf out of bounds

Li Heng <liheng40@huawei.com>
    RDMA/core: Fix return error value in _ib_modify_qp() to negative

Kishon Vijay Abraham I <kishon@ti.com>
    PCI: cadence: Fix updating Vendor ID and Subsystem Vendor ID register

Kishon Vijay Abraham I <kishon@ti.com>
    PCI: cadence: Fix cdns_pcie_{host|ep}_setup() error path

Finn Thain <fthain@telegraphics.com.au>
    macintosh/via-macii: Access autopoll_devs when inside lock

Chris Packham <chris.packham@alliedtelesis.co.nz>
    net: dsa: mv88e6xxx: MV88E6097 does not support jumbo configuration

Finn Thain <fthain@telegraphics.com.au>
    scsi: mesh: Fix panic after host or bus reset

Tomas Henzl <thenzl@redhat.com>
    scsi: megaraid_sas: Clear affinity hint

Ruslan Bilovol <ruslan.bilovol@gmail.com>
    usb: gadget: f_uac2: fix AC Interface Header Descriptor wTotalLength

Marek Szyprowski <m.szyprowski@samsung.com>
    usb: dwc2: Fix error path in gadget registration

Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
    thermal: int340x: processor_thermal: fix: update Jasper Lake PCI id

Yu Kuai <yukuai3@huawei.com>
    MIPS: OCTEON: add missing put_device() call in dwc3_octeon_device_init()

Kai Vehmanen <kai.vehmanen@linux.intel.com>
    ASoC: hdac_hda: fix deadlock after PCM open error

Dan Murphy <dmurphy@ti.com>
    ASoC: tas2770: Fix reset gpio property name

YueHaibing <yuehaibing@huawei.com>
    tools/bpftool: Fix error handing in do_skeleton()

Ilya Leoshkevich <iii@linux.ibm.com>
    s390/bpf: Tolerate not converging code shrinking

Ilya Leoshkevich <iii@linux.ibm.com>
    s390/bpf: Use brcl for jumping to exit_ip if necessary

Ilya Leoshkevich <iii@linux.ibm.com>
    s390/bpf: Fix sign extension in branch_ku

Russell King <rmk+kernel@armlinux.org.uk>
    phy: armada-38x: fix NETA lockup when repeatedly switching speeds

Lorenzo Bianconi <lorenzo@kernel.org>
    mt76: mt7615: fix possible memory leak in mt7615_mcu_wtbl_sta_add

Sean Wang <sean.wang@mediatek.com>
    mt76: mt7615: fix potential memory leak in mcu message handler

Madhavan Srinivasan <maddy@linux.ibm.com>
    powerpc/perf: Fix missing is_sier_aviable() during build

Suzuki K Poulose <suzuki.poulose@arm.com>
    coresight: etm4x: Fix save/restore during cpu idle

Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
    coresight: tmc: Fix TMC mode read in tmc_read_unprepare_etb()

Mike Leach <mike.leach@linaro.org>
    coresight: etmv4: Counter values not saved on disable

Mike Leach <mike.leach@linaro.org>
    coresight: etmv4: Fix resource selector constant

Dan Carpenter <dan.carpenter@oracle.com>
    thermal: ti-soc-thermal: Fix reversed condition in ti_thermal_expose_sensor()

Kars Mulder <kerneldev@karsmulder.nl>
    usb: core: fix quirks_param_set() writing to a const pointer

Taniya Das <tdas@codeaurora.org>
    clk: qcom: gcc: Make disp gpll0 branch aon for sc7180/sdm845

Johan Hovold <johan@kernel.org>
    USB: serial: iuu_phoenix: fix led-activity helpers

Hauke Mehrtens <hauke@hauke-m.de>
    spi: lantiq-ssc: Fix warning by using WQ_MEM_RECLAIM

Steve Longerbeam <slongerbeam@gmail.com>
    gpu: ipu-v3: Restore RGB32, BGR32

Marco Felsch <m.felsch@pengutronix.de>
    drm/imx: tve: fix regulator_disable error path

Philipp Zabel <p.zabel@pengutronix.de>
    drm/imx: fix use after free

Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
    powerpc/book3s64/pkeys: Use PVR check instead of cpu feature

Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
    phy: renesas: rcar-gen3-usb2: move irq registration to init

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    media: s5p-g2d: Fix a memory leak in an error handling path in 'g2d_probe()'

Oliver Neukum <oneukum@suse.com>
    go7007: add sanity checking for endpoints

Xiongfeng Wang <wangxiongfeng2@huawei.com>
    PCI/ASPM: Add missing newline in sysfs 'policy'

Jing Xiangfeng <jingxiangfeng@huawei.com>
    ASoC: meson: fixes the missed kfree() for axg_card_add_tdm_loopback

Colin Ian King <colin.king@canonical.com>
    staging: rtl8192u: fix a dubious looking mask before a shift

Tyler Hicks <tyhicks@linux.microsoft.com>
    ima: Fail rule parsing when the KEY_CHECK hook is combined with an invalid cond

Tyler Hicks <tyhicks@linux.microsoft.com>
    ima: Fail rule parsing when the KEXEC_CMDLINE hook is combined with an invalid cond

Tyler Hicks <tyhicks@linux.microsoft.com>
    ima: Fail rule parsing when buffer hook functions have an invalid action

Tyler Hicks <tyhicks@linux.microsoft.com>
    ima: Free the entire rule if it fails to parse

Tyler Hicks <tyhicks@linux.microsoft.com>
    ima: Free the entire rule when deleting a list of rules

Tyler Hicks <tyhicks@linux.microsoft.com>
    ima: Have the LSM free its audit rule

Mikhail Malygin <m.malygin@yadro.com>
    RDMA/rxe: Prevent access to wr->next ptr afrer wr is posted to send queue

Yuval Basson <ybason@marvell.com>
    RDMA/qedr: SRQ's bug fixes

Milton Miller <miltonm@us.ibm.com>
    powerpc/vdso: Fix vdso cpu truncation

Nathan Lynch <nathanl@linux.ibm.com>
    powerpc/rtas: don't online CPUs for partition suspend

Nathan Lynch <nathanl@linux.ibm.com>
    powerpc/pseries: remove cede offline state for CPUs

Amir Goldstein <amir73il@gmail.com>
    kernfs: do not call fsnotify() with name without a parent

Dan Carpenter <dan.carpenter@oracle.com>
    mwifiex: Prevent memory corruption handling keys

John Garry <john.garry@huawei.com>
    scsi: scsi_debug: Add check for sdebug_max_queue during module init

Tom Rix <trix@redhat.com>
    drm/bridge: sil_sii8620: initialize return of sii8620_readb

Chuhong Yuan <hslester96@gmail.com>
    mmc: sdhci-of-arasan: Add missed checks for devm_clk_register()

Marek Szyprowski <m.szyprowski@samsung.com>
    phy: exynos5-usbdrd: Calibrating makes sense only for USB2.0 PHY

Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
    drm: panel: simple: Fix bpc for LG LB070WV8 panel

Kai-Heng Feng <kai.heng.feng@canonical.com>
    leds: core: Flush scheduled work for system suspend

Heikki Krogerus <heikki.krogerus@linux.intel.com>
    kobject: Avoid premature parent object freeing in kobject_cleanup()

Marek Vasut <marex@denx.de>
    drm/stm: repair runtime power management

Daniel T. Lee <danieltimlee@gmail.com>
    samples: bpf: Fix bpf programs with kprobe/sys_connect event

Bjorn Helgaas <bhelgaas@google.com>
    PCI: Fix pci_cfg_wait queue locking problem

Zhu Yanjun <yanjunz@mellanox.com>
    RDMA/rxe: Skip dgid check in loopback mode

Andreas Gruenbacher <agruenba@redhat.com>
    iomap: Make sure iomap_end is called after iomap_begin

Darrick J. Wong <darrick.wong@oracle.com>
    xfs: fix reflink quota reservation accounting error

Darrick J. Wong <darrick.wong@oracle.com>
    xfs: don't eat an EIO/ENOSPC writeback error when scrubbing data fork

Dariusz Marcinkiewicz <darekm@google.com>
    media: cros-ec-cec: do not bail on device_init_wakeup failure

Chuhong Yuan <hslester96@gmail.com>
    media: exynos4-is: Add missed check for pinctrl_lookup_state()

Chuhong Yuan <hslester96@gmail.com>
    media: tvp5150: Add missed media_entity_cleanup()

Helen Koike <helen.koike@collabora.com>
    media: staging: rkisp1: rsz: fix resolution limitation on sink pad

Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
    media: staging: rkisp1: rsz: supported formats are the isp's src formats, not sink formats

Dan Carpenter <dan.carpenter@oracle.com>
    media: allegro: Fix some NULL vs IS_ERR() checks in probe

Dan Carpenter <dan.carpenter@oracle.com>
    media: firewire: Using uninitialized values in node_probe()

Julian Anastasov <ja@ssi.bg>
    ipvs: allow connection reuse for unconfirmed conntrack

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    scsi: eesox: Fix different dev_id between request_irq() and free_irq()

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    scsi: powertec: Fix different dev_id between request_irq() and free_irq()

Jason Gunthorpe <jgg@nvidia.com>
    RDMA/core: Fix bogus WARN_ON during ib_unregister_device_queued()

Tony Nguyen <anthony.l.nguyen@intel.com>
    iavf: Fix updating statistics

Wei Yongjun <weiyongjun1@huawei.com>
    iavf: fix error return code in iavf_init_get_resources()

Phil Elwell <phil@raspberrypi.com>
    staging: vchiq_arm: Add a matching unregister call

Colin Ian King <colin.king@canonical.com>
    drm/radeon: fix array out-of-bounds read and write issues

Colin Ian King <colin.king@canonical.com>
    drm/amdgpu: ensure 0 is returned for success in jpeg_v2_5_wait_for_idle

Steven Rostedt (VMware) <rostedt@goodmis.org>
    tracing: Move pipe reference to trace array instead of current_tracer

Grygorii Strashko <grygorii.strashko@ti.com>
    net: ethernet: ti: am65-cpsw-nuss: restore vlan configuration while down/up

Kees Cook <keescook@chromium.org>
    lkdtm: Make arch-specific tests always available

Kees Cook <keescook@chromium.org>
    selftests/lkdtm: Reset WARN_ONCE to avoid false negatives

Kees Cook <keescook@chromium.org>
    lkdtm: Avoid more compiler optimizations for bad writes

Wang Hai <wanghai38@huawei.com>
    cxl: Fix kobject memleak

Emil Velikov <emil.velikov@collabora.com>
    drm/mipi: use dcs write for mipi_dsi_dcs_set_tear_scanline

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    scsi: cumana_2: Fix different dev_id between request_irq() and free_irq()

Mark Starovoytov <mstarovoitov@marvell.com>
    net: atlantic: MACSec offload statistics checkpatch fix

Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
    ASoC: Intel: bxt_rt298: add missing .owner field

Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
    ASoC: Intel: sof_sdw: add missing .owner field

Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
    ASoC: Intel: cml_rt1011_rt5682: add missing .owner field

Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
    ASoC: SOF: nocodec: add missing .owner field

Ioana Ciornei <ioana.ciornei@nxp.com>
    dpaa2-eth: fix condition for number of buffer acquire retries

Colin Ian King <colin.king@canonical.com>
    staging: most: avoid null pointer dereference when iface is null

Chuhong Yuan <hslester96@gmail.com>
    media: omap3isp: Add missed v4l2_ctrl_handler_free() for preview_init_entities()

Chuhong Yuan <hslester96@gmail.com>
    media: marvell-ccic: Add missed v4l2_async_notifier_cleanup()

Arnd Bergmann <arnd@arndb.de>
    media: cxusb-analog: fix V4L2 dependency

Sean Wang <sean.wang@mediatek.com>
    Bluetooth: btmtksdio: fix up firmware download sequence

Sean Wang <sean.wang@mediatek.com>
    Bluetooth: btusb: fix up firmware download sequence

Arnd Bergmann <arnd@arndb.de>
    leds: lm355x: avoid enum conversion warning

Christophe Leroy <christophe.leroy@csgroup.eu>
    powerpc/fixmap: Fix FIX_EARLY_DEBUG_BASE when page size is 256k

Joe Perches <joe@perches.com>
    powerpc/mm: Fix typo in IS_ENABLED()

Álvaro Fernández Rojas <noltari@gmail.com>
    clk: bcm63xx-gate: fix last clock availability

Colin Ian King <colin.king@canonical.com>
    drm/arm: fix unintentional integer overflow on left shift

Steven Price <steven.price@arm.com>
    drm/panfrost: Fix inbalance of devfreq record_busy/idle()

Lubomir Rintel <lkundrak@v3.sk>
    drm/etnaviv: Fix error path on failure to enable bus clk

Stanley Chu <stanley.chu@mediatek.com>
    scsi: ufs: Fix imprecise load calculation in devfreq window

Chuhong Yuan <hslester96@gmail.com>
    iio: amplifiers: ad8366: Change devm_gpiod_get() to optional and add the missed check

Tomasz Duszynski <tomasz.duszynski@octakon.com>
    iio: improve IIO_CONCENTRATION channel type description

Balakrishna Godavarthi <bgodavar@codeaurora.org>
    Bluetooth: hci_qca: Increase SoC idle timeout to 200ms

Venkata Lakshmi Narayana Gubba <gubbaven@codeaurora.org>
    Bluetooth: hci_qca: Bug fix during SSR timeout

Evan Green <evgreen@chromium.org>
    ath10k: Acquire tx_lock in tx error paths

Abhishek Pandit-Subedi <abhishekpandit@chromium.org>
    Bluetooth: Allow suspend even when preparation has failed

Matthias Kaehlcke <mka@chromium.org>
    Bluetooth: hci_qca: Only remove TX clock vote after TX is completed

Dan Carpenter <dan.carpenter@oracle.com>
    Bluetooth: hci_qca: Fix an error pointer dereference

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    video: pxafb: Fix the function used to balance a 'dma_alloc_coherent()' call

Dejin Zheng <zhengdejin5@gmail.com>
    console: newport_con: fix an issue about leak related system resources

Dejin Zheng <zhengdejin5@gmail.com>
    video: fbdev: sm712fb: fix an issue about iounmap for a wrong address

Pali Rohár <pali@kernel.org>
    btmrvl: Fix firmware filename for sd8997 chipset

Pali Rohár <pali@kernel.org>
    btmrvl: Fix firmware filename for sd8977 chipset

Pali Rohár <pali@kernel.org>
    mwifiex: Fix firmware filename for sd8997 chipset

Pali Rohár <pali@kernel.org>
    mwifiex: Fix firmware filename for sd8977 chipset

Qiushi Wu <wu000273@umn.edu>
    agp/intel: Fix a memory leak on module initialisation failure

Emil Velikov <emil.velikov@collabora.com>
    drm/amdgpu: use the unlocked drm_gem_object_put

Douglas Anderson <dianders@chromium.org>
    drm/bridge: ti-sn65dsi86: Fix off-by-one error in clock choice

Douglas Anderson <dianders@chromium.org>
    drm/bridge: ti-sn65dsi86: Clear old error bits before AUX transfers

Dan Carpenter <dan.carpenter@oracle.com>
    drm/gem: Fix a leak in drm_gem_objects_lookup()

Rob Clark <robdclark@chromium.org>
    drm/msm: ratelimit crtc event overflow error

Horia Geantă <horia.geanta@nxp.com>
    crypto: caam - silence .setkey in case of bad key length

Pavel Begunkov <asml.silence@gmail.com>
    io_uring: fix stalled deferred requests

Pavel Begunkov <asml.silence@gmail.com>
    io_uring: fix racy overflow count reporting

Erik Kaneda <erik.kaneda@intel.com>
    ACPICA: Do not increment operation_region reference counts for field units

Qu Wenruo <wqu@suse.com>
    btrfs: qgroup: free per-trans reserved space when a subvolume gets dropped

Qu Wenruo <wqu@suse.com>
    btrfs: allow btrfs_truncate_block() to fallback to nocow for data space reservation

Coly Li <colyli@suse.de>
    bcache: fix super block seq numbers comparision in register_cache_set()

Jim Cromie <jim.cromie@gmail.com>
    dyndbg: fix a BUG_ON in ddebug_describe_flags

Danesh Petigara <danesh.petigara@broadcom.com>
    usb: bdc: Halt controller on suspend

Sasi Kumar <sasi.kumar@broadcom.com>
    bdc: Fix bug causing crash after multiple disconnects

Evgeny Novikov <novikov@ispras.ru>
    usb: gadget: net2280: fix memory leak on probe error handling paths

shirley her <shirley.her@bayhubtech.com>
    mmc: sdhci-pci-o2micro: Bug fix for O2 host controller Seabird1

Nick Desaulniers <ndesaulniers@google.com>
    x86/uaccess: Make __get_user_size() Clang compliant on 32-bit

Shannon Nelson <snelson@pensando.io>
    ionic: update eid test for overflow

Evan Quan <evan.quan@amd.com>
    drm/amd/powerplay: suppress compile error around BUG_ON

Dmitry Osipenko <digetx@gmail.com>
    gpu: host1x: debug: Fix multiple channels emitting messages simultaneously

Bolarinwa Olayemi Saheed <refactormyself@gmail.com>
    iwlegacy: Check the return value of pcie_capability_read_*()

Armas Spann <zappel@retarded.farm>
    platform/x86: asus-nb-wmi: add support for ASUS ROG Zephyrus G14 and G15

Wright Feng <wright.feng@cypress.com>
    brcmfmac: set state of hanger slot to FREE when flushing PSQ

Prasanna Kerekoppa <prasanna.kerekoppa@cypress.com>
    brcmfmac: To fix Bss Info flag definition Bug

Wright Feng <wright.feng@cypress.com>
    brcmfmac: keep SDIO watchdog running when console_interval is non-zero

Venkata Lakshmi Narayana Gubba <gubbaven@codeaurora.org>
    Bluetooth: hci_qca: Bug fixes for SSR

Wenbo Zhang <ethercflow@gmail.com>
    bpf: Fix fds_example SIGSEGV error

Evan Quan <evan.quan@amd.com>
    drm/amd/powerplay: fix compile error with ARCH=arc

Alex Deucher <alexander.deucher@amd.com>
    drm/amdgpu/display: properly guard the calls to swSMU functions

Alex Deucher <alexander.deucher@amd.com>
    drm/amdgpu/display bail early in dm_pp_get_static_clocks

Aric Cyr <aric.cyr@amd.com>
    drm/amd/display: Improve DisplayPort monitor interop

Paul E. McKenney <paulmck@kernel.org>
    mm/mmap.c: Add cond_resched() for exit_mmap() CPU stalls

Bartosz Golaszewski <bgolaszewski@baylibre.com>
    irqchip/irq-mtk-sysirq: Replace spinlock with raw_spinlock

Antoine Tenart <antoine.tenart@bootlin.com>
    net: phy: mscc: restore the base page in vsc8514/8584_config_init

Christian König <christian.koenig@amd.com>
    drm/radeon: disable AGP by default

Michael Tretter <m.tretter@pengutronix.de>
    drm/debugfs: fix plain echo to connector "force" attribute

Akhil P Oommen <akhilpo@codeaurora.org>
    drm/msm: Fix a null pointer access in msm_gem_shrinker_count()

Akhil P Oommen <akhilpo@codeaurora.org>
    drm: msm: a6xx: fix gpu failure after system resume

Chunfeng Yun <chunfeng.yun@mediatek.com>
    usb: mtu3: clear dual mode of u3port when disable device

Josef Bacik <josef@toxicpanda.com>
    btrfs: fix lockdep splat from btrfs_dump_space_info

Masahiro Yamada <yamada.masahiro@socionext.com>
    mmc: sdhci-cadence: do not use hardware tuning for SD mode

Aditya Pakki <pakki001@umn.edu>
    drm/nouveau: fix multiple instances of reference count leaks

Aditya Pakki <pakki001@umn.edu>
    drm/nouveau: fix reference count leak in nouveau_debugfs_strap_peek

Krzysztof Kozlowski <krzk@kernel.org>
    memory: samsung: exynos5422-dmc: Do not ignore return code of regmap_read()

Navid Emamdoost <navid.emamdoost@gmail.com>
    drm/etnaviv: fix ref count leak via pm_runtime_get_sync

Ricardo Cañuelo <ricardo.canuelo@collabora.com>
    arm64: dts: hisilicon: hikey: fixes to comply with adi, adv7533 DT binding

Lyude Paul <lyude@redhat.com>
    drm/nouveau/kms/nv50-: Fix disabling dithering

Zhao Heming <heming.zhao@suse.com>
    md-cluster: fix wild pointer of unlock_all_bitmaps()

Tony Lindgren <tony@atomide.com>
    bus: ti-sysc: Add missing quirk flags for usb_host_hs

Evgeny Novikov <novikov@ispras.ru>
    video: fbdev: neofb: fix memory leak in neo_scan_monitor()

Evgeny Novikov <novikov@ispras.ru>
    video: fbdev: savage: fix memory leak on error handling path in probe

Sedat Dilek <sedat.dilek@gmail.com>
    crypto: aesni - Fix build with LLVM_IAS=1

Aditya Pakki <pakki001@umn.edu>
    drm/radeon: Fix reference count leaks caused by pm_runtime_get_sync

Jack Xiao <Jack.Xiao@amd.com>
    drm/amdgpu: avoid dereferencing a NULL pointer

Paul E. McKenney <paulmck@kernel.org>
    fs/btrfs: Add cond_resched() for try_release_extent_mapping() stalls

Pavel Begunkov <asml.silence@gmail.com>
    io_uring: fix req->work corruption

Luis Chamberlain <mcgrof@kernel.org>
    loop: be paranoid on exit and prevent new additions / removals

Lihong Kou <koulihong@huawei.com>
    Bluetooth: add a mutex lock to avoid UAF in do_enale_set

Guillaume Tucker <guillaume.tucker@collabora.com>
    ARM: exynos: clear L310_AUX_CTRL_FULL_LINE_ZERO in default l2c_aux_val

Vladimir Oltean <vladimir.oltean@nxp.com>
    net: mscc: ocelot: fix encoding destination ports into multicast IPv4 address

Maulik Shah <mkshah@codeaurora.org>
    soc: qcom: rpmh-rsc: Set suppress_bind_attrs flag

Tomi Valkeinen <tomi.valkeinen@ti.com>
    drm/tilcdc: fix leak & null ref in panel_connector_get_modes

Johannes Thumshirn <johannes.thumshirn@wdc.com>
    block: don't do revalidate zones on invalid devices

Hannes Reinecke <hare@suse.de>
    nvme-multipath: do not fall back to __nvme_find_path() for non-optimized paths

Martin Wilck <mwilck@suse.com>
    nvme-multipath: fix logic for non-optimized paths

Sagi Grimberg <sagi@grimberg.me>
    nvme-rdma: fix controller reset hang during traffic

Sagi Grimberg <sagi@grimberg.me>
    nvme-tcp: fix controller reset hang during traffic

Zenghui Yu <yuzenghui@huawei.com>
    irqchip/gic-v4.1: Use GFP_ATOMIC flag in allocate_vpe_l1_table()

Florian Fainelli <f.fainelli@gmail.com>
    irqchip/irq-bcm7038-l1: Guard uses of cpu_logical_map

Tiezhu Yang <yangtiezhu@loongson.cn>
    irqchip/loongson-liointc: Fix potential dead lock

Colin Ian King <colin.king@canonical.com>
    md: raid0/linear: fix dereference before null check on pointer mddev

Kees Cook <keescook@chromium.org>
    seccomp: Fix ioctl number for SECCOMP_IOCTL_NOTIF_ID_VALID

Tiezhu Yang <yangtiezhu@loongson.cn>
    irqchip/ti-sci-inta: Fix return value about devm_ioremap_resource()

Stephen Smalley <stephen.smalley.work@gmail.com>
    scripts/selinux/mdp: fix initial SID handling

Chengming Zhou <zhouchengming@bytedance.com>
    iocost: Fix check condition of iocg abs_vdebt

Yu Kuai <yukuai3@huawei.com>
    ARM: socfpga: PM: add missing put_device() call in socfpga_setup_ocram_self_refresh()

Jon Lin <jon.lin@rock-chips.com>
    spi: rockchip: Fix error in SPI slave pio read

Sibi Sankar <sibis@codeaurora.org>
    soc: qcom: pdr: Reorder the PD state indication ack

Christian Hewitt <christianshewitt@gmail.com>
    arm64: dts: meson: fix mmc0 tuning error on Khadas VIM3

Dmitry Vyukov <dvyukov@google.com>
    io_uring: fix sq array offset calculation

Vladimir Zapolskiy <vz@mleia.com>
    regulator: fix memory leak on error path of regulator_register()

Gregory Herrero <gregory.herrero@oracle.com>
    recordmcount: only record relocation of type R_AARCH64_CALL26 on arm64.

Tyler Hicks <tyhicks@linux.microsoft.com>
    tpm: Require that all digests are present in TCG_PCR_EVENT2 structures

Dilip Kota <eswara.kota@linux.intel.com>
    spi: lantiq: fix: Rx overflow error in full duplex mode

Chen-Yu Tsai <wens@csie.org>
    ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages

Chen-Yu Tsai <wens@csie.org>
    ARM: dts: sunxi: bananapi-m2-plus-v1.2: Add regulator supply to all CPU cores

Dejin Zheng <zhengdejin5@gmail.com>
    reset: intel: fix a compile warning about REG_OFFSET redefined

Marek Szyprowski <m.szyprowski@samsung.com>
    ARM: dts: exynos: Disable frequency scaling for FSYS bus on Odroid XU3 family

yu kuai <yukuai3@huawei.com>
    ARM: at91: pm: add missing put_device() call in at91_pm_sram_init()

Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
    ARM: dts: gose: Fix ports node name for adv7612

Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
    arm64: dts: renesas: Fix SD Card/eMMC interface device node names

Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
    ARM: dts: gose: Fix ports node name for adv7180

Lu Wei <luwei32@huawei.com>
    platform/x86: intel-vbtn: Fix return value check in check_acpi_dev()

Lu Wei <luwei32@huawei.com>
    platform/x86: intel-hid: Fix return value check in check_acpi_dev()

Finn Thain <fthain@telegraphics.com.au>
    m68k: mac: Fix IOP status/control register writes

Finn Thain <fthain@telegraphics.com.au>
    m68k: mac: Don't send IOP message until channel is idle

Sudeep Holla <sudeep.holla@arm.com>
    clk: scmi: Fix min and max rate when registering clocks with discrete rates

Giovanni Cabiddu <giovanni.cabiddu@intel.com>
    crypto: qat - allow xts requests not multiple of block

Qais Yousef <qais.yousef@arm.com>
    sched/uclamp: Fix initialization of struct uclamp_rq

Alim Akhtar <alim.akhtar@samsung.com>
    arm64: dts: exynos: Fix silent hang after boot on Espresso

Ondrej Jirman <megous@megous.com>
    arm64: dts: sun50i-pinephone: dldo4 must not be >= 1.8V

Cristian Marussi <cristian.marussi@arm.com>
    firmware: arm_scmi: Fix SCMI genpd domain probing

Uladzislau Rezki (Sony) <urezki@gmail.com>
    rcu/tree: Repeat the monitor if any free channel is busy

Marek Szyprowski <m.szyprowski@samsung.com>
    ARM: exynos: MCPM: Restore big.LITTLE cpuidle support

Gilad Ben-Yossef <gilad@benyossef.com>
    crypto: ccree - fix resource leak on error path

Luis Chamberlain <mcgrof@kernel.org>
    blktrace: fix debugfs use after free

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    memory: tegra: Fix an error handling path in tegra186_emc_probe()

Stephan Gerhold <stephan@gerhold.net>
    arm64: dts: qcom: msm8916: Replace invalid bias-pull-none property

Herbert Xu <herbert@gondor.apana.org.au>
    crc-t10dif: Fix potential crypto notify dead-lock

Qiushi Wu <wu000273@umn.edu>
    EDAC: Fix reference count leaks

Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
    arm64: dts: rockchip: fix rk3399-puma gmac reset gpio

Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
    arm64: dts: rockchip: fix rk3399-puma vcc5v0-host gpio

Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
    arm64: dts: rockchip: fix rk3368-lion gmac reset gpio

Peng Liu <iwtbavbm@gmail.com>
    sched: correct SD_flags returned by tl->sd_flags()

Vincent Guittot <vincent.guittot@linaro.org>
    sched/fair: Fix NOHZ next idle balance

Giovanni Gherdovich <ggherdovich@suse.cz>
    x86, sched: Bail out of frequency invariance if turbo_freq/base_freq gives 0

Giovanni Gherdovich <ggherdovich@suse.cz>
    x86, sched: Bail out of frequency invariance if turbo frequency is unknown

Kan Liang <kan.liang@linux.intel.com>
    perf/x86/intel/uncore: Fix oops when counting IMC uncore events on some TGL

Zhenzhong Duan <zhenzhong.duan@gmail.com>
    x86/mce/inject: Fix a wrong assignment of i_mce.status

Erwan Le Ray <erwan.leray@st.com>
    ARM: dts: stm32: fix uart7_pins_a comments in stm32mp15-pinctrl

Grant Likely <grant.likely@secretlab.ca>
    HID: input: Fix devices that return multiple bytes in battery report

Jens Axboe <axboe@kernel.dk>
    io_uring: abstract out task work running

Will Chen <chenwi@google.com>
    kunit: capture stderr on all make subprocess calls

Nick Desaulniers <ndesaulniers@google.com>
    tracepoint: Mark __tracepoint_string's __used


-------------

Diffstat:

 Documentation/ABI/testing/sysfs-bus-iio            |   3 +-
 Documentation/core-api/cpu_hotplug.rst             |   7 -
 Makefile                                           |   4 +-
 arch/arm/boot/dts/exynos5422-odroid-core.dtsi      |   6 -
 arch/arm/boot/dts/exynos5800.dtsi                  |   6 +-
 arch/arm/boot/dts/r8a7793-gose.dts                 |   4 +-
 arch/arm/boot/dts/stm32mp15-pinctrl.dtsi           |   8 +-
 arch/arm/boot/dts/sunxi-bananapi-m2-plus-v1.2.dtsi |  18 +-
 arch/arm/kernel/stacktrace.c                       |  24 +++
 arch/arm/mach-at91/pm.c                            |  11 +-
 arch/arm/mach-exynos/exynos.c                      |   2 +-
 arch/arm/mach-exynos/mcpm-exynos.c                 |  10 +-
 arch/arm/mach-socfpga/pm.c                         |   8 +-
 .../boot/dts/allwinner/sun50i-a64-pinephone.dtsi   |   2 +-
 arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi |   1 -
 .../boot/dts/amlogic/meson-sm1-khadas-vim3l.dts    |   4 +
 arch/arm64/boot/dts/exynos/exynos7-espresso.dts    |   1 +
 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts  |  11 +
 arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts     |   2 +-
 arch/arm64/boot/dts/qcom/msm8916-pins.dtsi         |  10 +-
 arch/arm64/boot/dts/renesas/r8a774a1.dtsi          |   8 +-
 arch/arm64/boot/dts/renesas/r8a774b1.dtsi          |   8 +-
 arch/arm64/boot/dts/renesas/r8a774c0.dtsi          |   6 +-
 arch/arm64/boot/dts/renesas/r8a77951.dtsi          |   8 +-
 arch/arm64/boot/dts/renesas/r8a77960.dtsi          |   8 +-
 arch/arm64/boot/dts/renesas/r8a77961.dtsi          |   8 +-
 arch/arm64/boot/dts/renesas/r8a77965.dtsi          |   8 +-
 arch/arm64/boot/dts/renesas/r8a77990.dtsi          |   6 +-
 arch/arm64/boot/dts/renesas/r8a77995.dtsi          |   2 +-
 arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi      |   2 +-
 arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi      |   4 +-
 arch/m68k/mac/iop.c                                |  21 +-
 arch/mips/cavium-octeon/octeon-usb.c               |   5 +-
 arch/mips/pci/pci-xtalk-bridge.c                   |   3 +
 arch/parisc/include/asm/barrier.h                  |  61 ++++++
 arch/parisc/include/asm/spinlock.h                 |  33 +--
 arch/parisc/kernel/entry.S                         |  48 +++--
 arch/parisc/kernel/syscall.S                       |  24 +--
 arch/powerpc/boot/Makefile                         |   2 +-
 arch/powerpc/boot/serial.c                         |   2 +-
 arch/powerpc/include/asm/fixmap.h                  |   2 +-
 arch/powerpc/include/asm/perf_event.h              |   2 +
 arch/powerpc/include/asm/ptrace.h                  |   2 +-
 arch/powerpc/include/asm/rtas.h                    |   2 -
 arch/powerpc/include/asm/timex.h                   |   2 +-
 arch/powerpc/kernel/rtas.c                         | 122 +----------
 arch/powerpc/kernel/vdso.c                         |   2 +-
 arch/powerpc/mm/book3s64/hash_utils.c              |   5 +-
 arch/powerpc/mm/book3s64/pkeys.c                   |  16 +-
 arch/powerpc/platforms/pseries/hotplug-cpu.c       | 171 ++-------------
 arch/powerpc/platforms/pseries/offline_states.h    |  38 ----
 arch/powerpc/platforms/pseries/pmem.c              |   1 -
 arch/powerpc/platforms/pseries/smp.c               |  28 +--
 arch/powerpc/platforms/pseries/suspend.c           |  22 +-
 arch/s390/include/asm/topology.h                   |   6 -
 arch/s390/mm/gmap.c                                |  27 ++-
 arch/s390/net/bpf_jit_comp.c                       |  54 +++--
 arch/x86/crypto/aes_ctrby8_avx-x86_64.S            |  14 +-
 arch/x86/crypto/aesni-intel_asm.S                  |   6 +-
 arch/x86/events/intel/uncore_snb.c                 |   3 +-
 arch/x86/include/asm/uaccess.h                     |   5 +-
 arch/x86/kernel/apic/io_apic.c                     |   5 +
 arch/x86/kernel/cpu/mce/inject.c                   |   2 +-
 arch/x86/kernel/process_64.c                       |   2 +-
 arch/x86/kernel/smpboot.c                          |  17 +-
 arch/x86/kvm/svm/svm.c                             |   2 +-
 arch/x86/kvm/vmx/vmx.c                             |   2 +-
 arch/x86/kvm/x86.c                                 |  38 ++--
 arch/x86/kvm/x86.h                                 |   2 +-
 block/blk-iocost.c                                 |   2 +-
 block/blk-zoned.c                                  |   3 +
 drivers/acpi/acpica/exprep.c                       |   4 -
 drivers/acpi/acpica/utdelete.c                     |   6 +-
 drivers/base/dd.c                                  |   7 +-
 drivers/base/firmware_loader/fallback_platform.c   |   5 +-
 drivers/block/loop.c                               |   4 +
 drivers/bluetooth/btmrvl_sdio.c                    |   8 +-
 drivers/bluetooth/btmtksdio.c                      |  16 +-
 drivers/bluetooth/btusb.c                          |  90 +++++++-
 drivers/bluetooth/hci_h5.c                         |   2 +-
 drivers/bluetooth/hci_qca.c                        | 104 ++++++---
 drivers/bluetooth/hci_serdev.c                     |   3 +-
 drivers/bus/ti-sysc.c                              |   6 +-
 drivers/char/agp/intel-gtt.c                       |   4 +-
 drivers/char/tpm/tpm-chip.c                        |   9 +-
 drivers/char/tpm/tpm.h                             |   5 +-
 drivers/char/tpm/tpm2-space.c                      |  26 ++-
 drivers/char/tpm/tpmrm-dev.c                       |   2 +-
 drivers/clk/bcm/clk-bcm63xx-gate.c                 |   1 +
 drivers/clk/clk-scmi.c                             |  22 +-
 drivers/clk/qcom/gcc-sc7180.c                      |   2 +-
 drivers/clk/qcom/gcc-sdm845.c                      |   4 +-
 drivers/cpufreq/Kconfig.arm                        |   1 +
 drivers/cpufreq/armada-37xx-cpufreq.c              |   1 +
 drivers/cpufreq/cpufreq.c                          |  58 +++--
 drivers/crypto/caam/caamalg.c                      |   2 +-
 drivers/crypto/caam/caamalg_qi.c                   |   2 +-
 drivers/crypto/caam/caamalg_qi2.c                  |   2 +-
 drivers/crypto/cavium/cpt/cptvf_algs.c             |   1 +
 drivers/crypto/cavium/cpt/cptvf_reqmanager.c       |  12 +-
 drivers/crypto/cavium/cpt/request_manager.h        |   2 +
 drivers/crypto/ccp/ccp-dev.h                       |   1 +
 drivers/crypto/ccp/ccp-ops.c                       |  37 +++-
 drivers/crypto/ccree/cc_cipher.c                   |  30 +--
 drivers/crypto/hisilicon/sec/sec_algs.c            |  34 +--
 drivers/crypto/qat/qat_common/qat_algs.c           |  22 +-
 drivers/crypto/qat/qat_common/qat_uclo.c           |   9 +-
 drivers/devfreq/devfreq.c                          |  11 +-
 drivers/devfreq/rk3399_dmc.c                       |  42 ++--
 drivers/edac/edac_device_sysfs.c                   |   1 +
 drivers/edac/edac_pci_sysfs.c                      |   2 +-
 drivers/firmware/arm_scmi/scmi_pm_domain.c         |  12 +-
 drivers/firmware/qcom_scm.c                        |   7 +-
 drivers/gpio/gpiolib-devres.c                      |  13 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c        |   2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c          |  19 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c             |   2 +-
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c   |   6 +-
 drivers/gpu/drm/amd/display/dc/core/dc_link.c      |   4 +-
 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c   |  16 +-
 .../amd/display/dc/dce110/dce110_hw_sequencer.c    |  11 +-
 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c       |  14 +-
 drivers/gpu/drm/amd/powerplay/smu_v11_0.c          |   3 +-
 drivers/gpu/drm/arm/malidp_planes.c                |   2 +-
 drivers/gpu/drm/bridge/sil-sii8620.c               |   2 +-
 drivers/gpu/drm/bridge/ti-sn65dsi86.c              |   8 +-
 drivers/gpu/drm/drm_debugfs.c                      |   8 +-
 drivers/gpu/drm/drm_gem.c                          |   4 +-
 drivers/gpu/drm/drm_mipi_dsi.c                     |   6 +-
 drivers/gpu/drm/etnaviv/etnaviv_gpu.c              |  19 +-
 drivers/gpu/drm/imx/dw_hdmi-imx.c                  |  15 +-
 drivers/gpu/drm/imx/imx-drm-core.c                 |   3 +-
 drivers/gpu/drm/imx/imx-ldb.c                      |  15 +-
 drivers/gpu/drm/imx/imx-tve.c                      |  35 ++--
 drivers/gpu/drm/imx/ipuv3-crtc.c                   |  21 +-
 drivers/gpu/drm/imx/parallel-display.c             |  15 +-
 drivers/gpu/drm/msm/adreno/a6xx_gmu.c              |  18 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c           |   2 +-
 drivers/gpu/drm/msm/msm_gem.c                      |  36 ++--
 drivers/gpu/drm/nouveau/dispnv50/head.c            |  24 ++-
 drivers/gpu/drm/nouveau/nouveau_debugfs.c          |   4 +-
 drivers/gpu/drm/nouveau/nouveau_drm.c              |   8 +-
 drivers/gpu/drm/nouveau/nouveau_gem.c              |   4 +-
 drivers/gpu/drm/nouveau/nouveau_sgdma.c            |   9 +-
 drivers/gpu/drm/panel/panel-simple.c               |   2 +-
 drivers/gpu/drm/panfrost/panfrost_job.c            |   5 +-
 drivers/gpu/drm/radeon/ci_dpm.c                    |   2 +-
 drivers/gpu/drm/radeon/radeon_display.c            |   4 +-
 drivers/gpu/drm/radeon/radeon_drv.c                |   9 +-
 drivers/gpu/drm/radeon/radeon_kms.c                |   4 +-
 drivers/gpu/drm/stm/ltdc.c                         |   3 +
 drivers/gpu/drm/tilcdc/tilcdc_panel.c              |   6 +-
 drivers/gpu/drm/ttm/ttm_tt.c                       |   3 -
 drivers/gpu/drm/xen/xen_drm_front.c                |   4 +-
 drivers/gpu/drm/xen/xen_drm_front_gem.c            |   8 +-
 drivers/gpu/drm/xen/xen_drm_front_kms.c            |   2 +-
 drivers/gpu/host1x/debug.c                         |   4 +
 drivers/gpu/ipu-v3/ipu-common.c                    |   2 +
 drivers/hid/hid-input.c                            |   6 +-
 drivers/hwtracing/coresight/coresight-etm4x.c      |  22 +-
 drivers/hwtracing/coresight/coresight-etm4x.h      |   6 +-
 drivers/hwtracing/coresight/coresight-tmc-etf.c    |  13 +-
 drivers/iio/amplifiers/ad8366.c                    |   7 +-
 drivers/infiniband/core/device.c                   |  11 +-
 drivers/infiniband/core/nldev.c                    |   3 -
 drivers/infiniband/core/verbs.c                    |   2 +-
 drivers/infiniband/hw/qedr/qedr.h                  |   4 +-
 drivers/infiniband/hw/qedr/verbs.c                 |  22 +-
 drivers/infiniband/sw/rxe/rxe_recv.c               |   6 +-
 drivers/infiniband/sw/rxe/rxe_verbs.c              |   5 +-
 drivers/iommu/intel_irq_remapping.c                |   8 +
 drivers/irqchip/irq-bcm7038-l1.c                   |   8 +
 drivers/irqchip/irq-gic-v3-its.c                   |   4 +-
 drivers/irqchip/irq-loongson-liointc.c             |   1 +
 drivers/irqchip/irq-mtk-sysirq.c                   |   8 +-
 drivers/irqchip/irq-ti-sci-inta.c                  |   2 +-
 drivers/leds/led-class.c                           |   1 +
 drivers/leds/leds-lm355x.c                         |   7 +-
 drivers/macintosh/via-macii.c                      |   9 +-
 drivers/md/bcache/super.c                          |   9 +-
 drivers/md/md-cluster.c                            |   1 +
 drivers/md/md.c                                    |   9 +-
 drivers/media/firewire/firedtv-fw.c                |   2 +
 drivers/media/i2c/tvp5150.c                        |   8 +-
 drivers/media/mc/mc-request.c                      |  31 +--
 drivers/media/platform/cros-ec-cec/cros-ec-cec.c   |   6 +-
 drivers/media/platform/exynos4-is/media-dev.c      |   3 +
 drivers/media/platform/marvell-ccic/mcam-core.c    |   2 +
 drivers/media/platform/mtk-mdp/mtk_mdp_comp.c      |  16 +-
 drivers/media/platform/omap3isp/isppreview.c       |   4 +-
 drivers/media/platform/s5p-g2d/g2d.c               |  28 +--
 drivers/media/usb/dvb-usb/Kconfig                  |   1 +
 drivers/media/usb/go7007/go7007-usb.c              |  11 +-
 drivers/memory/samsung/exynos5422-dmc.c            |  12 +-
 drivers/memory/tegra/tegra186-emc.c                |  16 +-
 drivers/mfd/ioc3.c                                 |   6 +
 drivers/misc/cxl/sysfs.c                           |   2 +-
 drivers/misc/lkdtm/bugs.c                          |  49 +++--
 drivers/misc/lkdtm/lkdtm.h                         |   2 -
 drivers/misc/lkdtm/perms.c                         |  22 +-
 drivers/misc/lkdtm/usercopy.c                      |   7 +-
 drivers/mmc/host/sdhci-cadence.c                   | 123 +++++------
 drivers/mmc/host/sdhci-of-arasan.c                 |   4 +
 drivers/mmc/host/sdhci-pci-o2micro.c               |   6 +
 drivers/most/core.c                                |   4 +-
 drivers/mtd/nand/raw/brcmnand/brcmnand.c           |   5 +-
 drivers/mtd/nand/raw/qcom_nandc.c                  |   7 +-
 drivers/mtd/spi-nor/controllers/intel-spi.c        |   9 +
 drivers/net/dsa/mv88e6xxx/chip.c                   |   1 -
 drivers/net/dsa/rtl8366.c                          |  35 +++-
 .../net/ethernet/aquantia/atlantic/aq_ethtool.c    |   6 +-
 .../ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c  |   2 +-
 .../ethernet/cavium/liquidio/cn23xx_pf_device.c    |   2 +-
 drivers/net/ethernet/cavium/thunder/nicvf_main.c   |   4 +-
 drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c   |   2 +-
 drivers/net/ethernet/freescale/fman/fman.c         |   3 +-
 drivers/net/ethernet/freescale/fman/fman_dtsec.c   |   4 +-
 drivers/net/ethernet/freescale/fman/fman_mac.h     |   2 +-
 drivers/net/ethernet/freescale/fman/fman_memac.c   |   3 +-
 drivers/net/ethernet/freescale/fman/fman_port.c    |   9 +-
 drivers/net/ethernet/freescale/fman/fman_tgec.c    |   2 +-
 drivers/net/ethernet/intel/iavf/iavf_main.c        |   9 +-
 drivers/net/ethernet/intel/ice/ice_flex_pipe.c     |   8 +-
 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c  |   9 +-
 .../ethernet/mellanox/mlx5/core/steering/fs_dr.c   |  42 ++--
 drivers/net/ethernet/mscc/ocelot.c                 |  16 +-
 drivers/net/ethernet/pensando/ionic/ionic_lif.c    |   2 +-
 drivers/net/ethernet/sgi/ioc3-eth.c                |   4 +-
 drivers/net/ethernet/ti/am65-cpsw-nuss.c           |  19 ++
 drivers/net/ethernet/toshiba/spider_net.c          |   4 +-
 drivers/net/phy/marvell10g.c                       |  18 +-
 drivers/net/phy/mscc/mscc_main.c                   |   9 +
 drivers/net/phy/phy_device.c                       |   8 +-
 drivers/net/vmxnet3/vmxnet3_drv.c                  |   3 +-
 drivers/net/wan/lapbether.c                        |  10 +-
 drivers/net/wireless/ath/ath10k/htt_tx.c           |   4 +
 .../broadcom/brcm80211/brcmfmac/fwil_types.h       |   2 +-
 .../broadcom/brcm80211/brcmfmac/fwsignal.c         |   4 +
 .../wireless/broadcom/brcm80211/brcmfmac/sdio.c    |   6 +-
 drivers/net/wireless/intel/iwlegacy/common.c       |   4 +-
 drivers/net/wireless/marvell/mwifiex/sdio.h        |   4 +-
 drivers/net/wireless/marvell/mwifiex/sta_cmdresp.c |  22 +-
 drivers/net/wireless/mediatek/mt76/mt7615/mcu.c    |  13 +-
 drivers/net/wireless/quantenna/qtnfmac/core.c      |   5 +-
 drivers/net/wireless/realtek/rtw88/coex.c          |   3 +-
 drivers/net/wireless/realtek/rtw88/fw.c            |   2 +-
 drivers/net/wireless/realtek/rtw88/main.c          |  11 +-
 drivers/net/wireless/ti/wl1251/event.c             |   2 +-
 drivers/nvme/host/multipath.c                      |  17 +-
 drivers/nvme/host/rdma.c                           |  12 +-
 drivers/nvme/host/tcp.c                            |  12 +-
 drivers/nvmem/sprd-efuse.c                         |   4 +-
 drivers/parisc/sba_iommu.c                         |   2 +-
 drivers/pci/access.c                               |   8 +-
 drivers/pci/controller/cadence/pcie-cadence-ep.c   |   9 +-
 drivers/pci/controller/cadence/pcie-cadence-host.c |  15 +-
 drivers/pci/controller/vmd.c                       |   3 +
 drivers/pci/pcie/aspm.c                            |   1 +
 drivers/pci/quirks.c                               |   2 +
 drivers/phy/marvell/phy-armada38x-comphy.c         |  45 +++-
 drivers/phy/renesas/phy-rcar-gen3-usb2.c           |  61 +++---
 drivers/phy/samsung/phy-exynos5-usbdrd.c           |   4 +-
 drivers/pinctrl/pinctrl-single.c                   |  11 +-
 drivers/platform/x86/asus-nb-wmi.c                 |  82 ++++++++
 drivers/platform/x86/intel-hid.c                   |   2 +-
 drivers/platform/x86/intel-vbtn.c                  |   2 +-
 drivers/power/supply/88pm860x_battery.c            |   6 +-
 drivers/regulator/core.c                           |  18 +-
 drivers/reset/reset-intel-gw.c                     |  24 +--
 drivers/s390/block/dasd_diag.c                     |  25 ++-
 drivers/s390/net/qeth_core_main.c                  |  20 +-
 drivers/s390/net/qeth_l2_main.c                    |   4 +
 drivers/scsi/arm/cumana_2.c                        |   2 +-
 drivers/scsi/arm/eesox.c                           |   2 +-
 drivers/scsi/arm/powertec.c                        |   2 +-
 drivers/scsi/megaraid/megaraid_sas_base.c          |   9 +-
 drivers/scsi/mesh.c                                |   8 +-
 drivers/scsi/scsi_debug.c                          |   6 +
 drivers/scsi/ufs/ufshcd.c                          |  18 +-
 drivers/scsi/ufs/ufshcd.h                          |   2 +-
 drivers/soc/qcom/pdr_interface.c                   |   4 +-
 drivers/soc/qcom/rpmh-rsc.c                        |   1 +
 drivers/spi/spi-lantiq-ssc.c                       |  12 +-
 drivers/spi/spi-rockchip.c                         |   2 +-
 drivers/spi/spidev.c                               |  21 +-
 drivers/staging/media/allegro-dvt/allegro-core.c   |   8 +-
 drivers/staging/media/rkisp1/rkisp1-resizer.c      |  12 +-
 drivers/staging/rtl8192u/r8192U_core.c             |   2 +-
 .../vc04_services/interface/vchiq_arm/vchiq_arm.c  |   1 +
 .../int340x_thermal/processor_thermal_device.c     |   2 +-
 drivers/thermal/ti-soc-thermal/ti-thermal-common.c |   2 +-
 drivers/usb/cdns3/gadget.c                         |   3 +-
 drivers/usb/core/quirks.c                          |  16 +-
 drivers/usb/dwc2/platform.c                        |   4 +-
 drivers/usb/gadget/function/f_uac2.c               |   7 +-
 drivers/usb/gadget/udc/bdc/bdc_core.c              |  13 +-
 drivers/usb/gadget/udc/bdc/bdc_ep.c                |  16 +-
 drivers/usb/gadget/udc/net2280.c                   |   4 +-
 drivers/usb/mtu3/mtu3_core.c                       |   6 +-
 drivers/usb/serial/cp210x.c                        |  19 ++
 drivers/usb/serial/iuu_phoenix.c                   |  14 +-
 drivers/vdpa/vdpa_sim/vdpa_sim.c                   |  31 ++-
 drivers/video/console/newport_con.c                |  12 +-
 drivers/video/fbdev/neofb.c                        |   1 +
 drivers/video/fbdev/pxafb.c                        |   4 +-
 drivers/video/fbdev/savage/savagefb_driver.c       |   2 +
 drivers/video/fbdev/sm712fb.c                      |   2 +
 drivers/xen/balloon.c                              |  12 +-
 drivers/xen/gntdev-dmabuf.c                        |   8 +
 fs/9p/v9fs.c                                       |   5 +-
 fs/btrfs/ctree.h                                   |   2 +
 fs/btrfs/extent-tree.c                             |   8 +
 fs/btrfs/extent_io.c                               |   2 +
 fs/btrfs/file.c                                    |  12 +-
 fs/btrfs/inode.c                                   |  44 +++-
 fs/btrfs/space-info.c                              |   2 +-
 fs/dlm/lockspace.c                                 |   6 +-
 fs/erofs/inode.c                                   | 121 +++++++----
 fs/io_uring.c                                      | 233 ++++++++++++++++-----
 fs/iomap/apply.c                                   |  13 +-
 fs/kernfs/file.c                                   |   2 +-
 fs/minix/inode.c                                   |  36 +++-
 fs/minix/itree_common.c                            |   8 +-
 fs/nfs/pnfs.c                                      |  46 ++--
 fs/nfsd/nfs4recover.c                              |  24 +--
 fs/ocfs2/dlmglue.c                                 |   8 +-
 fs/pstore/platform.c                               |   5 +-
 fs/xfs/libxfs/xfs_trans_space.h                    |   2 +-
 fs/xfs/scrub/bmap.c                                |  22 +-
 fs/xfs/xfs_qm.c                                    |   1 +
 fs/xfs/xfs_reflink.c                               |  21 +-
 include/asm-generic/vmlinux.lds.h                  |   1 +
 include/linux/bitfield.h                           |   2 +-
 include/linux/gpio/driver.h                        |  13 +-
 include/linux/tpm.h                                |   1 +
 include/linux/tpm_eventlog.h                       |  11 +-
 include/linux/tracepoint.h                         |   2 +-
 include/net/bluetooth/bluetooth.h                  |   2 +
 include/net/bluetooth/hci.h                        |  11 +
 include/net/inet_connection_sock.h                 |   4 +
 include/net/ip_vs.h                                |  10 +-
 include/net/tcp.h                                  |   2 +
 include/uapi/linux/seccomp.h                       |   3 +-
 kernel/rcu/tree.c                                  |   9 +-
 kernel/sched/core.c                                |  21 +-
 kernel/sched/fair.c                                |  23 +-
 kernel/sched/topology.c                            |   2 +-
 kernel/seccomp.c                                   |   9 +
 kernel/signal.c                                    |  16 +-
 kernel/task_work.c                                 |   8 +-
 kernel/time/tick-sched.c                           |  22 +-
 kernel/trace/blktrace.c                            |  18 +-
 kernel/trace/ftrace.c                              |   3 -
 kernel/trace/trace.c                               |  12 +-
 kernel/trace/trace.h                               |   9 +-
 lib/crc-t10dif.c                                   |  54 +++--
 lib/dynamic_debug.c                                |  23 +-
 lib/kobject.c                                      |  33 ++-
 mm/mmap.c                                          |   1 +
 net/bluetooth/6lowpan.c                            |   5 +
 net/bluetooth/hci_core.c                           |  28 ++-
 net/core/sock.c                                    |  25 ++-
 net/ipv4/inet_connection_sock.c                    |  97 +++++----
 net/ipv4/inet_hashtables.c                         |   1 +
 net/ipv4/sysctl_net_ipv4.c                         |  16 +-
 net/ipv4/tcp.c                                     |  16 +-
 net/ipv4/tcp_fastopen.c                            |  23 ++
 net/netfilter/ipvs/ip_vs_core.c                    |  12 +-
 net/netfilter/nft_meta.c                           |   2 +-
 net/nfc/rawsock.c                                  |   7 +-
 net/packet/af_packet.c                             |   9 +-
 net/socket.c                                       |   2 +-
 net/sunrpc/auth_gss/gss_krb5_wrap.c                |   2 +-
 net/sunrpc/auth_gss/svcauth_gss.c                  |   1 -
 net/sunrpc/xprtrdma/svc_rdma_rw.c                  |  28 ++-
 net/tls/tls_device.c                               |   3 +-
 net/vmw_vsock/af_vsock.c                           |   2 +-
 samples/bpf/fds_example.c                          |   3 +-
 samples/bpf/map_perf_test_kern.c                   |   9 +-
 samples/bpf/test_map_in_map_kern.c                 |   9 +-
 samples/bpf/test_probe_write_user_kern.c           |   9 +-
 scripts/recordmcount.c                             |   6 +
 scripts/selinux/mdp/mdp.c                          |  23 +-
 security/integrity/ima/ima.h                       |   5 +
 security/integrity/ima/ima_policy.c                | 102 ++++++++-
 security/smack/smackfs.c                           |   6 +-
 sound/pci/hda/patch_realtek.c                      |   1 +
 sound/soc/codecs/hdac_hda.c                        |   7 +-
 sound/soc/codecs/tas2770.c                         |   3 +-
 sound/soc/fsl/fsl_sai.c                            |   5 +-
 sound/soc/fsl/fsl_sai.h                            |   2 +-
 sound/soc/intel/boards/bxt_rt298.c                 |   2 +
 sound/soc/intel/boards/cml_rt1011_rt5682.c         |   1 +
 sound/soc/intel/boards/sof_sdw.c                   |   1 +
 sound/soc/meson/axg-card.c                         |   2 +-
 sound/soc/meson/axg-tdm-formatter.c                |  11 +-
 sound/soc/meson/axg-tdm-formatter.h                |   1 -
 sound/soc/meson/axg-tdm-interface.c                |  26 ++-
 sound/soc/meson/axg-tdmin.c                        |  16 +-
 sound/soc/meson/axg-tdmout.c                       |   3 -
 sound/soc/soc-core.c                               |   5 +-
 sound/soc/sof/nocodec.c                            |   1 +
 sound/usb/card.h                                   |   1 +
 sound/usb/mixer_quirks.c                           |   1 +
 sound/usb/pcm.c                                    |   6 +
 sound/usb/quirks-table.h                           |  64 +++++-
 sound/usb/quirks.c                                 |   3 +
 sound/usb/stream.c                                 |   1 +
 tools/bpf/bpftool/btf.c                            |   2 +-
 tools/bpf/bpftool/gen.c                            |   5 +-
 tools/build/Build.include                          |   3 +-
 tools/lib/bpf/bpf_tracing.h                        |   4 +-
 tools/testing/kunit/kunit_kernel.py                |   6 +-
 tools/testing/selftests/lkdtm/run.sh               |   6 +
 tools/testing/selftests/lkdtm/tests.txt            |   1 +
 .../selftests/powerpc/benchmarks/context_switch.c  |  21 +-
 .../testing/selftests/powerpc/eeh/eeh-functions.sh |  11 +-
 tools/testing/selftests/powerpc/utils.c            |  37 ++--
 tools/testing/selftests/seccomp/seccomp_bpf.c      |   2 +-
 419 files changed, 3293 insertions(+), 1963 deletions(-)



^ permalink raw reply	[relevance 2%]

* [PATCH 5.8 055/464] soc: qcom: pdr: Reorder the PD state indication ack
  2020-08-17 15:09  2% [PATCH 5.8 000/464] 5.8.2-rc1 review Greg Kroah-Hartman
@ 2020-08-17 15:10  9% ` Greg Kroah-Hartman
  0 siblings, 0 replies; 200+ results
From: Greg Kroah-Hartman @ 2020-08-17 15:10 UTC (permalink / raw)
  To: linux-kernel
  Cc: Greg Kroah-Hartman, stable, Bjorn Andersson, Rishabh Bhatnagar,
	Sibi Sankar, Sasha Levin

From: Sibi Sankar <sibis@codeaurora.org>

[ Upstream commit 72fe996f9643043c8f84e32c0610975b01aa555b ]

The Protection Domains (PD) have a mechanism to keep its resources
enabled until the PD down indication is acked. Reorder the PD state
indication ack so that clients get to release the relevant resources
before the PD goes down.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Fixes: fbe639b44a82 ("soc: qcom: Introduce Protection Domain Restart helpers")
Reported-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200701195954.9007-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 drivers/soc/qcom/pdr_interface.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/qcom/pdr_interface.c b/drivers/soc/qcom/pdr_interface.c
index bdcf16f88a97f..4c9225f15c4e6 100644
--- a/drivers/soc/qcom/pdr_interface.c
+++ b/drivers/soc/qcom/pdr_interface.c
@@ -278,13 +278,15 @@ static void pdr_indack_work(struct work_struct *work)
 
 	list_for_each_entry_safe(ind, tmp, &pdr->indack_list, node) {
 		pds = ind->pds;
-		pdr_send_indack_msg(pdr, pds, ind->transaction_id);
 
 		mutex_lock(&pdr->status_lock);
 		pds->state = ind->curr_state;
 		pdr->status(pds->state, pds->service_path, pdr->priv);
 		mutex_unlock(&pdr->status_lock);
 
+		/* Ack the indication after clients release the PD resources */
+		pdr_send_indack_msg(pdr, pds, ind->transaction_id);
+
 		mutex_lock(&pdr->list_lock);
 		list_del(&ind->node);
 		mutex_unlock(&pdr->list_lock);
-- 
2.25.1




^ permalink raw reply	[relevance 9%]

* [PATCH 5.8 000/464] 5.8.2-rc1 review
@ 2020-08-17 15:09  2% Greg Kroah-Hartman
  2020-08-17 15:10  9% ` [PATCH 5.8 055/464] soc: qcom: pdr: Reorder the PD state indication ack Greg Kroah-Hartman
  0 siblings, 1 reply; 200+ results
From: Greg Kroah-Hartman @ 2020-08-17 15:09 UTC (permalink / raw)
  To: linux-kernel
  Cc: Greg Kroah-Hartman, torvalds, akpm, linux, shuah, patches,
	ben.hutchings, lkft-triage, stable

This is the start of the stable review cycle for the 5.8.2 release.
There are 464 patches in this series, all will be posted as a response
to this one.  If anyone has any issues with these being applied, please
let me know.

Responses should be made by Wed, 19 Aug 2020 14:36:49 +0000.
Anything received after that time might be too late.

The whole patch series can be found in one patch at:
	https://www.kernel.org/pub/linux/kernel/v5.x/stable-review/patch-5.8.2-rc1.gz
or in the git tree and branch at:
	git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git linux-5.8.y
and the diffstat can be found below.

thanks,

greg k-h

-------------
Pseudo-Shortlog of commits:

Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    Linux 5.8.2-rc1

Jens Axboe <axboe@kernel.dk>
    task_work: only grab task signal lock when needed

Jens Axboe <axboe@kernel.dk>
    io_uring: enable lookup of links holding inflight files

Jens Axboe <axboe@kernel.dk>
    io_uring: add missing REQ_F_COMP_LOCKED for nested requests

Jens Axboe <axboe@kernel.dk>
    io_uring: hold 'ctx' reference around task_work queue + execute

Guoyu Huang <hgy5945@gmail.com>
    io_uring: Fix NULL pointer dereference in loop_rw_iter()

Gerald Schaefer <gerald.schaefer@linux.ibm.com>
    s390/gmap: improve THP splitting

Alexander Gordeev <agordeev@linux.ibm.com>
    s390/numa: set node distance to LOCAL_DISTANCE

Stefan Haberland <sth@linux.ibm.com>
    s390/dasd: fix inability to use DASD with DIAG driver

Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
    drm/xen-front: Fix misused IS_ERR_OR_NULL checks

Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
    xen/gntdev: Fix dmabuf import with non-zero sgt offset

Roger Pau Monne <roger.pau@citrix.com>
    xen/balloon: make the balloon wait interruptible

Roger Pau Monne <roger.pau@citrix.com>
    xen/balloon: fix accounting in alloc_xenballooned_pages error path

Kees Cook <keescook@chromium.org>
    firmware_loader: EFI firmware loader must handle pre-allocated buffer

Jon Derrick <jonathan.derrick@intel.com>
    irqdomain/treewide: Free firmware node after domain removal

Jonathan McDowell <noodles@earth.li>
    firmware: qcom_scm: Fix legacy convention SCM accessors

Nathan Huckleberry <nhuck@google.com>
    ARM: 8992/1: Fix unwind_frame for clang-built kernels

Marek Szyprowski <m.szyprowski@samsung.com>
    ARM: dts: exynos: Extend all Exynos5800 A15's OPPs with max voltage data

Sven Schnelle <svens@stackframe.org>
    parisc: mask out enable and reserved bits from sba imask

John David Anglin <dave.anglin@bell.net>
    parisc: Implement __smp_store_release and __smp_load_acquire barriers

John David Anglin <dave.anglin@bell.net>
    parisc: Do not use an ordered store in pa_tlb_lock()

Helge Deller <deller@gmx.de>
    Revert "parisc: Revert "Release spinlocks using ordered store""

Helge Deller <deller@gmx.de>
    Revert "parisc: Use ldcw instruction for SMP spinlock release barrier"

Helge Deller <deller@gmx.de>
    Revert "parisc: Drop LDCW barrier in CAS code when running UP"

Helge Deller <deller@gmx.de>
    Revert "parisc: Improve interrupt handling in arch_spin_lock_flags()"

Baoquan He <bhe@redhat.com>
    Revert "mm/vmstat.c: do not show lowmem reserve protection information of empty zone"

Gao Xiang <hsiangkao@redhat.com>
    erofs: fix extended inode could cross boundary

Alexander Sverdlin <alexander.sverdlin@nokia.com>
    mtd: spi-nor: intel-spi: Simulate WRDI command

Sivaprakash Murugesan <sivaprak@codeaurora.org>
    mtd: rawnand: qcom: avoid write to unavailable register

Christian Eggers <ceggers@arri.de>
    spi: spidev: Align buffers for DMA

Chanwoo Choi <cw00.choi@samsung.com>
    PM / devfreq: Fix indentaion of devfreq_summary debugfs node

Marc Zyngier <maz@kernel.org>
    PM / devfreq: rk3399_dmc: Fix kernel oops when rockchip,pmu is absent

Romain Naour <romain.naour@gmail.com>
    include/asm-generic/vmlinux.lds.h: align ro_after_init

Huacai Chen <chenhc@lemote.com>
    MIPS: VZ: Only include loongson_regs.h for CPU_LOONGSON64

Ivan Kokshaysky <ink@jurassic.park.msu.ru>
    cpufreq: dt: fix oops on armada37xx

Viresh Kumar <viresh.kumar@linaro.org>
    cpufreq: Fix locking issues with governors

Trond Myklebust <trond.myklebust@hammerspace.com>
    NFS: Don't return layout segments that are in use

Trond Myklebust <trond.myklebust@hammerspace.com>
    NFS: Don't move layouts to plh_return_segs list while in use

Jens Axboe <axboe@kernel.dk>
    io_uring: sanitize double poll handling

Jens Axboe <axboe@kernel.dk>
    io_uring: fail poll arm on queue proc failure

Jens Axboe <axboe@kernel.dk>
    io_uring: use TWA_SIGNAL for task_work uncondtionally

Jens Axboe <axboe@kernel.dk>
    io_uring: set ctx sq/cq entry count earlier

Dave Airlie <airlied@redhat.com>
    drm/ttm/nouveau: don't call tt destroy callback on alloc failure.

Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    media: media-request: Fix crash if memory allocation fails

Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
    driver core: Fix probe_count imbalance in really_probe()

Zheng Bin <zhengbin13@huawei.com>
    9p: Fix memory leak in v9fs_mount

Maxim Levitsky <mlevitsk@redhat.com>
    kvm: x86: replace kvm_spec_ctrl_test_value with runtime test on the host

Eric Biggers <ebiggers@google.com>
    fs/minix: reject too-large maximum file size

Eric Biggers <ebiggers@google.com>
    fs/minix: don't allow getting deleted inodes

Eric Biggers <ebiggers@google.com>
    fs/minix: check return value of sb_getblk()

Jakub Kicinski <kuba@kernel.org>
    bitfield.h: don't compile-time validate _val in FIELD_FIT

Frederic Weisbecker <frederic@kernel.org>
    tick/nohz: Narrow down noise while setting current task's tick dependency

Mikulas Patocka <mpatocka@redhat.com>
    crypto: cpt - don't sleep of CRYPTO_TFM_REQ_MAY_SLEEP was not specified

John Allen <john.allen@amd.com>
    crypto: ccp - Fix use of merged scatterlists

Tom Rix <trix@redhat.com>
    crypto: qat - fix double free in qat_uclo_create_batch_init_list

Mikulas Patocka <mpatocka@redhat.com>
    crypto: hisilicon - don't sleep of CRYPTO_TFM_REQ_MAY_SLEEP was not specified

Matteo Croce <mcroce@linux.microsoft.com>
    pstore: Fix linking when crypto API disabled

Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
    tpm: Unify the mismatching TPM space buffer sizes

Hector Martin <marcan@marcan.st>
    ALSA: usb-audio: add quirk for Pioneer DDJ-RB

Hector Martin <marcan@marcan.st>
    ALSA: usb-audio: work around streaming quirk for MacroSilicon MS2109

Hector Martin <marcan@marcan.st>
    ALSA: usb-audio: fix overeager device match for MacroSilicon MS2109

Mirko Dietrich <buzz@l4m1.de>
    ALSA: usb-audio: Creative USB X-Fi Pro SB1095 volume knob support

Hui Wang <hui.wang@canonical.com>
    ALSA: hda - reverse the setting value in the micmute_led_set

Hui Wang <hui.wang@canonical.com>
    ALSA: hda - fix the micmute led status for Lenovo ThinkCentre AIO

Max Gurtovoy <maxg@mellanox.com>
    vdpasim: protect concurrent access to iommu iotlb

Lu Baolu <baolu.lu@linux.intel.com>
    iommu/vt-d: Skip TE disabling on quirky gfx dedicated iommu

Peter Chen <peter.chen@nxp.com>
    usb: cdns3: gadget: always zeroed TRB buffer when enable endpoint

Brant Merryman <brant.merryman@silabs.com>
    USB: serial: cp210x: enable usb generic throttle/unthrottle

Brant Merryman <brant.merryman@silabs.com>
    USB: serial: cp210x: re-enable auto-RTS on open

Thierry Reding <treding@nvidia.com>
    r8152: Use MAC address from correct device tree node

Marek Behún <marek.behun@nic.cz>
    net: phy: marvell10g: fix null pointer dereference

Stefano Garzarella <sgarzare@redhat.com>
    vsock: fix potential null pointer dereference in vsock_poll()

Tim Froidcoeur <tim.froidcoeur@tessares.net>
    net: initialize fastreuse on inet_inherit_port

Tim Froidcoeur <tim.froidcoeur@tessares.net>
    net: refactor bind_bucket fastreuse into helper

Ronak Doshi <doshir@vmware.com>
    vmxnet3: use correct tcp hdr length when packet is encapsulated

Jason Baron <jbaron@akamai.com>
    tcp: correct read of TFO keys on big endian systems

Ira Weiny <ira.weiny@intel.com>
    net/tls: Fix kmap usage

Miaohe Lin <linmiaohe@huawei.com>
    net: Set fput_needed iff FDPUT_FPUT is set

Johan Hovold <johan@kernel.org>
    net: phy: fix memory leak in device-create error path

Qingyu Li <ieatmuttonchuan@gmail.com>
    net/nfc/rawsock.c: add CAP_NET_RAW check.

Miaohe Lin <linmiaohe@huawei.com>
    net: Fix potential memory leak in proto_register()

Xie He <xie.he.0141@gmail.com>
    drivers/net/wan/lapbether: Added needed_headroom and a skb->len check

John Ogness <john.ogness@linutronix.de>
    af_packet: TPACKET_V3: fix fill status rwlock imbalance

Jian Cai <caij2003@gmail.com>
    crypto: aesni - add compatibility with IAS

Eric Dumazet <edumazet@google.com>
    x86/fsgsbase/64: Fix NULL deref in 86_fsgsbase_read_task

Chuck Lever <chuck.lever@oracle.com>
    SUNRPC: Fix ("SUNRPC: Add "@len" parameter to gss_unwrap()")

Scott Mayhew <smayhew@redhat.com>
    nfsd: avoid a NULL dereference in __cld_pipe_upcall()

Chuck Lever <chuck.lever@oracle.com>
    svcrdma: Fix page leak in svc_rdma_recv_read_chunk()

Kamal Dasu <kdasu.kdev@gmail.com>
    mtd: rawnand: brcmnand: Don't default to edu transfer

Drew Fustini <drew@beagleboard.org>
    pinctrl-single: fix pcs_parse_pinconf() return value

Pavel Machek <pavel@ucw.cz>
    ocfs2: fix unbalanced locking

Wang Hai <wanghai38@huawei.com>
    dlm: Fix kobject memleak

Dan Carpenter <dan.carpenter@oracle.com>
    media: mtk-mdp: Fix a refcounting bug on error in init

Dean Nelson <dnelson@redhat.com>
    net: thunderx: initialize VF's mailbox mutex before first usage

Willem de Bruijn <willemb@google.com>
    selftests/net: relax cpu affinity requirement in msg_zerocopy test

Hangbin Liu <liuhangbin@gmail.com>
    Revert "vxlan: fix tos value before xmit"

Stephen Hemminger <stephen@networkplumber.org>
    hv_netvsc: do not use VF device if link is down

YueHaibing <yuehaibing@huawei.com>
    dpaa2-eth: Fix passing zero to 'PTR_ERR' warning

Stefan Roese <sr@denx.de>
    net: macb: Properly handle phylink on at91sam9x

Xin Long <lucien.xin@gmail.com>
    net: thunderx: use spin_lock_bh in nicvf_set_rx_mode_task()

Ahmad Fatoum <a.fatoum@pengutronix.de>
    gpio: don't use same lockdep class for all devm_gpiochip_add_data users

Florinel Iordache <florinel.iordache@nxp.com>
    fsl/fman: fix eth hash table allocation

Florinel Iordache <florinel.iordache@nxp.com>
    fsl/fman: check dereferencing null pointer

Florinel Iordache <florinel.iordache@nxp.com>
    fsl/fman: fix unreachable code

Florinel Iordache <florinel.iordache@nxp.com>
    fsl/fman: fix dereference null return value

Florinel Iordache <florinel.iordache@nxp.com>
    fsl/fman: use 32-bit unsigned integer

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    net: spider_net: Fix the size used in a 'dma_free_coherent()' call

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    net: sgi: ioc3-eth: Fix the size used in some 'dma_free_coherent()' calls

Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
    liquidio: Fix wrong return value in cn23xx_get_pf_num()

Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
    net: ethernet: aquantia: Fix wrong return value

Lorenzo Bianconi <lorenzo@kernel.org>
    net: mvpp2: fix memory leak in mvpp2_rx

Josef Bacik <josef@toxicpanda.com>
    ftrace: Fix ftrace_trace_task return value

Leon Romanovsky <leon@kernel.org>
    net/mlx5: Delete extra dump stack that gives nothing

Alex Vesker <valex@mellanox.com>
    net/mlx5: DR, Change push vlan action sequence

Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
    tools, bpftool: Fix wrong return value in do_dump()

Andrii Nakryiko <andriin@fb.com>
    tools, build: Propagate build failures from tools/build/Makefile.build

Wang Hai <wanghai38@huawei.com>
    wl1251: fix always return 0 error

Wang Hai <wanghai38@huawei.com>
    qtnfmac: Missing platform_device_unregister() on error in qtnf_core_mac_alloc()

Yan-Hsuan Chuang <yhchuang@realtek.com>
    rtw88: coex: only skip coex triggered by BT info

Tsang-Shian Lin <thlin@realtek.com>
    rtw88: fix short GI capability based on current bandwidth

Tsang-Shian Lin <thlin@realtek.com>
    rtw88: fix LDPC field for RA info

Florian Westphal <fw@strlen.de>
    netfilter: nft_meta: fix iifgroup matching

Surabhi Boob <surabhi.boob@intel.com>
    ice: Graceful error handling in HW table calloc failure

Vignesh Sridhar <vignesh.sridhar@intel.com>
    ice: Clear and free XLT entries on reset

Julian Wiedmann <jwi@linux.ibm.com>
    s390/qeth: don't process empty bridge port events

Julian Wiedmann <jwi@linux.ibm.com>
    s390/qeth: tolerate pre-filled RX buffer

Shengjiu Wang <shengjiu.wang@nxp.com>
    ASoC: fsl_sai: Fix value of FSL_SAI_CR1_RFW_MASK

Jerome Brunet <jbrunet@baylibre.com>
    ASoC: meson: cards: deal dpcm flag change

Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
    ASoC: core: use less strict tests for dailink capabilities

WANG Xuerui <git@xen0n.name>
    MIPS: only register FTLBPar exception handler for supported models

Jerry Crunchtime <jerry.c.t@web.de>
    libbpf: Fix register in PT_REGS MIPS macros

Jonathan Marek <jonathan@marek.ca>
    drm/msm/dpu: don't use INTF_INPUT_CTRL feature on sdm845

Wang Hai <wanghai38@huawei.com>
    net: ll_temac: Use devm_platform_ioremap_resource_byname()

Charles Keepax <ckeepax@opensource.cirrus.com>
    ASoC: soc-core: Fix regression causing sysfs entries to disappear

Jerome Brunet <jbrunet@baylibre.com>
    ASoC: meson: axg-tdm-formatters: fix sclk inversion

Jerome Brunet <jbrunet@baylibre.com>
    ASoC: meson: axg-tdmin: fix g12a skew

Jerome Brunet <jbrunet@baylibre.com>
    ASoC: meson: axg-tdm-interface: fix link fmt setup

Xi Wang <wangxi11@huawei.com>
    RDMA/hns: Fix the unneeded process when getting a general type of CQE error

Lang Cheng <chenglang@huawei.com>
    RDMA/hns: Fix error during modify qp RTS2RTS

Sandipan Das <sandipan@linux.ibm.com>
    selftests/powerpc: Fix online CPU selection

Nathan Lynch <nathanl@linux.ibm.com>
    powerpc/pseries/hotplug-cpu: Remove double free in error path

Sven Auhagen <sven.auhagen@voleatech.de>
    cpufreq: ap806: fix cpufreq driver needs ap cpu clk

Hanjun Guo <guohanjun@huawei.com>
    PCI: Release IVRS table in AMD ACS quirk

Mark Zhang <markz@mellanox.com>
    RDMA/netlink: Remove CAP_NET_RAW check when dump a raw QP

Jack Wang <jinpu.wang@cloud.ionos.com>
    RDMA/rtrs: remove WQ_MEM_RECLAIM for rtrs_wq

Danil Kipnis <danil.kipnis@cloud.ionos.com>
    RDMA/rtrs-clt: add an additional random 8 seconds before reconnecting

Tiezhu Yang <yangtiezhu@loongson.cn>
    nvmem: sprd: Fix return value of sprd_efuse_probe()

Harish <harish@linux.ibm.com>
    selftests/powerpc: Fix CPU affinity for child process

Michael Ellerman <mpe@ellerman.id.au>
    powerpc/boot: Fix CONFIG_PPC_MPC52XX references

Michael Ellerman <mpe@ellerman.id.au>
    powerpc/32s: Fix CONFIG_BOOK3S_601 uses

Oliver O'Halloran <oohall@gmail.com>
    selftests/powerpc: Squash spurious errors due to device removal

Darrick J. Wong <darrick.wong@oracle.com>
    xfs: clear XFS_DQ_FREEING if we can't lock the dquot buffer to flush

Brian Foster <bfoster@redhat.com>
    xfs: fix inode allocation block res calculation precedence

Linus Walleij <linus.walleij@linaro.org>
    net: dsa: rtl8366: Fix VLAN set-up

Linus Walleij <linus.walleij@linaro.org>
    net: dsa: rtl8366: Fix VLAN semantics

Venkata Lakshmi Narayana Gubba <gubbaven@codeaurora.org>
    Bluetooth: hci_qca: Stop collecting memdump again for command timeout during SSR

Abhishek Pandit-Subedi <abhishekpandit@chromium.org>
    Bluetooth: Fix suspend notifier race

Andrii Nakryiko <andriin@fb.com>
    bpf: Fix bpf_ringbuf_output() signature to return long

Nicolas Boichat <drinkcat@chromium.org>
    Bluetooth: hci_serdev: Only unregister device if it was registered

Nicolas Boichat <drinkcat@chromium.org>
    Bluetooth: hci_h5: Set HCI_UART_RESET_ON_INIT to correct flags

Ismael Ferreras Morezuelas <swyterzone@gmail.com>
    Bluetooth: btusb: Fix and detect most of the Chinese Bluetooth controllers

Tom Rix <trix@redhat.com>
    power: supply: check if calc_soc succeeded in pm860x_init_battery

Dan Carpenter <dan.carpenter@oracle.com>
    Smack: prevent underflow in smk_set_cipso()

Dan Carpenter <dan.carpenter@oracle.com>
    Smack: fix another vsscanf out of bounds

Li Heng <liheng40@huawei.com>
    RDMA/core: Fix return error value in _ib_modify_qp() to negative

Kishon Vijay Abraham I <kishon@ti.com>
    PCI: cadence: Fix updating Vendor ID and Subsystem Vendor ID register

Kishon Vijay Abraham I <kishon@ti.com>
    PCI: cadence: Fix cdns_pcie_{host|ep}_setup() error path

Wei Hu <weh@microsoft.com>
    PCI: hv: Fix a timing issue which causes kdump to fail occasionally

Michael Walle <michael@walle.cc>
    gpio: regmap: fix type clash

Finn Thain <fthain@telegraphics.com.au>
    macintosh/via-macii: Access autopoll_devs when inside lock

Ravi Bangoria <ravi.bangoria@linux.ibm.com>
    powerpc/watchpoint: Fix DAWR exception for CACHEOP

Ravi Bangoria <ravi.bangoria@linux.ibm.com>
    powerpc/watchpoint: Fix DAWR exception constraint

Ravi Bangoria <ravi.bangoria@linux.ibm.com>
    powerpc/watchpoint: Fix 512 byte boundary limit

Yonghong Song <yhs@fb.com>
    bpf: Fix pos computation for bpf_iter seq_ops->start()

Chris Packham <chris.packham@alliedtelesis.co.nz>
    net: dsa: mv88e6xxx: MV88E6097 does not support jumbo configuration

Ye Bin <yebin10@huawei.com>
    scsi: core: Add missing scsi_device_put() in scsi_host_block()

Finn Thain <fthain@telegraphics.com.au>
    scsi: mesh: Fix panic after host or bus reset

Tomas Henzl <thenzl@redhat.com>
    scsi: megaraid_sas: Clear affinity hint

Ruslan Bilovol <ruslan.bilovol@gmail.com>
    usb: gadget: f_uac2: fix AC Interface Header Descriptor wTotalLength

Marek Szyprowski <m.szyprowski@samsung.com>
    usb: dwc2: Fix error path in gadget registration

Dan Robertson <dan@dlrobertson.com>
    usb: dwc3: meson-g12a: fix shared reset control use

Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
    thermal: int340x: processor_thermal: fix: update Jasper Lake PCI id

Yu Kuai <yukuai3@huawei.com>
    MIPS: OCTEON: add missing put_device() call in dwc3_octeon_device_init()

Dinghao Liu <dinghao.liu@zju.edu.cn>
    PCI: rcar: Fix runtime PM imbalance on error

Christoph Hellwig <hch@lst.de>
    powerpc/spufs: Fix the type of ret in spufs_arch_write_note

Kai Vehmanen <kai.vehmanen@linux.intel.com>
    ASoC: hdac_hda: fix deadlock after PCM open error

Yuval Basson <ybason@marvell.com>
    qed: Fix ILT and XRCD bitmap memory leaks

Dan Murphy <dmurphy@ti.com>
    ASoC: tas2770: Fix reset gpio property name

YueHaibing <yuehaibing@huawei.com>
    tools/bpftool: Fix error handing in do_skeleton()

Ilya Leoshkevich <iii@linux.ibm.com>
    s390/bpf: Tolerate not converging code shrinking

Ilya Leoshkevich <iii@linux.ibm.com>
    s390/bpf: Use brcl for jumping to exit_ip if necessary

Ilya Leoshkevich <iii@linux.ibm.com>
    s390/bpf: Fix sign extension in branch_ku

Russell King <rmk+kernel@armlinux.org.uk>
    phy: armada-38x: fix NETA lockup when repeatedly switching speeds

Lorenzo Bianconi <lorenzo@kernel.org>
    mt76: mt7615: fix possible memory leak in mt7615_mcu_wtbl_sta_add

Ryder Lee <ryder.lee@mediatek.com>
    mt76: mt7915: add missing CONFIG_MAC80211_DEBUGFS

Dan Carpenter <dan.carpenter@oracle.com>
    mt76: mt7915: potential array overflow in mt7915_mcu_tx_rate_report()

Sean Wang <sean.wang@mediatek.com>
    mt76: mt7615: fix potential memory leak in mcu message handler

Sean Wang <sean.wang@mediatek.com>
    mt76: mt7663u: fix potential memory leak in mcu message handler

Sean Wang <sean.wang@mediatek.com>
    mt76: mt7663u: fix memory leak in set key

Madhavan Srinivasan <maddy@linux.ibm.com>
    powerpc/perf: Fix missing is_sier_aviable() during build

Suzuki K Poulose <suzuki.poulose@arm.com>
    coresight: etm4x: Fix save/restore during cpu idle

Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
    coresight: tmc: Fix TMC mode read in tmc_read_unprepare_etb()

Mike Leach <mike.leach@linaro.org>
    coresight: etmv4: Counter values not saved on disable

Mike Leach <mike.leach@linaro.org>
    coresight: etmv4: Fix resource selector constant

Dan Carpenter <dan.carpenter@oracle.com>
    thermal: ti-soc-thermal: Fix reversed condition in ti_thermal_expose_sensor()

Kars Mulder <kerneldev@karsmulder.nl>
    usb: core: fix quirks_param_set() writing to a const pointer

Taniya Das <tdas@codeaurora.org>
    clk: qcom: gcc: Make disp gpll0 branch aon for sc7180/sdm845

Johan Hovold <johan@kernel.org>
    USB: serial: iuu_phoenix: fix led-activity helpers

Tiezhu Yang <yangtiezhu@loongson.cn>
    PCI: loongson: Use DECLARE_PCI_FIXUP_EARLY for bridge_class_quirk()

Hauke Mehrtens <hauke@hauke-m.de>
    spi: lantiq-ssc: Fix warning by using WQ_MEM_RECLAIM

Steve Longerbeam <slongerbeam@gmail.com>
    gpu: ipu-v3: Restore RGB32, BGR32

Marco Felsch <m.felsch@pengutronix.de>
    drm/imx: tve: fix regulator_disable error path

Philipp Zabel <p.zabel@pengutronix.de>
    drm/imx: fix use after free

Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
    powerpc/book3s64/pkeys: Use PVR check instead of cpu feature

Bharata B Rao <bharata@linux.ibm.com>
    powerpc/mm/radix: Free PUD table when freeing pagetable

Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
    phy: renesas: rcar-gen3-usb2: move irq registration to init

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    media: s5p-g2d: Fix a memory leak in an error handling path in 'g2d_probe()'

Oliver Neukum <oneukum@suse.com>
    go7007: add sanity checking for endpoints

Xiongfeng Wang <wangxiongfeng2@huawei.com>
    PCI/ASPM: Add missing newline in sysfs 'policy'

Jing Xiangfeng <jingxiangfeng@huawei.com>
    ASoC: meson: fixes the missed kfree() for axg_card_add_tdm_loopback

Colin Ian King <colin.king@canonical.com>
    staging: rtl8192u: fix a dubious looking mask before a shift

Tyler Hicks <tyhicks@linux.microsoft.com>
    ima: Fail rule parsing when the KEY_CHECK hook is combined with an invalid cond

Tyler Hicks <tyhicks@linux.microsoft.com>
    ima: Fail rule parsing when the KEXEC_CMDLINE hook is combined with an invalid cond

Tyler Hicks <tyhicks@linux.microsoft.com>
    ima: Fail rule parsing when buffer hook functions have an invalid action

Tyler Hicks <tyhicks@linux.microsoft.com>
    ima: Free the entire rule if it fails to parse

Tyler Hicks <tyhicks@linux.microsoft.com>
    ima: Free the entire rule when deleting a list of rules

Tyler Hicks <tyhicks@linux.microsoft.com>
    ima: Have the LSM free its audit rule

Mikhail Malygin <m.malygin@yadro.com>
    RDMA/rxe: Prevent access to wr->next ptr afrer wr is posted to send queue

Michal Kalderon <michal.kalderon@marvell.com>
    RDMA/qedr: Add EDPM max size to alloc ucontext response

Michal Kalderon <michal.kalderon@marvell.com>
    RDMA/qedr: Add EDPM mode type for user-fw compatibility

Yuval Basson <ybason@marvell.com>
    RDMA/qedr: SRQ's bug fixes

Patrick Steinhardt <ps@pks.im>
    Bluetooth: Fix update of connection state in `hci_encrypt_cfm`

Milton Miller <miltonm@us.ibm.com>
    powerpc/vdso: Fix vdso cpu truncation

Nathan Lynch <nathanl@linux.ibm.com>
    powerpc/rtas: don't online CPUs for partition suspend

Nathan Lynch <nathanl@linux.ibm.com>
    powerpc/pseries: remove cede offline state for CPUs

Amir Goldstein <amir73il@gmail.com>
    kernfs: do not call fsnotify() with name without a parent

Dan Carpenter <dan.carpenter@oracle.com>
    mwifiex: Prevent memory corruption handling keys

Alexei Starovoitov <ast@kernel.org>
    bpfilter: Initialize pos variable

John Garry <john.garry@huawei.com>
    scsi: scsi_debug: Add check for sdebug_max_queue during module init

Tom Rix <trix@redhat.com>
    drm/bridge: sil_sii8620: initialize return of sii8620_readb

Chuhong Yuan <hslester96@gmail.com>
    mmc: sdhci-of-arasan: Add missed checks for devm_clk_register()

Marek Szyprowski <m.szyprowski@samsung.com>
    phy: exynos5-usbdrd: Calibrating makes sense only for USB2.0 PHY

Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
    dt-bindings: phy: uniphier: Fix incorrect clocks and clock-names for PXs3 usb3-hsphy

Peter Chen <peter.chen@nxp.com>
    phy: cadence: salvo: fix wrong bit definition

Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
    drm: panel: simple: Fix bpc for LG LB070WV8 panel

Kai-Heng Feng <kai.heng.feng@canonical.com>
    leds: core: Flush scheduled work for system suspend

Heikki Krogerus <heikki.krogerus@linux.intel.com>
    kobject: Avoid premature parent object freeing in kobject_cleanup()

Marek Vasut <marex@denx.de>
    drm/stm: repair runtime power management

Daniel T. Lee <danieltimlee@gmail.com>
    samples: bpf: Fix bpf programs with kprobe/sys_connect event

Bjorn Helgaas <bhelgaas@google.com>
    PCI: Fix pci_cfg_wait queue locking problem

Zhu Yanjun <yanjunz@mellanox.com>
    RDMA/rxe: Skip dgid check in loopback mode

Andreas Gruenbacher <agruenba@redhat.com>
    iomap: Make sure iomap_end is called after iomap_begin

Darrick J. Wong <darrick.wong@oracle.com>
    xfs: fix reflink quota reservation accounting error

Darrick J. Wong <darrick.wong@oracle.com>
    xfs: don't eat an EIO/ENOSPC writeback error when scrubbing data fork

Brian Foster <bfoster@redhat.com>
    xfs: preserve rmapbt swapext block reservation from freed blocks

Dariusz Marcinkiewicz <darekm@google.com>
    media: cros-ec-cec: do not bail on device_init_wakeup failure

Chuhong Yuan <hslester96@gmail.com>
    media: exynos4-is: Add missed check for pinctrl_lookup_state()

Chuhong Yuan <hslester96@gmail.com>
    media: tvp5150: Add missed media_entity_cleanup()

Helen Koike <helen.koike@collabora.com>
    media: staging: rkisp1: rsz: fix resolution limitation on sink pad

Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
    media: staging: rkisp1: rsz: supported formats are the isp's src formats, not sink formats

Dan Carpenter <dan.carpenter@oracle.com>
    media: allegro: Fix some NULL vs IS_ERR() checks in probe

Dan Carpenter <dan.carpenter@oracle.com>
    media: firewire: Using uninitialized values in node_probe()

Julian Anastasov <ja@ssi.bg>
    ipvs: allow connection reuse for unconfirmed conntrack

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    scsi: eesox: Fix different dev_id between request_irq() and free_irq()

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    scsi: powertec: Fix different dev_id between request_irq() and free_irq()

Jason Gunthorpe <jgg@nvidia.com>
    RDMA/core: Fix bogus WARN_ON during ib_unregister_device_queued()

Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    dma-buf: fix dma-fence-chain out of order test

Tony Nguyen <anthony.l.nguyen@intel.com>
    iavf: Fix updating statistics

Wei Yongjun <weiyongjun1@huawei.com>
    iavf: fix error return code in iavf_init_get_resources()

Phil Elwell <phil@raspberrypi.com>
    staging: vchiq_arm: Add a matching unregister call

Colin Ian King <colin.king@canonical.com>
    drm/radeon: fix array out-of-bounds read and write issues

Colin Ian King <colin.king@canonical.com>
    drm/amdgpu: ensure 0 is returned for success in jpeg_v2_5_wait_for_idle

Chen Tao <chentao107@huawei.com>
    drm/amdgpu/debugfs: fix memory leak when amdgpu_virt_enable_access_debugfs failed

Bart Van Assche <bvanassche@acm.org>
    scsi: qla2xxx: Make __qla2x00_alloc_iocbs() initialize 32 bits of request_t.handle

Steven Rostedt (VMware) <rostedt@goodmis.org>
    tracing: Move pipe reference to trace array instead of current_tracer

Grygorii Strashko <grygorii.strashko@ti.com>
    net: ethernet: ti: am65-cpsw-nuss: restore vlan configuration while down/up

Kees Cook <keescook@chromium.org>
    lkdtm: Make arch-specific tests always available

Kees Cook <keescook@chromium.org>
    selftests/lkdtm: Reset WARN_ONCE to avoid false negatives

Kees Cook <keescook@chromium.org>
    lkdtm: Avoid more compiler optimizations for bad writes

Wang Hai <wanghai38@huawei.com>
    cxl: Fix kobject memleak

Emil Velikov <emil.velikov@collabora.com>
    drm/mipi: use dcs write for mipi_dsi_dcs_set_tear_scanline

Stanley Chu <stanley.chu@mediatek.com>
    scsi: ufs: Disable WriteBooster capability for non-supported UFS devices

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    scsi: cumana_2: Fix different dev_id between request_irq() and free_irq()

Mark Starovoytov <mstarovoitov@marvell.com>
    net: atlantic: MACSec offload statistics checkpatch fix

Fred Oh <fred.oh@linux.intel.com>
    ASoC: Intel: Boards: cml_rt1011_rt5682: use statically define codec config

Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
    ASoC: Intel: bxt_rt298: add missing .owner field

Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
    ASoC: Intel: sof_sdw: add missing .owner field

Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
    ASoC: Intel: cml_rt1011_rt5682: add missing .owner field

Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
    ASoC: SOF: nocodec: add missing .owner field

Ioana Ciornei <ioana.ciornei@nxp.com>
    dpaa2-eth: fix condition for number of buffer acquire retries

Colin Ian King <colin.king@canonical.com>
    staging: most: avoid null pointer dereference when iface is null

Chuhong Yuan <hslester96@gmail.com>
    media: omap3isp: Add missed v4l2_ctrl_handler_free() for preview_init_entities()

Chuhong Yuan <hslester96@gmail.com>
    media: marvell-ccic: Add missed v4l2_async_notifier_cleanup()

Arnd Bergmann <arnd@arndb.de>
    media: cxusb-analog: fix V4L2 dependency

Sean Wang <sean.wang@mediatek.com>
    Bluetooth: btmtksdio: fix up firmware download sequence

Sean Wang <sean.wang@mediatek.com>
    Bluetooth: btusb: fix up firmware download sequence

Shengjiu Wang <shengjiu.wang@nxp.com>
    ASoC: fsl_easrc: Fix uninitialized scalar variable in fsl_easrc_set_ctx_format

Arnd Bergmann <arnd@arndb.de>
    leds: lm355x: avoid enum conversion warning

Christophe Leroy <christophe.leroy@csgroup.eu>
    powerpc/fixmap: Fix FIX_EARLY_DEBUG_BASE when page size is 256k

Joe Perches <joe@perches.com>
    powerpc/mm: Fix typo in IS_ENABLED()

Álvaro Fernández Rojas <noltari@gmail.com>
    clk: bcm63xx-gate: fix last clock availability

Colin Ian King <colin.king@canonical.com>
    drm/arm: fix unintentional integer overflow on left shift

Steven Price <steven.price@arm.com>
    drm/panfrost: Fix inbalance of devfreq record_busy/idle()

Lubomir Rintel <lkundrak@v3.sk>
    drm/etnaviv: Fix error path on failure to enable bus clk

Stanley Chu <stanley.chu@mediatek.com>
    scsi: ufs: Fix imprecise load calculation in devfreq window

Chuhong Yuan <hslester96@gmail.com>
    iio: amplifiers: ad8366: Change devm_gpiod_get() to optional and add the missed check

Tomasz Duszynski <tomasz.duszynski@octakon.com>
    iio: improve IIO_CONCENTRATION channel type description

Balakrishna Godavarthi <bgodavar@codeaurora.org>
    Bluetooth: hci_qca: Increase SoC idle timeout to 200ms

Venkata Lakshmi Narayana Gubba <gubbaven@codeaurora.org>
    Bluetooth: hci_qca: Bug fix during SSR timeout

Evan Green <evgreen@chromium.org>
    ath10k: Acquire tx_lock in tx error paths

Abhishek Pandit-Subedi <abhishekpandit@chromium.org>
    Bluetooth: Allow suspend even when preparation has failed

Matthias Kaehlcke <mka@chromium.org>
    Bluetooth: hci_qca: Only remove TX clock vote after TX is completed

Nirmoy Das <nirmoy.aiemd@gmail.com>
    drm/mm: fix hole size comparison

Dan Carpenter <dan.carpenter@oracle.com>
    Bluetooth: hci_qca: Fix an error pointer dereference

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    video: pxafb: Fix the function used to balance a 'dma_alloc_coherent()' call

Dejin Zheng <zhengdejin5@gmail.com>
    console: newport_con: fix an issue about leak related system resources

Dejin Zheng <zhengdejin5@gmail.com>
    video: fbdev: sm712fb: fix an issue about iounmap for a wrong address

Pali Rohár <pali@kernel.org>
    btmrvl: Fix firmware filename for sd8997 chipset

Pali Rohár <pali@kernel.org>
    btmrvl: Fix firmware filename for sd8977 chipset

Pali Rohár <pali@kernel.org>
    mwifiex: Fix firmware filename for sd8997 chipset

Pali Rohár <pali@kernel.org>
    mwifiex: Fix firmware filename for sd8977 chipset

Qiushi Wu <wu000273@umn.edu>
    agp/intel: Fix a memory leak on module initialisation failure

Emil Velikov <emil.velikov@collabora.com>
    drm/amdgpu: use the unlocked drm_gem_object_put

Douglas Anderson <dianders@chromium.org>
    drm/bridge: ti-sn65dsi86: Fix off-by-one error in clock choice

Douglas Anderson <dianders@chromium.org>
    drm/bridge: ti-sn65dsi86: Clear old error bits before AUX transfers

Dan Carpenter <dan.carpenter@oracle.com>
    drm/gem: Fix a leak in drm_gem_objects_lookup()

Rob Clark <robdclark@chromium.org>
    drm/msm: ratelimit crtc event overflow error

Horia Geantă <horia.geanta@nxp.com>
    crypto: caam - silence .setkey in case of bad key length

Pavel Begunkov <asml.silence@gmail.com>
    io_uring: fix stalled deferred requests

Pavel Begunkov <asml.silence@gmail.com>
    io_uring: fix racy overflow count reporting

Erik Kaneda <erik.kaneda@intel.com>
    ACPICA: Do not increment operation_region reference counts for field units

Qu Wenruo <wqu@suse.com>
    btrfs: qgroup: free per-trans reserved space when a subvolume gets dropped

Qu Wenruo <wqu@suse.com>
    btrfs: allow btrfs_truncate_block() to fallback to nocow for data space reservation

Coly Li <colyli@suse.de>
    bcache: fix super block seq numbers comparision in register_cache_set()

Jim Cromie <jim.cromie@gmail.com>
    dyndbg: fix a BUG_ON in ddebug_describe_flags

Danesh Petigara <danesh.petigara@broadcom.com>
    usb: bdc: Halt controller on suspend

Sasi Kumar <sasi.kumar@broadcom.com>
    bdc: Fix bug causing crash after multiple disconnects

Evgeny Novikov <novikov@ispras.ru>
    usb: gadget: net2280: fix memory leak on probe error handling paths

shirley her <shirley.her@bayhubtech.com>
    mmc: sdhci-pci-o2micro: Bug fix for O2 host controller Seabird1

Nick Desaulniers <ndesaulniers@google.com>
    x86/uaccess: Make __get_user_size() Clang compliant on 32-bit

Shannon Nelson <snelson@pensando.io>
    ionic: update eid test for overflow

Evan Quan <evan.quan@amd.com>
    drm/amd/powerplay: suppress compile error around BUG_ON

Dmitry Osipenko <digetx@gmail.com>
    gpu: host1x: debug: Fix multiple channels emitting messages simultaneously

Bolarinwa Olayemi Saheed <refactormyself@gmail.com>
    iwlegacy: Check the return value of pcie_capability_read_*()

Armas Spann <zappel@retarded.farm>
    platform/x86: asus-nb-wmi: add support for ASUS ROG Zephyrus G14 and G15

Wright Feng <wright.feng@cypress.com>
    brcmfmac: set state of hanger slot to FREE when flushing PSQ

Prasanna Kerekoppa <prasanna.kerekoppa@cypress.com>
    brcmfmac: To fix Bss Info flag definition Bug

Wright Feng <wright.feng@cypress.com>
    brcmfmac: keep SDIO watchdog running when console_interval is non-zero

Venkata Lakshmi Narayana Gubba <gubbaven@codeaurora.org>
    Bluetooth: hci_qca: Bug fixes for SSR

Wenbo Zhang <ethercflow@gmail.com>
    bpf: Fix fds_example SIGSEGV error

Evan Quan <evan.quan@amd.com>
    drm/amd/powerplay: fix compile error with ARCH=arc

Wenjing Liu <wenjing.liu@amd.com>
    drm/amd/display: allow query ddc data over aux to be read only operation

Alex Deucher <alexander.deucher@amd.com>
    drm/amdgpu/display: properly guard the calls to swSMU functions

Alex Deucher <alexander.deucher@amd.com>
    drm/amdgpu/display bail early in dm_pp_get_static_clocks

Alex Deucher <alexander.deucher@amd.com>
    drm/amdgpu/debugfs: fix ref count leak when pm_runtime_get_sync fails

Aric Cyr <aric.cyr@amd.com>
    drm/amd/display: Improve DisplayPort monitor interop

Paul E. McKenney <paulmck@kernel.org>
    mm/mmap.c: Add cond_resched() for exit_mmap() CPU stalls

Bartosz Golaszewski <bgolaszewski@baylibre.com>
    irqchip/irq-mtk-sysirq: Replace spinlock with raw_spinlock

Antoine Tenart <antoine.tenart@bootlin.com>
    net: phy: mscc: restore the base page in vsc8514/8584_config_init

Christian König <christian.koenig@amd.com>
    drm/radeon: disable AGP by default

Michael Tretter <m.tretter@pengutronix.de>
    drm/debugfs: fix plain echo to connector "force" attribute

Akhil P Oommen <akhilpo@codeaurora.org>
    drm/msm: Fix a null pointer access in msm_gem_shrinker_count()

Akhil P Oommen <akhilpo@codeaurora.org>
    drm: msm: a6xx: fix gpu failure after system resume

Chunfeng Yun <chunfeng.yun@mediatek.com>
    usb: mtu3: clear dual mode of u3port when disable device

Josef Bacik <josef@toxicpanda.com>
    btrfs: fix lockdep splat from btrfs_dump_space_info

Masahiro Yamada <yamada.masahiro@socionext.com>
    mmc: sdhci-cadence: do not use hardware tuning for SD mode

Aditya Pakki <pakki001@umn.edu>
    drm/nouveau: fix multiple instances of reference count leaks

Aditya Pakki <pakki001@umn.edu>
    drm/nouveau: fix reference count leak in nouveau_debugfs_strap_peek

Krzysztof Kozlowski <krzk@kernel.org>
    memory: samsung: exynos5422-dmc: Do not ignore return code of regmap_read()

Shannon Nelson <snelson@pensando.io>
    ionic: rearrange reset and bus-master control

Navid Emamdoost <navid.emamdoost@gmail.com>
    drm/etnaviv: fix ref count leak via pm_runtime_get_sync

Ricardo Cañuelo <ricardo.canuelo@collabora.com>
    arm64: dts: hisilicon: hikey: fixes to comply with adi, adv7533 DT binding

Lyude Paul <lyude@redhat.com>
    drm/nouveau/kms/nv50-: Fix disabling dithering

Aaron Ma <aaron.ma@canonical.com>
    rtw88: 8822ce: add support for device ID 0xc82f

Zhao Heming <heming.zhao@suse.com>
    md-cluster: fix wild pointer of unlock_all_bitmaps()

Tony Lindgren <tony@atomide.com>
    bus: ti-sysc: Add missing quirk flags for usb_host_hs

Evgeny Novikov <novikov@ispras.ru>
    video: fbdev: neofb: fix memory leak in neo_scan_monitor()

Evgeny Novikov <novikov@ispras.ru>
    video: fbdev: savage: fix memory leak on error handling path in probe

Sedat Dilek <sedat.dilek@gmail.com>
    crypto: aesni - Fix build with LLVM_IAS=1

Aditya Pakki <pakki001@umn.edu>
    drm/radeon: Fix reference count leaks caused by pm_runtime_get_sync

Jack Xiao <Jack.Xiao@amd.com>
    drm/amdgpu: avoid dereferencing a NULL pointer

Paul E. McKenney <paulmck@kernel.org>
    fs/btrfs: Add cond_resched() for try_release_extent_mapping() stalls

Pavel Begunkov <asml.silence@gmail.com>
    io_uring: fix req->work corruption

Luis Chamberlain <mcgrof@kernel.org>
    loop: be paranoid on exit and prevent new additions / removals

Lihong Kou <koulihong@huawei.com>
    Bluetooth: add a mutex lock to avoid UAF in do_enale_set

Guillaume Tucker <guillaume.tucker@collabora.com>
    ARM: exynos: clear L310_AUX_CTRL_FULL_LINE_ZERO in default l2c_aux_val

Vladimir Oltean <vladimir.oltean@nxp.com>
    net: mscc: ocelot: fix encoding destination ports into multicast IPv4 address

Maulik Shah <mkshah@codeaurora.org>
    soc: qcom: rpmh-rsc: Set suppress_bind_attrs flag

Tomi Valkeinen <tomi.valkeinen@ti.com>
    drm/tilcdc: fix leak & null ref in panel_connector_get_modes

Johannes Thumshirn <johannes.thumshirn@wdc.com>
    block: don't do revalidate zones on invalid devices

Huacai Chen <chenhc@lemote.com>
    irqchip/loongson-pch-pic: Fix the misused irq flow handler

Hannes Reinecke <hare@suse.de>
    nvme-multipath: do not fall back to __nvme_find_path() for non-optimized paths

Martin Wilck <mwilck@suse.com>
    nvme-multipath: fix logic for non-optimized paths

Sagi Grimberg <sagi@grimberg.me>
    nvme-rdma: fix controller reset hang during traffic

Sagi Grimberg <sagi@grimberg.me>
    nvme-tcp: fix controller reset hang during traffic

Zenghui Yu <yuzenghui@huawei.com>
    irqchip/gic-v4.1: Use GFP_ATOMIC flag in allocate_vpe_l1_table()

Florian Fainelli <f.fainelli@gmail.com>
    irqchip/irq-bcm7038-l1: Guard uses of cpu_logical_map

Brendan Higgins <brendanhiggins@google.com>
    kunit: tool: fix improper treatment of file location

Brendan Higgins <brendanhiggins@google.com>
    kunit: tool: fix broken default args in unit tests

Tiezhu Yang <yangtiezhu@loongson.cn>
    irqchip/loongson-liointc: Fix potential dead lock

Tiezhu Yang <yangtiezhu@loongson.cn>
    irqchip/loongson-pch-pic: Check return value of irq_domain_translate_twocell()

Tiezhu Yang <yangtiezhu@loongson.cn>
    irqchip/loongson-htvec: Check return value of irq_domain_translate_onecell()

Tiezhu Yang <yangtiezhu@loongson.cn>
    irqchip/loongson-htvec: Fix potential resource leak

Colin Ian King <colin.king@canonical.com>
    md: raid0/linear: fix dereference before null check on pointer mddev

Kees Cook <keescook@chromium.org>
    seccomp: Fix ioctl number for SECCOMP_IOCTL_NOTIF_ID_VALID

Tiezhu Yang <yangtiezhu@loongson.cn>
    irqchip/ti-sci-inta: Fix return value about devm_ioremap_resource()

Stephen Smalley <stephen.smalley.work@gmail.com>
    scripts/selinux/mdp: fix initial SID handling

Chengming Zhou <zhouchengming@bytedance.com>
    iocost: Fix check condition of iocg abs_vdebt

Yu Kuai <yukuai3@huawei.com>
    ARM: socfpga: PM: add missing put_device() call in socfpga_setup_ocram_self_refresh()

Jon Lin <jon.lin@rock-chips.com>
    spi: rockchip: Fix error in SPI slave pio read

Sibi Sankar <sibis@codeaurora.org>
    soc: qcom: pdr: Reorder the PD state indication ack

Christian Hewitt <christianshewitt@gmail.com>
    arm64: dts: meson: fix mmc0 tuning error on Khadas VIM3

Christian Hewitt <christianshewitt@gmail.com>
    arm64: dts: meson: misc fixups for w400 dtsi

Dmitry Vyukov <dvyukov@google.com>
    io_uring: fix sq array offset calculation

Vladimir Zapolskiy <vz@mleia.com>
    regulator: fix memory leak on error path of regulator_register()

Gregory Herrero <gregory.herrero@oracle.com>
    recordmcount: only record relocation of type R_AARCH64_CALL26 on arm64.

Tyler Hicks <tyhicks@linux.microsoft.com>
    tpm: Require that all digests are present in TCG_PCR_EVENT2 structures

Arnd Bergmann <arnd@arndb.de>
    crypto: x86/crc32c - fix building with clang ias

Dilip Kota <eswara.kota@linux.intel.com>
    spi: lantiq: fix: Rx overflow error in full duplex mode

Serge Semin <Sergey.Semin@baikalelectronics.ru>
    spi: dw-dma: Fix Tx DMA channel working too fast

Patrick Delaunay <patrick.delaunay@st.com>
    ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl

Chen-Yu Tsai <wens@csie.org>
    ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages

Chen-Yu Tsai <wens@csie.org>
    ARM: dts: sunxi: bananapi-m2-plus-v1.2: Add regulator supply to all CPU cores

Alexandre Belloni <alexandre.belloni@bootlin.com>
    ARM: dts: at91: sama5d3_xplained: change phy-mode

Dejin Zheng <zhengdejin5@gmail.com>
    reset: intel: fix a compile warning about REG_OFFSET redefined

Marek Szyprowski <m.szyprowski@samsung.com>
    ARM: dts: exynos: Disable frequency scaling for FSYS bus on Odroid XU3 family

yu kuai <yukuai3@huawei.com>
    ARM: at91: pm: add missing put_device() call in at91_pm_sram_init()

Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
    ARM: dts: gose: Fix ports node name for adv7612

Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
    arm64: dts: renesas: Fix SD Card/eMMC interface device node names

Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
    ARM: dts: gose: Fix ports node name for adv7180

Lu Wei <luwei32@huawei.com>
    platform/x86: intel-vbtn: Fix return value check in check_acpi_dev()

Lu Wei <luwei32@huawei.com>
    platform/x86: intel-hid: Fix return value check in check_acpi_dev()

Finn Thain <fthain@telegraphics.com.au>
    m68k: mac: Fix IOP status/control register writes

Finn Thain <fthain@telegraphics.com.au>
    m68k: mac: Don't send IOP message until channel is idle

Sudeep Holla <sudeep.holla@arm.com>
    clk: scmi: Fix min and max rate when registering clocks with discrete rates

Giovanni Cabiddu <giovanni.cabiddu@intel.com>
    crypto: qat - allow xts requests not multiple of block

Qais Yousef <qais.yousef@arm.com>
    sched/uclamp: Fix initialization of struct uclamp_rq

Alim Akhtar <alim.akhtar@samsung.com>
    arm64: dts: exynos: Fix silent hang after boot on Espresso

Ondrej Jirman <megous@megous.com>
    arm64: dts: sun50i-pinephone: dldo4 must not be >= 1.8V

Cristian Marussi <cristian.marussi@arm.com>
    firmware: arm_scmi: Fix SCMI genpd domain probing

Uladzislau Rezki (Sony) <urezki@gmail.com>
    rcu/tree: Repeat the monitor if any free channel is busy

Marek Szyprowski <m.szyprowski@samsung.com>
    ARM: exynos: MCPM: Restore big.LITTLE cpuidle support

Gilad Ben-Yossef <gilad@benyossef.com>
    crypto: ccree - fix resource leak on error path

Douglas Anderson <dianders@chromium.org>
    soc: qcom: rpmh-rsc: Don't use ktime for timeout in write_tcs_reg_sync()

Luis Chamberlain <mcgrof@kernel.org>
    blktrace: fix debugfs use after free

Christophe JAILLET <christophe.jaillet@wanadoo.fr>
    memory: tegra: Fix an error handling path in tegra186_emc_probe()

Stephan Gerhold <stephan@gerhold.net>
    arm64: dts: qcom: msm8916: Replace invalid bias-pull-none property

Herbert Xu <herbert@gondor.apana.org.au>
    crc-t10dif: Fix potential crypto notify dead-lock

Qiushi Wu <wu000273@umn.edu>
    EDAC: Fix reference count leaks

Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
    arm64: dts: rockchip: fix rk3399-puma gmac reset gpio

Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
    arm64: dts: rockchip: fix rk3399-puma vcc5v0-host gpio

Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
    arm64: dts: rockchip: fix rk3368-lion gmac reset gpio

Peng Liu <iwtbavbm@gmail.com>
    sched: correct SD_flags returned by tl->sd_flags()

Vincent Guittot <vincent.guittot@linaro.org>
    sched/fair: Fix NOHZ next idle balance

Giovanni Gherdovich <ggherdovich@suse.cz>
    x86, sched: Bail out of frequency invariance if turbo_freq/base_freq gives 0

Giovanni Gherdovich <ggherdovich@suse.cz>
    x86, sched: Bail out of frequency invariance if turbo frequency is unknown

Giovanni Gherdovich <ggherdovich@suse.cz>
    x86, sched: check for counters overflow in frequency invariant accounting

Kan Liang <kan.liang@linux.intel.com>
    perf/x86/intel/uncore: Fix oops when counting IMC uncore events on some TGL

Zhenzhong Duan <zhenzhong.duan@gmail.com>
    x86/mce/inject: Fix a wrong assignment of i_mce.status

Erwan Le Ray <erwan.leray@st.com>
    ARM: dts: stm32: fix uart7_pins_a comments in stm32mp15-pinctrl

Erwan Le Ray <erwan.leray@st.com>
    ARM: dts: stm32: fix uart nodes ordering in stm32mp15-pinctrl

Grant Likely <grant.likely@secretlab.ca>
    HID: input: Fix devices that return multiple bytes in battery report

Jens Axboe <axboe@kernel.dk>
    io_uring: abstract out task work running

Will Chen <chenwi@google.com>
    kunit: capture stderr on all make subprocess calls

Nick Desaulniers <ndesaulniers@google.com>
    tracepoint: Mark __tracepoint_string's __used


-------------

Diffstat:

 Documentation/ABI/testing/sysfs-bus-iio            |   3 +-
 Documentation/core-api/cpu_hotplug.rst             |   7 -
 .../phy/socionext,uniphier-usb3hs-phy.yaml         |   8 +-
 Makefile                                           |   4 +-
 arch/arm/boot/dts/at91-sama5d3_xplained.dts        |   2 +-
 arch/arm/boot/dts/exynos5422-odroid-core.dtsi      |   6 -
 arch/arm/boot/dts/exynos5800.dtsi                  |   6 +-
 arch/arm/boot/dts/r8a7793-gose.dts                 |   4 +-
 arch/arm/boot/dts/stm32mp15-pinctrl.dtsi           | 128 +++++------
 arch/arm/boot/dts/sunxi-bananapi-m2-plus-v1.2.dtsi |  18 +-
 arch/arm/kernel/stacktrace.c                       |  24 +++
 arch/arm/mach-at91/pm.c                            |  11 +-
 arch/arm/mach-exynos/exynos.c                      |   2 +-
 arch/arm/mach-exynos/mcpm-exynos.c                 |  10 +-
 arch/arm/mach-socfpga/pm.c                         |   8 +-
 .../boot/dts/allwinner/sun50i-a64-pinephone.dtsi   |   2 +-
 arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi   |   6 +-
 arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi |   1 -
 .../boot/dts/amlogic/meson-sm1-khadas-vim3l.dts    |   4 +
 arch/arm64/boot/dts/exynos/exynos7-espresso.dts    |   1 +
 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts  |  11 +
 arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts     |   2 +-
 arch/arm64/boot/dts/qcom/msm8916-pins.dtsi         |  10 +-
 arch/arm64/boot/dts/renesas/r8a774a1.dtsi          |   8 +-
 arch/arm64/boot/dts/renesas/r8a774b1.dtsi          |   8 +-
 arch/arm64/boot/dts/renesas/r8a774c0.dtsi          |   6 +-
 arch/arm64/boot/dts/renesas/r8a77951.dtsi          |   8 +-
 arch/arm64/boot/dts/renesas/r8a77960.dtsi          |   8 +-
 arch/arm64/boot/dts/renesas/r8a77961.dtsi          |   8 +-
 arch/arm64/boot/dts/renesas/r8a77965.dtsi          |   8 +-
 arch/arm64/boot/dts/renesas/r8a77990.dtsi          |   6 +-
 arch/arm64/boot/dts/renesas/r8a77995.dtsi          |   2 +-
 arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi      |   2 +-
 arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi      |   4 +-
 arch/m68k/mac/iop.c                                |  21 +-
 arch/mips/cavium-octeon/octeon-usb.c               |   5 +-
 arch/mips/include/asm/cpu-features.h               |   4 +
 arch/mips/include/asm/cpu.h                        |   1 +
 arch/mips/kernel/cpu-probe.c                       |  13 ++
 arch/mips/kernel/traps.c                           |   3 +-
 arch/mips/kvm/vz.c                                 |   2 +
 arch/mips/pci/pci-xtalk-bridge.c                   |   3 +
 arch/parisc/include/asm/barrier.h                  |  61 ++++++
 arch/parisc/include/asm/spinlock.h                 |  33 +--
 arch/parisc/kernel/entry.S                         |  48 +++--
 arch/parisc/kernel/syscall.S                       |  24 +--
 arch/powerpc/boot/Makefile                         |   2 +-
 arch/powerpc/boot/serial.c                         |   2 +-
 arch/powerpc/include/asm/fixmap.h                  |   2 +-
 arch/powerpc/include/asm/perf_event.h              |   2 +
 arch/powerpc/include/asm/ptrace.h                  |   2 +-
 arch/powerpc/include/asm/rtas.h                    |   2 -
 arch/powerpc/include/asm/timex.h                   |   2 +-
 arch/powerpc/kernel/hw_breakpoint.c                |  95 ++++++---
 arch/powerpc/kernel/rtas.c                         | 122 +----------
 arch/powerpc/kernel/vdso.c                         |   2 +-
 arch/powerpc/mm/book3s64/hash_utils.c              |   5 +-
 arch/powerpc/mm/book3s64/pkeys.c                   |  16 +-
 arch/powerpc/mm/book3s64/radix_pgtable.c           |  16 ++
 arch/powerpc/platforms/cell/spufs/coredump.c       |   2 +-
 arch/powerpc/platforms/pseries/hotplug-cpu.c       | 171 ++-------------
 arch/powerpc/platforms/pseries/offline_states.h    |  38 ----
 arch/powerpc/platforms/pseries/pmem.c              |   1 -
 arch/powerpc/platforms/pseries/smp.c               |  28 +--
 arch/powerpc/platforms/pseries/suspend.c           |  22 +-
 arch/s390/include/asm/topology.h                   |   6 -
 arch/s390/mm/gmap.c                                |  27 ++-
 arch/s390/net/bpf_jit_comp.c                       |  54 +++--
 arch/x86/crypto/aes_ctrby8_avx-x86_64.S            |  14 +-
 arch/x86/crypto/aesni-intel_asm.S                  |   6 +-
 arch/x86/crypto/crc32c-pcl-intel-asm_64.S          |   2 +-
 arch/x86/events/intel/uncore_snb.c                 |   3 +-
 arch/x86/include/asm/topology.h                    |   2 +-
 arch/x86/include/asm/uaccess.h                     |   5 +-
 arch/x86/kernel/apic/io_apic.c                     |   5 +
 arch/x86/kernel/cpu/mce/inject.c                   |   2 +-
 arch/x86/kernel/process_64.c                       |   2 +-
 arch/x86/kernel/smpboot.c                          |  50 ++++-
 arch/x86/kvm/svm/svm.c                             |   2 +-
 arch/x86/kvm/vmx/vmx.c                             |   2 +-
 arch/x86/kvm/x86.c                                 |  38 ++--
 arch/x86/kvm/x86.h                                 |   2 +-
 block/blk-iocost.c                                 |   2 +-
 block/blk-zoned.c                                  |   3 +
 drivers/acpi/acpica/exprep.c                       |   4 -
 drivers/acpi/acpica/utdelete.c                     |   6 +-
 drivers/base/dd.c                                  |   7 +-
 drivers/base/firmware_loader/fallback_platform.c   |   5 +-
 drivers/block/loop.c                               |   4 +
 drivers/bluetooth/btmrvl_sdio.c                    |   8 +-
 drivers/bluetooth/btmtksdio.c                      |  16 +-
 drivers/bluetooth/btusb.c                          |  90 +++++++-
 drivers/bluetooth/hci_h5.c                         |   2 +-
 drivers/bluetooth/hci_qca.c                        | 104 ++++++---
 drivers/bluetooth/hci_serdev.c                     |   3 +-
 drivers/bus/ti-sysc.c                              |   6 +-
 drivers/char/agp/intel-gtt.c                       |   4 +-
 drivers/char/tpm/tpm-chip.c                        |   9 +-
 drivers/char/tpm/tpm.h                             |   5 +-
 drivers/char/tpm/tpm2-space.c                      |  26 ++-
 drivers/char/tpm/tpmrm-dev.c                       |   2 +-
 drivers/clk/bcm/clk-bcm63xx-gate.c                 |   1 +
 drivers/clk/clk-scmi.c                             |  22 +-
 drivers/clk/qcom/gcc-sc7180.c                      |   2 +-
 drivers/clk/qcom/gcc-sdm845.c                      |   4 +-
 drivers/cpufreq/Kconfig.arm                        |   1 +
 drivers/cpufreq/armada-37xx-cpufreq.c              |   1 +
 drivers/cpufreq/cpufreq.c                          |  58 +++--
 drivers/crypto/caam/caamalg.c                      |   2 +-
 drivers/crypto/caam/caamalg_qi.c                   |   2 +-
 drivers/crypto/caam/caamalg_qi2.c                  |   2 +-
 drivers/crypto/cavium/cpt/cptvf_algs.c             |   1 +
 drivers/crypto/cavium/cpt/cptvf_reqmanager.c       |  12 +-
 drivers/crypto/cavium/cpt/request_manager.h        |   2 +
 drivers/crypto/ccp/ccp-dev.h                       |   1 +
 drivers/crypto/ccp/ccp-ops.c                       |  37 +++-
 drivers/crypto/ccree/cc_cipher.c                   |  30 +--
 drivers/crypto/hisilicon/sec/sec_algs.c            |  34 +--
 drivers/crypto/qat/qat_common/qat_algs.c           |  22 +-
 drivers/crypto/qat/qat_common/qat_uclo.c           |   9 +-
 drivers/devfreq/devfreq.c                          |  11 +-
 drivers/devfreq/rk3399_dmc.c                       |  42 ++--
 drivers/dma-buf/st-dma-fence-chain.c               |  43 ++--
 drivers/edac/edac_device_sysfs.c                   |   1 +
 drivers/edac/edac_pci_sysfs.c                      |   2 +-
 drivers/firmware/arm_scmi/scmi_pm_domain.c         |  12 +-
 drivers/firmware/qcom_scm.c                        |   7 +-
 drivers/gpio/gpiolib-devres.c                      |  13 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c        |  97 ++++++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c        |   2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c          |  19 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c             |   2 +-
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c   |   6 +-
 drivers/gpu/drm/amd/display/dc/core/dc_link.c      |   4 +-
 drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c  |  29 ++-
 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c   |  16 +-
 .../amd/display/dc/dce110/dce110_hw_sequencer.c    |  11 +-
 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c       |  14 +-
 drivers/gpu/drm/amd/powerplay/smu_v11_0.c          |   3 +-
 drivers/gpu/drm/arm/malidp_planes.c                |   2 +-
 drivers/gpu/drm/bridge/sil-sii8620.c               |   2 +-
 drivers/gpu/drm/bridge/ti-sn65dsi86.c              |   8 +-
 drivers/gpu/drm/drm_debugfs.c                      |   8 +-
 drivers/gpu/drm/drm_gem.c                          |   4 +-
 drivers/gpu/drm/drm_mipi_dsi.c                     |   6 +-
 drivers/gpu/drm/drm_mm.c                           |   4 +-
 drivers/gpu/drm/etnaviv/etnaviv_gpu.c              |  19 +-
 drivers/gpu/drm/imx/dw_hdmi-imx.c                  |  15 +-
 drivers/gpu/drm/imx/imx-drm-core.c                 |   3 +-
 drivers/gpu/drm/imx/imx-ldb.c                      |  15 +-
 drivers/gpu/drm/imx/imx-tve.c                      |  35 +--
 drivers/gpu/drm/imx/ipuv3-crtc.c                   |  21 +-
 drivers/gpu/drm/imx/parallel-display.c             |  15 +-
 drivers/gpu/drm/msm/adreno/a6xx_gmu.c              |  18 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c           |   2 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c     |  20 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h     |  13 ++
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c        |   9 +-
 drivers/gpu/drm/msm/msm_gem.c                      |  36 ++--
 drivers/gpu/drm/nouveau/dispnv50/head.c            |  24 ++-
 drivers/gpu/drm/nouveau/nouveau_debugfs.c          |   4 +-
 drivers/gpu/drm/nouveau/nouveau_drm.c              |   8 +-
 drivers/gpu/drm/nouveau/nouveau_gem.c              |   4 +-
 drivers/gpu/drm/nouveau/nouveau_sgdma.c            |   9 +-
 drivers/gpu/drm/panel/panel-simple.c               |   2 +-
 drivers/gpu/drm/panfrost/panfrost_job.c            |   5 +-
 drivers/gpu/drm/radeon/ci_dpm.c                    |   2 +-
 drivers/gpu/drm/radeon/radeon_display.c            |   4 +-
 drivers/gpu/drm/radeon/radeon_drv.c                |   9 +-
 drivers/gpu/drm/radeon/radeon_kms.c                |   4 +-
 drivers/gpu/drm/stm/ltdc.c                         |   3 +
 drivers/gpu/drm/tilcdc/tilcdc_panel.c              |   6 +-
 drivers/gpu/drm/ttm/ttm_tt.c                       |   3 -
 drivers/gpu/drm/xen/xen_drm_front.c                |   4 +-
 drivers/gpu/drm/xen/xen_drm_front_gem.c            |   8 +-
 drivers/gpu/drm/xen/xen_drm_front_kms.c            |   2 +-
 drivers/gpu/host1x/debug.c                         |   4 +
 drivers/gpu/ipu-v3/ipu-common.c                    |   2 +
 drivers/hid/hid-input.c                            |   6 +-
 drivers/hwtracing/coresight/coresight-etm4x.c      |  22 +-
 drivers/hwtracing/coresight/coresight-etm4x.h      |   6 +-
 drivers/hwtracing/coresight/coresight-tmc-etf.c    |  13 +-
 drivers/iio/amplifiers/ad8366.c                    |   7 +-
 drivers/infiniband/core/device.c                   |  11 +-
 drivers/infiniband/core/nldev.c                    |   3 -
 drivers/infiniband/core/verbs.c                    |   2 +-
 drivers/infiniband/hw/hns/hns_roce_hw_v2.c         |  13 +-
 drivers/infiniband/hw/hns/hns_roce_hw_v2.h         |   1 +
 drivers/infiniband/hw/qedr/qedr.h                  |   5 +-
 drivers/infiniband/hw/qedr/verbs.c                 |  42 ++--
 drivers/infiniband/sw/rxe/rxe_recv.c               |   6 +-
 drivers/infiniband/sw/rxe/rxe_verbs.c              |   5 +-
 drivers/infiniband/ulp/rtrs/rtrs-clt.c             |  16 +-
 drivers/infiniband/ulp/rtrs/rtrs-srv.c             |   2 +-
 drivers/iommu/intel/dmar.c                         |   1 +
 drivers/iommu/intel/iommu.c                        |  27 +++
 drivers/iommu/intel/irq_remapping.c                |   8 +
 drivers/irqchip/irq-bcm7038-l1.c                   |   8 +
 drivers/irqchip/irq-gic-v3-its.c                   |   4 +-
 drivers/irqchip/irq-loongson-htvec.c               |  10 +-
 drivers/irqchip/irq-loongson-liointc.c             |   1 +
 drivers/irqchip/irq-loongson-pch-pic.c             |  30 ++-
 drivers/irqchip/irq-mtk-sysirq.c                   |   8 +-
 drivers/irqchip/irq-ti-sci-inta.c                  |   2 +-
 drivers/leds/led-class.c                           |   1 +
 drivers/leds/leds-lm355x.c                         |   7 +-
 drivers/macintosh/via-macii.c                      |   9 +-
 drivers/md/bcache/super.c                          |   9 +-
 drivers/md/md-cluster.c                            |   1 +
 drivers/md/md.c                                    |   9 +-
 drivers/media/cec/platform/cros-ec/cros-ec-cec.c   |   6 +-
 drivers/media/firewire/firedtv-fw.c                |   2 +
 drivers/media/i2c/tvp5150.c                        |   8 +-
 drivers/media/mc/mc-request.c                      |  31 +--
 drivers/media/platform/exynos4-is/media-dev.c      |   3 +
 drivers/media/platform/marvell-ccic/mcam-core.c    |   2 +
 drivers/media/platform/mtk-mdp/mtk_mdp_comp.c      |  16 +-
 drivers/media/platform/omap3isp/isppreview.c       |   4 +-
 drivers/media/platform/s5p-g2d/g2d.c               |  28 +--
 drivers/media/usb/dvb-usb/Kconfig                  |   1 +
 drivers/media/usb/go7007/go7007-usb.c              |  11 +-
 drivers/memory/samsung/exynos5422-dmc.c            |  12 +-
 drivers/memory/tegra/tegra186-emc.c                |  16 +-
 drivers/mfd/ioc3.c                                 |   6 +
 drivers/misc/cxl/sysfs.c                           |   2 +-
 drivers/misc/lkdtm/bugs.c                          |  49 +++--
 drivers/misc/lkdtm/lkdtm.h                         |   2 -
 drivers/misc/lkdtm/perms.c                         |  22 +-
 drivers/misc/lkdtm/usercopy.c                      |   7 +-
 drivers/mmc/host/sdhci-cadence.c                   | 123 +++++------
 drivers/mmc/host/sdhci-of-arasan.c                 |   4 +
 drivers/mmc/host/sdhci-pci-o2micro.c               |   6 +
 drivers/most/core.c                                |   4 +-
 drivers/mtd/nand/raw/brcmnand/brcmnand.c           |   5 +-
 drivers/mtd/nand/raw/qcom_nandc.c                  |   7 +-
 drivers/mtd/spi-nor/controllers/intel-spi.c        |   9 +
 drivers/net/dsa/mv88e6xxx/chip.c                   |   1 -
 drivers/net/dsa/rtl8366.c                          |  35 ++-
 .../net/ethernet/aquantia/atlantic/aq_ethtool.c    |   6 +-
 .../ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c  |   2 +-
 drivers/net/ethernet/cadence/macb_main.c           |  11 +-
 .../ethernet/cavium/liquidio/cn23xx_pf_device.c    |   2 +-
 drivers/net/ethernet/cavium/thunder/nicvf_main.c   |   8 +-
 drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c   |   8 +-
 drivers/net/ethernet/freescale/fman/fman.c         |   3 +-
 drivers/net/ethernet/freescale/fman/fman_dtsec.c   |   4 +-
 drivers/net/ethernet/freescale/fman/fman_mac.h     |   2 +-
 drivers/net/ethernet/freescale/fman/fman_memac.c   |   3 +-
 drivers/net/ethernet/freescale/fman/fman_port.c    |   9 +-
 drivers/net/ethernet/freescale/fman/fman_tgec.c    |   2 +-
 drivers/net/ethernet/intel/iavf/iavf_main.c        |   9 +-
 drivers/net/ethernet/intel/ice/ice_flex_pipe.c     |   8 +-
 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c    |   1 +
 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c  |   9 +-
 .../ethernet/mellanox/mlx5/core/steering/fs_dr.c   |  42 ++--
 drivers/net/ethernet/mscc/ocelot.c                 |  16 +-
 .../net/ethernet/pensando/ionic/ionic_bus_pci.c    |   9 +-
 drivers/net/ethernet/pensando/ionic/ionic_lif.c    |   2 +-
 drivers/net/ethernet/qlogic/qed/qed_cxt.c          |   5 +
 drivers/net/ethernet/qlogic/qed/qed_rdma.c         |   1 +
 drivers/net/ethernet/sgi/ioc3-eth.c                |   4 +-
 drivers/net/ethernet/ti/am65-cpsw-nuss.c           |  19 ++
 drivers/net/ethernet/toshiba/spider_net.c          |   4 +-
 drivers/net/ethernet/xilinx/ll_temac_main.c        |   6 +-
 drivers/net/hyperv/netvsc_drv.c                    |   7 +-
 drivers/net/phy/marvell10g.c                       |  18 +-
 drivers/net/phy/mscc/mscc_main.c                   |   9 +
 drivers/net/phy/phy_device.c                       |   8 +-
 drivers/net/usb/r8152.c                            |   2 +-
 drivers/net/vmxnet3/vmxnet3_drv.c                  |   3 +-
 drivers/net/vxlan.c                                |   4 +-
 drivers/net/wan/lapbether.c                        |  10 +-
 drivers/net/wireless/ath/ath10k/htt_tx.c           |   4 +
 .../broadcom/brcm80211/brcmfmac/fwil_types.h       |   2 +-
 .../broadcom/brcm80211/brcmfmac/fwsignal.c         |   4 +
 .../wireless/broadcom/brcm80211/brcmfmac/sdio.c    |   6 +-
 drivers/net/wireless/intel/iwlegacy/common.c       |   4 +-
 drivers/net/wireless/marvell/mwifiex/sdio.h        |   4 +-
 drivers/net/wireless/marvell/mwifiex/sta_cmdresp.c |  22 +-
 drivers/net/wireless/mediatek/mt76/mt7615/mcu.c    |  13 +-
 drivers/net/wireless/mediatek/mt76/mt7615/usb.c    |  21 +-
 .../net/wireless/mediatek/mt76/mt7615/usb_mcu.c    |   2 +-
 .../net/wireless/mediatek/mt76/mt7915/debugfs.c    |   2 +
 drivers/net/wireless/mediatek/mt76/mt7915/mcu.c    |  19 +-
 drivers/net/wireless/quantenna/qtnfmac/core.c      |   5 +-
 drivers/net/wireless/realtek/rtw88/coex.c          |   3 +-
 drivers/net/wireless/realtek/rtw88/fw.c            |   2 +-
 drivers/net/wireless/realtek/rtw88/main.c          |  11 +-
 drivers/net/wireless/realtek/rtw88/rtw8822ce.c     |   4 +
 drivers/net/wireless/ti/wl1251/event.c             |   2 +-
 drivers/nvme/host/multipath.c                      |  17 +-
 drivers/nvme/host/rdma.c                           |  12 +-
 drivers/nvme/host/tcp.c                            |  12 +-
 drivers/nvmem/sprd-efuse.c                         |   4 +-
 drivers/parisc/sba_iommu.c                         |   2 +-
 drivers/pci/access.c                               |   8 +-
 drivers/pci/controller/cadence/pcie-cadence-ep.c   |   9 +-
 drivers/pci/controller/cadence/pcie-cadence-host.c |  15 +-
 drivers/pci/controller/pci-hyperv.c                |  71 ++++---
 drivers/pci/controller/pci-loongson.c              |   6 +-
 drivers/pci/controller/pcie-rcar-host.c            |   4 +-
 drivers/pci/controller/vmd.c                       |   3 +
 drivers/pci/pcie/aspm.c                            |   1 +
 drivers/pci/quirks.c                               |   2 +
 drivers/phy/cadence/phy-cadence-salvo.c            |   2 +-
 drivers/phy/marvell/phy-armada38x-comphy.c         |  45 +++-
 drivers/phy/renesas/phy-rcar-gen3-usb2.c           |  61 +++---
 drivers/phy/samsung/phy-exynos5-usbdrd.c           |   4 +-
 drivers/pinctrl/pinctrl-single.c                   |  11 +-
 drivers/platform/x86/asus-nb-wmi.c                 |  82 +++++++
 drivers/platform/x86/intel-hid.c                   |   2 +-
 drivers/platform/x86/intel-vbtn.c                  |   2 +-
 drivers/power/supply/88pm860x_battery.c            |   6 +-
 drivers/regulator/core.c                           |  18 +-
 drivers/reset/reset-intel-gw.c                     |  24 +--
 drivers/s390/block/dasd_diag.c                     |  25 ++-
 drivers/s390/net/qeth_core_main.c                  |  20 +-
 drivers/s390/net/qeth_l2_main.c                    |   4 +
 drivers/scsi/arm/cumana_2.c                        |   2 +-
 drivers/scsi/arm/eesox.c                           |   2 +-
 drivers/scsi/arm/powertec.c                        |   2 +-
 drivers/scsi/megaraid/megaraid_sas_base.c          |   9 +-
 drivers/scsi/mesh.c                                |   8 +-
 drivers/scsi/qla2xxx/qla_iocb.c                    |   4 +-
 drivers/scsi/scsi_debug.c                          |   6 +
 drivers/scsi/scsi_lib.c                            |   4 +-
 drivers/scsi/ufs/ufshcd.c                          |  53 ++---
 drivers/scsi/ufs/ufshcd.h                          |   2 +-
 drivers/soc/qcom/pdr_interface.c                   |   4 +-
 drivers/soc/qcom/rpmh-rsc.c                        |  19 +-
 drivers/spi/spi-dw-dma.c                           |  14 +-
 drivers/spi/spi-lantiq-ssc.c                       |  12 +-
 drivers/spi/spi-rockchip.c                         |   2 +-
 drivers/spi/spidev.c                               |  21 +-
 drivers/staging/media/allegro-dvt/allegro-core.c   |   8 +-
 drivers/staging/media/rkisp1/rkisp1-resizer.c      |  12 +-
 drivers/staging/rtl8192u/r8192U_core.c             |   2 +-
 .../vc04_services/interface/vchiq_arm/vchiq_arm.c  |   1 +
 .../int340x_thermal/processor_thermal_device.c     |   2 +-
 drivers/thermal/ti-soc-thermal/ti-thermal-common.c |   2 +-
 drivers/usb/cdns3/gadget.c                         |   3 +-
 drivers/usb/core/quirks.c                          |  16 +-
 drivers/usb/dwc2/platform.c                        |   4 +-
 drivers/usb/dwc3/dwc3-meson-g12a.c                 |  15 +-
 drivers/usb/gadget/function/f_uac2.c               |   7 +-
 drivers/usb/gadget/udc/bdc/bdc_core.c              |  13 +-
 drivers/usb/gadget/udc/bdc/bdc_ep.c                |  16 +-
 drivers/usb/gadget/udc/net2280.c                   |   4 +-
 drivers/usb/mtu3/mtu3_core.c                       |   6 +-
 drivers/usb/serial/cp210x.c                        |  19 ++
 drivers/usb/serial/iuu_phoenix.c                   |  14 +-
 drivers/vdpa/vdpa_sim/vdpa_sim.c                   |  31 ++-
 drivers/video/console/newport_con.c                |  12 +-
 drivers/video/fbdev/neofb.c                        |   1 +
 drivers/video/fbdev/pxafb.c                        |   4 +-
 drivers/video/fbdev/savage/savagefb_driver.c       |   2 +
 drivers/video/fbdev/sm712fb.c                      |   2 +
 drivers/xen/balloon.c                              |  12 +-
 drivers/xen/gntdev-dmabuf.c                        |   8 +
 fs/9p/v9fs.c                                       |   5 +-
 fs/btrfs/ctree.h                                   |   2 +
 fs/btrfs/extent-tree.c                             |   8 +
 fs/btrfs/extent_io.c                               |   2 +
 fs/btrfs/file.c                                    |  12 +-
 fs/btrfs/inode.c                                   |  44 +++-
 fs/btrfs/space-info.c                              |   2 +-
 fs/dlm/lockspace.c                                 |   6 +-
 fs/erofs/inode.c                                   | 121 +++++++----
 fs/io_uring.c                                      | 235 ++++++++++++++++-----
 fs/iomap/apply.c                                   |  13 +-
 fs/kernfs/file.c                                   |   2 +-
 fs/minix/inode.c                                   |  36 +++-
 fs/minix/itree_common.c                            |   8 +-
 fs/nfs/pnfs.c                                      |  46 ++--
 fs/nfsd/nfs4recover.c                              |  24 +--
 fs/ocfs2/dlmglue.c                                 |   8 +-
 fs/pstore/platform.c                               |   5 +-
 fs/xfs/libxfs/xfs_shared.h                         |   1 +
 fs/xfs/libxfs/xfs_trans_space.h                    |   2 +-
 fs/xfs/scrub/bmap.c                                |  22 +-
 fs/xfs/xfs_bmap_util.c                             |  18 +-
 fs/xfs/xfs_qm.c                                    |   1 +
 fs/xfs/xfs_reflink.c                               |  21 +-
 fs/xfs/xfs_trans.c                                 |  19 +-
 include/asm-generic/vmlinux.lds.h                  |   1 +
 include/linux/bitfield.h                           |   2 +-
 include/linux/dmar.h                               |   1 +
 include/linux/gpio/driver.h                        |  13 +-
 include/linux/gpio/regmap.h                        |   2 +-
 include/linux/intel-iommu.h                        |   2 +
 include/linux/tpm.h                                |   1 +
 include/linux/tpm_eventlog.h                       |  11 +-
 include/linux/tracepoint.h                         |   2 +-
 include/net/bluetooth/bluetooth.h                  |   2 +
 include/net/bluetooth/hci.h                        |  11 +
 include/net/bluetooth/hci_core.h                   |   2 +-
 include/net/inet_connection_sock.h                 |   4 +
 include/net/ip_vs.h                                |  10 +-
 include/net/tcp.h                                  |   2 +
 include/uapi/linux/bpf.h                           |   2 +-
 include/uapi/linux/seccomp.h                       |   3 +-
 include/uapi/rdma/qedr-abi.h                       |  10 +-
 kernel/bpf/map_iter.c                              |  16 +-
 kernel/bpf/task_iter.c                             |   6 +-
 kernel/rcu/tree.c                                  |   9 +-
 kernel/sched/core.c                                |  21 +-
 kernel/sched/fair.c                                |  23 +-
 kernel/sched/topology.c                            |   2 +-
 kernel/seccomp.c                                   |   9 +
 kernel/signal.c                                    |  16 +-
 kernel/task_work.c                                 |   8 +-
 kernel/time/tick-sched.c                           |  22 +-
 kernel/trace/blktrace.c                            |  18 +-
 kernel/trace/ftrace.c                              |   3 -
 kernel/trace/trace.c                               |  12 +-
 kernel/trace/trace.h                               |   9 +-
 lib/crc-t10dif.c                                   |  54 +++--
 lib/dynamic_debug.c                                |  23 +-
 lib/kobject.c                                      |  33 ++-
 mm/mmap.c                                          |   1 +
 mm/vmstat.c                                        |  12 +-
 net/bluetooth/6lowpan.c                            |   5 +
 net/bluetooth/hci_core.c                           |  28 ++-
 net/bpfilter/bpfilter_kern.c                       |   1 +
 net/core/sock.c                                    |  25 ++-
 net/ipv4/inet_connection_sock.c                    |  97 +++++----
 net/ipv4/inet_hashtables.c                         |   1 +
 net/ipv4/sysctl_net_ipv4.c                         |  16 +-
 net/ipv4/tcp.c                                     |  16 +-
 net/ipv4/tcp_fastopen.c                            |  23 ++
 net/netfilter/ipvs/ip_vs_core.c                    |  12 +-
 net/netfilter/nft_meta.c                           |   2 +-
 net/nfc/rawsock.c                                  |   7 +-
 net/packet/af_packet.c                             |   9 +-
 net/socket.c                                       |   2 +-
 net/sunrpc/auth_gss/gss_krb5_wrap.c                |   2 +-
 net/sunrpc/auth_gss/svcauth_gss.c                  |   1 -
 net/sunrpc/xprtrdma/svc_rdma_rw.c                  |  28 ++-
 net/tls/tls_device.c                               |   3 +-
 net/vmw_vsock/af_vsock.c                           |   2 +-
 samples/bpf/fds_example.c                          |   3 +-
 samples/bpf/map_perf_test_kern.c                   |   9 +-
 samples/bpf/test_map_in_map_kern.c                 |   9 +-
 samples/bpf/test_probe_write_user_kern.c           |   9 +-
 scripts/recordmcount.c                             |   6 +
 scripts/selinux/mdp/mdp.c                          |  23 +-
 security/integrity/ima/ima.h                       |   5 +
 security/integrity/ima/ima_policy.c                | 102 ++++++++-
 security/smack/smackfs.c                           |   6 +-
 sound/pci/hda/patch_realtek.c                      |   4 +-
 sound/soc/codecs/hdac_hda.c                        |   7 +-
 sound/soc/codecs/tas2770.c                         |   3 +-
 sound/soc/fsl/fsl_easrc.c                          |   2 +-
 sound/soc/fsl/fsl_sai.c                            |   5 +-
 sound/soc/fsl/fsl_sai.h                            |   2 +-
 sound/soc/intel/boards/bxt_rt298.c                 |   2 +
 sound/soc/intel/boards/cml_rt1011_rt5682.c         |  84 +++-----
 sound/soc/intel/boards/sof_sdw.c                   |   1 +
 sound/soc/meson/axg-card.c                         |  20 +-
 sound/soc/meson/axg-tdm-formatter.c                |  11 +-
 sound/soc/meson/axg-tdm-formatter.h                |   1 -
 sound/soc/meson/axg-tdm-interface.c                |  26 ++-
 sound/soc/meson/axg-tdmin.c                        |  16 +-
 sound/soc/meson/axg-tdmout.c                       |   3 -
 sound/soc/meson/gx-card.c                          |  18 +-
 sound/soc/meson/meson-card-utils.c                 |   4 -
 sound/soc/soc-core.c                               |   5 +-
 sound/soc/soc-dai.c                                |  16 +-
 sound/soc/soc-pcm.c                                |  42 ++--
 sound/soc/sof/nocodec.c                            |   1 +
 sound/usb/card.h                                   |   1 +
 sound/usb/mixer_quirks.c                           |   1 +
 sound/usb/pcm.c                                    |   6 +
 sound/usb/quirks-table.h                           |  64 +++++-
 sound/usb/quirks.c                                 |   3 +
 sound/usb/stream.c                                 |   1 +
 tools/bpf/bpftool/btf.c                            |   2 +-
 tools/bpf/bpftool/gen.c                            |   5 +-
 tools/build/Build.include                          |   3 +-
 tools/include/uapi/linux/bpf.h                     |   2 +-
 tools/lib/bpf/bpf_tracing.h                        |   4 +-
 tools/testing/kunit/kunit.py                       |  24 ---
 tools/testing/kunit/kunit_kernel.py                |   6 +-
 tools/testing/kunit/kunit_tool_test.py             |  14 +-
 tools/testing/selftests/lkdtm/run.sh               |   6 +
 tools/testing/selftests/lkdtm/tests.txt            |   1 +
 tools/testing/selftests/net/msg_zerocopy.c         |   5 +-
 .../selftests/powerpc/benchmarks/context_switch.c  |  21 +-
 .../testing/selftests/powerpc/eeh/eeh-functions.sh |  11 +-
 tools/testing/selftests/powerpc/utils.c            |  37 ++--
 tools/testing/selftests/seccomp/seccomp_bpf.c      |   2 +-
 491 files changed, 4037 insertions(+), 2466 deletions(-)



^ permalink raw reply	[relevance 2%]

* Re: [PATCH 1/7] dt-bindings: interconnect: Add OSM L3 DT binding on SM8150
  2020-08-01 12:30 22% ` [PATCH 1/7] dt-bindings: interconnect: Add OSM L3 DT binding on SM8150 Sibi Sankar
@ 2020-08-17 21:16  0%   ` Rob Herring
  0 siblings, 0 replies; 200+ results
From: Rob Herring @ 2020-08-17 21:16 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: georgi.djakov, bjorn.andersson, robh+dt, devicetree,
	linux-arm-msm, linux-kernel, linux-pm, jonathan, agross

On Sat, 01 Aug 2020 18:00:43 +0530, Sibi Sankar wrote:
> Add Operation State Manager (OSM) L3 interconnect provider binding on
> SM8150 SoCs.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> ---
>  Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

^ permalink raw reply	[relevance 0%]

* Re: [PATCH 4/7] dt-bindings: interconnect: Add EPSS L3 DT binding on SM8250
  2020-08-01 12:30 22% ` [PATCH 4/7] dt-bindings: interconnect: Add EPSS L3 DT binding on SM8250 Sibi Sankar
@ 2020-08-17 21:16  0%   ` Rob Herring
  0 siblings, 0 replies; 200+ results
From: Rob Herring @ 2020-08-17 21:16 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: linux-arm-msm, jonathan, devicetree, linux-kernel, linux-pm,
	bjorn.andersson, georgi.djakov, agross, robh+dt

On Sat, 01 Aug 2020 18:00:46 +0530, Sibi Sankar wrote:
> Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SM8250
> SoCs.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
> ---
>  .../devicetree/bindings/interconnect/qcom,osm-l3.yaml          | 1 +
>  include/dt-bindings/interconnect/qcom,osm-l3.h                 | 3 +++
>  2 files changed, 4 insertions(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

^ permalink raw reply	[relevance 0%]

* Re: [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag
  2020-08-17 16:49  6%           ` Sibi Sankar
@ 2020-08-18  8:31  6%             ` Ulf Hansson
  2020-08-18  9:03  6%               ` Sibi Sankar
  0 siblings, 1 reply; 200+ results
From: Ulf Hansson @ 2020-08-18  8:31 UTC (permalink / raw)
  To: Sibi Sankar
  Cc: Bjorn Andersson, Rafael J. Wysocki, Andy Gross,
	Linux Kernel Mailing List, linux-arm-msm, Linux PM,
	Greg Kroah-Hartman, Pavel Machek, Len Brown, Rajendra Nayak,
	Doug Anderson, linux-kernel-owner, Kevin Hilman,
	linux-arm-msm-owner

On Mon, 17 Aug 2020 at 18:49, Sibi Sankar <sibis@codeaurora.org> wrote:
>
> On 2020-08-17 14:14, Ulf Hansson wrote:
> > On Thu, 13 Aug 2020 at 19:26, Sibi Sankar <sibis@codeaurora.org> wrote:
> >>
> >> On 2020-08-13 18:04, Ulf Hansson wrote:
> >> > On Wed, 12 Aug 2020 at 19:03, Sibi Sankar <sibis@codeaurora.org> wrote:
> >> >>
> >> >> Uffe,
> >> >> Thanks for taking time to review the
> >> >> series!
> >> >>
> >> >> On 2020-08-12 15:15, Ulf Hansson wrote:
> >> >> > On Tue, 11 Aug 2020 at 21:03, Sibi Sankar <sibis@codeaurora.org> wrote:
> >> >> >>
> >> >> >> This is for power domains which needs to stay powered on for suspend
> >> >> >> but can be powered on/off as part of runtime PM. This flag is aimed at
> >> >> >> power domains coupled to remote processors which enter suspend states
> >> >> >> independent to that of the application processor. Such power domains
> >> >> >> are turned off only on remote processor crash/shutdown.
> >> >> >
> >> >> > As Kevin also requested, please elaborate more on the use case.
> >> >> >
> >> >> > Why exactly must the PM domain stay powered on during system suspend?
> >> >> > Is there a wakeup configured that needs to be managed - or is there a
> >> >> > co-processor/FW behaviour that needs to be obeyed to?
> >> >>
> >> >> Yes this is a co-processor behavior that
> >> >> needs to be obeyed. Specifically application
> >> >> processor notifies the Always on Subsystem
> >> >> (AOSS) that a particular co-processor is up
> >> >> using the power domains exposed by AOSS QMP
> >> >> driver. AOSS uses this information to wait
> >> >> for the co-processors to suspend before
> >> >> starting its sleep sequence. The application
> >> >> processor powers off these power domains only
> >> >> if the co-processor has crashed or powered
> >> >> off.
> >> >
> >> > Thanks for clarifying!
> >> >
> >> > Although, can you please elaborate a bit more on the actual use case?
> >> > What are the typical co-processor and what drivers are involved in
> >> > managing it?
> >>
> >> The co-processors using the power domains
> >> exposed by qcom_aoss driver are modem,
> >> audio dsp, compute dsp managed using
> >> qcom_q6v5_mss and qcom_q6v5_pas driver.
> >>
> >> >
> >> > As you may know, runtime PM becomes disabled during system suspend of
> >> > a device. Which means, if the driver tries to power off the
> >> > coprocessor (via calling pm_runtime_put() for example), somewhere in
> >> > the system suspend phase of the corresponding device, its attached PM
> >> > domain stays powered on when managed by genpd.
> >>
> >> The drivers aren't really expected
> >> do anything during suspend/resume
> >> pretty much because the co-processors
> >> enter low-power modes independent to
> >> that of the application processor. On
> >> co-processor crash the remoteproc core
> >> does a pm_stay_awake followed by a
> >> pm_relax after crash recovery.
> >
> > Okay, thanks again for clarifying. You have convinced me about the
> > need for a new flag to cope with these use cases.
> >
> > Would you mind updating the commit message with some of the
> > information you just provided?
> >
> > Additionally, to make it clear that the flag should be used to keep
> > the PM domain powered on during system suspend, but only if it's
> > already powered on - please rename the flag to GENPD_FLAG_NO_SUSPEND,
> > and update the corresponding description of it in the header file.
>
> Thanks, naming it ^^ makes more sense :)
>
> https://lore.kernel.org/lkml/340a7aafcf0301ff3158a4e211992041@codeaurora.org/
>
> Also we wouldn't want to power on
> runtime suspended power domains with
> the NO_SUSPEND flag set, on resume as
> explained ^^. Do you agree with that
> as well?

Actually no.

Instead, I think that deserves a separate flag, as it may very well
turn out that resuming can be skipped for other cases than
"NO_SUSPEND".

Therefore, please add a GENPD_FLAG_NO_RESUME for this.

Kind regards
Uffe

^ permalink raw reply	[relevance 6%]

* Re: [PATCH 1/2] PM / Domains: Add GENPD_FLAG_SUSPEND_ON flag
  2020-08-18  8:31  6%             ` Ulf Hansson
@ 2020-08-18  9:03  6%               ` Sibi Sankar
  0 siblings, 0 replies; 200+ results
From: Sibi Sankar @ 2020-08-18  9:03 UTC (permalink / raw)
  To: Ulf Hansson
  Cc: Bjorn Andersson, Rafael J. Wysocki, Andy Gross,
	Linux Kernel Mailing List, linux-arm-msm, Linux PM,
	Greg Kroah-Hartman, Pavel Machek, Len Brown, Rajendra Nayak,
	Doug Anderson, linux-kernel-owner, Kevin Hilman,
	linux-arm-msm-owner

On 2020-08-18 14:01, Ulf Hansson wrote:
> On Mon, 17 Aug 2020 at 18:49, Sibi Sankar <sibis@codeaurora.org> wrote:
>> 
>> On 2020-08-17 14:14, Ulf Hansson wrote:
>> > On Thu, 13 Aug 2020 at 19:26, Sibi Sankar <sibis@codeaurora.org> wrote:
>> >>
>> >> On 2020-08-13 18:04, Ulf Hansson wrote:
>> >> > On Wed, 12 Aug 2020 at 19:03, Sibi Sankar <sibis@codeaurora.org> wrote:
>> >> >>
>> >> >> Uffe,
>> >> >> Thanks for taking time to review the
>> >> >> series!
>> >> >>
>> >> >> On 2020-08-12 15:15, Ulf Hansson wrote:
>> >> >> > On Tue, 11 Aug 2020 at 21:03, Sibi Sankar <sibis@codeaurora.org> wrote:
>> >> >> >>
>> >> >> >> This is for power domains which needs to stay powered on for suspend
>> >> >> >> but can be powered on/off as part of runtime PM. This flag is aimed at
>> >> >> >> power domains coupled to remote processors which enter suspend states
>> >> >> >> independent to that of the application processor. Such power domains
>> >> >> >> are turned off only on remote processor crash/shutdown.
>> >> >> >
>> >> >> > As Kevin also requested, please elaborate more on the use case.
>> >> >> >
>> >> >> > Why exactly must the PM domain stay powered on during system suspend?
>> >> >> > Is there a wakeup configured that needs to be managed - or is there a
>> >> >> > co-processor/FW behaviour that needs to be obeyed to?
>> >> >>
>> >> >> Yes this is a co-processor behavior that
>> >> >> needs to be obeyed. Specifically application
>> >> >> processor notifies the Always on Subsystem
>> >> >> (AOSS) that a particular co-processor is up
>> >> >> using the power domains exposed by AOSS QMP
>> >> >> driver. AOSS uses this information to wait
>> >> >> for the co-processors to suspend before
>> >> >> starting its sleep sequence. The application
>> >> >> processor powers off these power domains only
>> >> >> if the co-processor has crashed or powered
>> >> >> off.
>> >> >
>> >> > Thanks for clarifying!
>> >> >
>> >> > Although, can you please elaborate a bit more on the actual use case?
>> >> > What are the typical co-processor and what drivers are involved in
>> >> > managing it?
>> >>
>> >> The co-processors using the power domains
>> >> exposed by qcom_aoss driver are modem,
>> >> audio dsp, compute dsp managed using
>> >> qcom_q6v5_mss and qcom_q6v5_pas driver.
>> >>
>> >> >
>> >> > As you may know, runtime PM becomes disabled during system suspend of
>> >> > a device. Which means, if the driver tries to power off the
>> >> > coprocessor (via calling pm_runtime_put() for example), somewhere in
>> >> > the system suspend phase of the corresponding device, its attached PM
>> >> > domain stays powered on when managed by genpd.
>> >>
>> >> The drivers aren't really expected
>> >> do anything during suspend/resume
>> >> pretty much because the co-processors
>> >> enter low-power modes independent to
>> >> that of the application processor. On
>> >> co-processor crash the remoteproc core
>> >> does a pm_stay_awake followed by a
>> >> pm_relax after crash recovery.
>> >
>> > Okay, thanks again for clarifying. You have convinced me about the
>> > need for a new flag to cope with these use cases.
>> >
>> > Would you mind updating the commit message with some of the
>> > information you just provided?
>> >
>> > Additionally, to make it clear that the flag should be used to keep
>> > the PM domain powered on during system suspend, but only if it's
>> > already powered on - please rename the flag to GENPD_FLAG_NO_SUSPEND,
>> > and update the corresponding description of it in the header file.
>> 
>> Thanks, naming it ^^ makes more sense :)
>> 
>> https://lore.kernel.org/lkml/340a7aafcf0301ff3158a4e211992041@codeaurora.org/
>> 
>> Also we wouldn't want to power on
>> runtime suspended power domains with
>> the NO_SUSPEND flag set, on resume as
>> explained ^^. Do you agree with that
>> as well?
> 
> Actually no.
> 
> Instead, I think that deserves a separate flag, as it may very well
> turn out that resuming can be skipped for other cases than
> "NO_SUSPEND".
> 
> Therefore, please add a GENPD_FLAG_NO_RESUME for this.

Thanks I'll do that in v2

> 
> Kind regards
> Uffe

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

^ permalink raw reply	[relevance 6%]

* Re: [PATCH v2 5/7] arm64: dts: qcom: sdm845: Increase the number of interconnect cells
  2020-08-06 16:31  6% ` [PATCH v2 5/7] arm64: dts: qcom: sdm845: Increase the number of interconnect cells Georgi Djakov
@ 2020-08-19 20:07  0%   ` Doug Anderson
  0 siblings, 0 replies; 200+ results
From: Doug Anderson @ 2020-08-19 20:07 UTC (permalink / raw)
  To: Georgi Djakov
  Cc: Linux PM,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Rob Herring, Bjorn Andersson, Sibi Sankar, Matthias Kaehlcke,
	LKML

Hi,

On Thu, Aug 6, 2020 at 9:31 AM Georgi Djakov <georgi.djakov@linaro.org> wrote:
>
> Increase the number of interconnect-cells, as now we can include
> the tag information. The consumers can specify the path tag as an
> additional argument to the endpoints.
>
> Tested-by: Sibi Sankar <sibis@codeaurora.org>
> Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
> Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sdm845.dtsi | 44 ++++++++++++++--------------
>  1 file changed, 22 insertions(+), 22 deletions(-)

I believe you missed updating a few places...  Fixup can be found at
<https://crrev.com/c/2364731> or look carefully under "ipa@1e40000"
and "gpu@5000000".

-Doug

^ permalink raw reply	[relevance 0%]

* [PATCH 5.8 000/232] 5.8.3-rc1 review
@ 2020-08-20  9:17  4% Greg Kroah-Hartman
  2020-08-20  9:18  9% ` [PATCH 5.8 042/232] arm64: dts: qcom: sc7180: Drop the unused non-MSA SID Greg Kroah-Hartman
                   ` (3 more replies)
  0 siblings, 4 replies; 200+ results
From: Greg Kroah-Hartman @ 2020-08-20  9:17 UTC (permalink / raw)
  To: linux-kernel
  Cc: Greg Kroah-Hartman, torvalds, akpm, linux, shuah, patches,
	ben.hutchings, lkft-triage, stable

This is the start of the stable review cycle for the 5.8.3 release.
There are 232 patches in this series, all will be posted as a response
to this one.  If anyone has any issues with these being applied, please
let me know.

Responses should be made by Sat, 22 Aug 2020 09:15:09 +0000.
Anything received after that time might be too late.

The whole patch series can be found in one patch at:
	https://www.kernel.org/pub/linux/kernel/v5.x/stable-review/patch-5.8.3-rc1.gz
or in the git tree and branch at:
	git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git linux-5.8.y
and the diffstat can be found below.

thanks,

greg k-h

-------------
Pseudo-Shortlog of commits:

Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    Linux 5.8.3-rc1

hersen wu <hersenxs.wu@amd.com>
    drm/amd/display: dchubbub p-state warning during surface planes switch

Stylon Wang <stylon.wang@amd.com>
    drm/amd/display: Fix dmesg warning from setting abm level

Sandeep Raghuraman <sandy.8925@gmail.com>
    drm/amdgpu: Fix bug where DPM is not enabled after hibernate and resume

Xin Xiong <xiongx18@fudan.edu.cn>
    drm: fix drm_dp_mst_port refcount leaks in drm_dp_mst_allocate_vcpi

Marius Iacob <themariusus@gmail.com>
    drm: Added orientation quirk for ASUS tablet model T103HAF

Tomi Valkeinen <tomi.valkeinen@ti.com>
    drm/tidss: fix modeset init for DPI panels

Tomi Valkeinen <tomi.valkeinen@ti.com>
    drm/omap: force runtime PM suspend on system suspend

Imre Deak <imre.deak@intel.com>
    drm/dp_mst: Fix the DDC I2C device unregistration of an MST port

Imre Deak <imre.deak@intel.com>
    drm/dp_mst: Fix timeout handling of MST down messages

Imre Deak <imre.deak@intel.com>
    drm/dp_mst: Fix the DDC I2C device registration of an MST port

Denis Efremov <efremov@linux.com>
    drm/panfrost: Use kvfree() to free bo->sgts

Chris Wilson <chris@chris-wilson.co.uk>
    drm/i915/gt: Force the GT reset on shutdown

Denis Efremov <efremov@linux.com>
    drm/radeon: fix fb_div check in ni_init_smc_spll_table()

Geert Uytterhoeven <geert+renesas@glider.be>
    sh: fault: Fix duplicate printing of "PC:"

Geert Uytterhoeven <geert+renesas@glider.be>
    sh: landisk: Add missing initialization of sh_io_port_base

Zhang Rui <rui.zhang@intel.com>
    perf/x86/rapl: Fix missing psys sysfs attributes

Daniel Díaz <daniel.diaz@linaro.org>
    tools build feature: Quote CC and CXX for their arguments

Vincent Whitchurch <vincent.whitchurch@axis.com>
    perf bench mem: Always memset source before memcpy

Dinghao Liu <dinghao.liu@zju.edu.cn>
    ALSA: echoaudio: Fix potential Oops in snd_echo_resume()

Ondrej Mosnacek <omosnace@redhat.com>
    crypto: algif_aead - fix uninitialized ctx->init

Andy Shevchenko <andriy.shevchenko@linux.intel.com>
    mfd: dln2: Run event handler loop under spinlock

Dhananjay Phadke <dphadke@linux.microsoft.com>
    i2c: iproc: fix race between client unreg and isr

Tiezhu Yang <yangtiezhu@loongson.cn>
    test_kmod: avoid potential double free in trigger_config_run_type()

Colin Ian King <colin.king@canonical.com>
    fs/ufs: avoid potential u32 multiplication overflow

Eric Biggers <ebiggers@google.com>
    fs/minix: remove expected error message in block_to_path()

Eric Biggers <ebiggers@google.com>
    fs/minix: fix block limit check for V1 filesystems

Eric Biggers <ebiggers@google.com>
    fs/minix: set s_maxbytes correctly

Tiezhu Yang <yangtiezhu@loongson.cn>
    lib/test_lockup.c: fix return value of test_lockup_init()

Trond Myklebust <trond.myklebust@hammerspace.com>
    NFS: Fix flexfiles read failover

Jeffrey Mitchell <jeffrey.mitchell@starlab.io>
    nfs: Fix getxattr kernel panic and memory overflow

Wang Hai <wanghai38@huawei.com>
    net: qcom/emac: add missed clk_disable_unprepare in error path of emac_clks_phase1_init

Krzysztof Kozlowski <krzk@kernel.org>
    s390/Kconfig: add missing ZCRYPT dependency to VFIO_AP

Wang Hai <wanghai38@huawei.com>
    s390/test_unwind: fix possible memleak in test_unwind()

Dan Carpenter <dan.carpenter@oracle.com>
    drm/vmwgfx: Fix two list_for_each loop exit tests

Dan Carpenter <dan.carpenter@oracle.com>
    drm/vmwgfx: Use correct vmw_legacy_display_unit pointer

Dan Carpenter <dan.carpenter@oracle.com>
    vdpa: Fix pointer math bug in vdpasim_get_config()

Christophe Leroy <christophe.leroy@csgroup.eu>
    recordmcount: Fix build failure on non arm64

Michael S. Tsirkin <mst@redhat.com>
    vdpa_sim: init iommu lock

Andrii Nakryiko <andriin@fb.com>
    selftests/bpf: Fix silent Makefile output

Jin Yao <yao.jin@linux.intel.com>
    perf record: Skip side-band event setup if HAVE_LIBBPF_SUPPORT is not set

Colin Ian King <colin.king@canonical.com>
    Input: sentelic - fix error return when fsp_reg_write fails

Andrii Nakryiko <andriin@fb.com>
    selftests/bpf: Prevent runqslower from racing on building bpftool

Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
    x86/bugs/multihit: Fix mitigation reporting when VMX is not in use

Dilip Kota <eswara.kota@linux.intel.com>
    x86/tsr: Fix tsc frequency enumeration bug on Lightning Mountain SoC

Muchun Song <songmuchun@bytedance.com>
    kprobes: Fix compiler warning for !CONFIG_KPROBES_ON_FTRACE

Dan Carpenter <dan.carpenter@oracle.com>
    md-cluster: Fix potential error pointer dereference in resize_bitmaps()

Tero Kristo <t-kristo@ti.com>
    watchdog: rti-wdt: balance pm runtime enable calls

Krzysztof Sobota <krzysztof.sobota@nokia.com>
    watchdog: initialize device before misc_register

Scott Mayhew <smayhew@redhat.com>
    nfs: nfs_file_write() should check for writeback errors

Ewan D. Milne <emilne@redhat.com>
    scsi: lpfc: nvmet: Avoid hang / use-after-free again when destroying targetport

Jin Yao <yao.jin@linux.intel.com>
    perf evsel: Don't set sample_regs_intr/sample_regs_user for dummy event

Stafford Horne <shorne@gmail.com>
    openrisc: Fix oops caused when dumping stack

Jane Chu <jane.chu@oracle.com>
    libnvdimm/security: ensure sysfs poll thread woke up and fetch updated attr

Jane Chu <jane.chu@oracle.com>
    libnvdimm/security: fix a typo

Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
    clk: bcm2835: Do not use prediv with bcm2711's PLLs

Geert Uytterhoeven <geert+renesas@glider.be>
    clk: hsdk: Fix bad dependency on IOMEM

Zhihao Cheng <chengzhihao1@huawei.com>
    ubifs: Fix wrong orphan node deletion in ubifs_jnl_update|rename

Zhihao Cheng <chengzhihao1@huawei.com>
    ubi: fastmap: Free fastmap next anchor peb during detach

Zhihao Cheng <chengzhihao1@huawei.com>
    ubi: fastmap: Don't produce the initial next anchor PEB when fastmap is disabled

Scott Mayhew <smayhew@redhat.com>
    nfs: ensure correct writeback errors are returned on close()

Wolfram Sang <wsa+renesas@sang-engineering.com>
    i2c: rcar: avoid race when unregistering slave

Thomas Hebb <tommyhebb@gmail.com>
    tools build feature: Use CC and CXX from parent

Jiri Olsa <jolsa@kernel.org>
    perf tools: Fix term parsing for raw syntax

Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
    pwm: bcm-iproc: handle clk_get_rate() return

Qais Yousef <qais.yousef@arm.com>
    sched/uclamp: Fix a deadlock when enabling uclamp static key

Sagi Grimberg <sagi@grimberg.me>
    nvme: fix deadlock in disconnect during scan_work and/or ana_work

Xu Wang <vulab@iscas.ac.cn>
    clk: clk-atlas6: fix return value check in atlas6_clk_init()

Konrad Dybcio <konradybcio@gmail.com>
    clk: qcom: gcc-sdm660: Fix up gcc_mss_mnoc_bimc_axi_clk

Wei Hu <weh@microsoft.com>
    PCI: hv: Fix a timing issue which causes kdump to fail occasionally

Chao Yu <chao@kernel.org>
    f2fs: compress: fix to update isize when overwriting compressed file

Wolfram Sang <wsa+renesas@sang-engineering.com>
    i2c: rcar: slave: only send STOP event when we have been addressed

Jacob Pan <jacob.jun.pan@linux.intel.com>
    iommu/vt-d: Disable multiple GPASID-dev bind

Jacob Pan <jacob.jun.pan@linux.intel.com>
    iommu/vt-d: Warn on out-of-range invalidation address

Liu Yi L <yi.l.liu@intel.com>
    iommu/vt-d: Enforce PASID devTLB field mask

Liu Yi L <yi.l.liu@intel.com>
    iommu/vt-d: Handle non-page aligned address

Jonathan Marek <jonathan@marek.ca>
    clk: qcom: clk-alpha-pll: remove unused/incorrect PLL_CAL_VAL

Jonathan Marek <jonathan@marek.ca>
    clk: qcom: gcc: fix sm8150 GPU and NPU clocks

Colin Ian King <colin.king@canonical.com>
    iommu/omap: Check for failure of a call to omap_iommu_dump_ctx

Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
    selftests/powerpc: ptrace-pkey: Don't update expected UAMOR value

Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
    selftests/powerpc: ptrace-pkey: Update the test to mark an invalid pkey correctly

Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
    selftests/powerpc: ptrace-pkey: Rename variables to make it easier to follow code

Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
    clk: actions: Fix h_clk for Actions S500 SoC

Chao Yu <chao@kernel.org>
    f2fs: compress: fix to avoid memory leak on cc->cpages

Tyler Hicks <tyhicks@linux.microsoft.com>
    ima: Fail rule parsing when appraise_flag=blacklist is unsupportable

Ming Lei <ming.lei@redhat.com>
    dm rq: don't call blk_mq_queue_stopped() in dm_stop_queue()

Steve Longerbeam <slongerbeam@gmail.com>
    gpu: ipu-v3: image-convert: Wait for all EOFs before completing a tile

Steve Longerbeam <slongerbeam@gmail.com>
    gpu: ipu-v3: image-convert: Combine rotate/no-rotate irq handlers

Herbert Xu <herbert@gondor.apana.org.au>
    crypto: caam - Remove broken arc4 support

Sudeep Holla <sudeep.holla@arm.com>
    rtc: pl031: fix set_alarm by adding back call to alarm_irq_enable

Yan-Hsuan Chuang <yhchuang@realtek.com>
    rtw88: pci: disable aspm for platform inter-op with module parameter

Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
    mmc: renesas_sdhi_internal_dmac: clean up the code for dma complete

Mark Zhang <markz@mellanox.com>
    RDMA/counter: Allow manually bind QPs with different pids to same counter

Mark Zhang <markz@mellanox.com>
    RDMA/counter: Only bind user QPs in auto mode

Vladimir Oltean <vladimir.oltean@nxp.com>
    devres: keep both device name and resource name in pretty name

Herbert Xu <herbert@gondor.apana.org.au>
    crypto: af_alg - Fix regression on empty requests

Johan Hovold <johan@kernel.org>
    USB: serial: ftdi_sio: fix break and sysrq handling

Johan Hovold <johan@kernel.org>
    USB: serial: ftdi_sio: clean up receive processing

Johan Hovold <johan@kernel.org>
    USB: serial: ftdi_sio: make process-packet buffer unsigned

Jesper Dangaard Brouer <brouer@redhat.com>
    selftests/bpf: test_progs avoid minus shell exit codes

Jesper Dangaard Brouer <brouer@redhat.com>
    selftests/bpf: test_progs use another shell exit on non-actions

Martin KaFai Lau <kafai@fb.com>
    bpf: selftests: Restore netns after each test

Jesper Dangaard Brouer <brouer@redhat.com>
    selftests/bpf: Test_progs indicate to shell on non-actions

Qais Yousef <qais.yousef@arm.com>
    sched/uclamp: Protect uclamp fast path code with static key

Yishai Hadas <yishaih@mellanox.com>
    IB/uverbs: Set IOVA on IB MR in uverbs layer

Paul Kocialkowski <paul.kocialkowski@bootlin.com>
    media: rockchip: rga: Only set output CSC mode for RGB input

Paul Kocialkowski <paul.kocialkowski@bootlin.com>
    media: rockchip: rga: Introduce color fmt macros and refactor CSC mode logic

Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
    media: staging: rkisp1: rsz: set default format if the given format is not RKISP1_ISP_SD_SRC

Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
    media: staging: rkisp1: rename macros 'RKISP1_DIR_*' to 'RKISP1_ISP_SD_*'

Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
    media: staging: rkisp1: remove macro RKISP1_DIR_SINK_SRC

Sebastian Reichel <sebastian.reichel@collabora.com>
    rtc: cpcap: fix range

Jason Gunthorpe <jgg@nvidia.com>
    RDMA/ipoib: Fix ABBA deadlock with ipoib_reap_ah()

Kamal Heib <kamalheib1@gmail.com>
    RDMA/ipoib: Return void from ipoib_ib_dev_stop()

Chen Tao <chentao107@huawei.com>
    drm/amdgpu/debugfs: fix memory leak when pm_runtime_get_sync failed

Qiushi Wu <wu000273@umn.edu>
    platform/chrome: cros_ec_ishtp: Fix a double-unlock issue

Kamal Dasu <kdasu.kdev@gmail.com>
    mtd: rawnand: brcmnand: ECC error handling on EDU transfers

Boris Brezillon <boris.brezillon@collabora.com>
    mtd: rawnand: fsl_upm: Remove unused mtd var

Eric Dumazet <edumazet@google.com>
    octeontx2-af: change (struct qmem)->entry_sz from u8 to u16

Charles Keepax <ckeepax@opensource.cirrus.com>
    mfd: arizona: Ensure 32k clock is put on driver unbind and error

Herbert Xu <herbert@gondor.apana.org.au>
    crypto: algif_aead - Only wake up when ctx->more is zero

Paul Cercueil <paul@crapouillou.net>
    drm/ingenic: Fix incorrect assumption about plane->index

Liu Ying <victor.liu@nxp.com>
    drm/imx: imx-ldb: Disable both channels for split mode in enc->disable()

Dan Williams <dan.j.williams@intel.com>
    libnvdimm: Validate command family indices

Sibi Sankar <sibis@codeaurora.org>
    remoteproc: qcom_q6v5_mss: Validate modem blob firmware size before load

Sibi Sankar <sibis@codeaurora.org>
    remoteproc: qcom_q6v5_mss: Validate MBA firmware size before load

Sibi Sankar <sibis@codeaurora.org>
    remoteproc: qcom: q6v5: Update running state before requesting stop

Bob Peterson <rpeterso@redhat.com>
    gfs2: Never call gfs2_block_zero_range with an open transaction

Andreas Gruenbacher <agruenba@redhat.com>
    gfs2: Fix refcount leak in gfs2_glock_poke

Adrian Hunter <adrian.hunter@intel.com>
    perf intel-pt: Fix duplicate branch after CBR

Adrian Hunter <adrian.hunter@intel.com>
    perf intel-pt: Fix FUP packet state

Masami Hiramatsu <mhiramat@kernel.org>
    perf probe: Fix memory leakage when the probe point is not found

Masami Hiramatsu <mhiramat@kernel.org>
    perf probe: Fix wrong variable warning when the probe point is not found

Masami Hiramatsu <mhiramat@kernel.org>
    bootconfig: Fix to find the initargs correctly

Kees Cook <keescook@chromium.org>
    module: Correctly truncate sysfs sections output

Johannes Thumshirn <johannes.thumshirn@wdc.com>
    dm: don't call report zones for more than the user requested

John Dorminy <jdorminy@redhat.com>
    dm ebs: Fix incorrect checking for REQ_OP_FLUSH

Anton Blanchard <anton@ozlabs.org>
    pseries: Fix 64 bit logical memory block panic

Jeff Layton <jlayton@kernel.org>
    ceph: handle zero-length feature mask in session messages

Jeff Layton <jlayton@kernel.org>
    ceph: set sec_context xattr on symlink creation

Ahmad Fatoum <a.fatoum@pengutronix.de>
    watchdog: f71808e_wdt: clear watchdog timeout occurred flag

Ahmad Fatoum <a.fatoum@pengutronix.de>
    watchdog: f71808e_wdt: remove use of wrong watchdog_info option

Ahmad Fatoum <a.fatoum@pengutronix.de>
    watchdog: f71808e_wdt: indicate WDIOF_CARDRESET support in watchdog_info.options

Steven Rostedt (VMware) <rostedt@goodmis.org>
    tracing: Use trace_sched_process_free() instead of exit() for pid tracing

Kevin Hao <haokexin@gmail.com>
    tracing/hwlat: Honor the tracing_cpumask

Muchun Song <songmuchun@bytedance.com>
    kprobes: Fix NULL pointer dereference at kprobe_ftrace_handler

Chengming Zhou <zhouchengming@bytedance.com>
    ftrace: Setup correct FTRACE_FL_REGS flags for module

Jia He <justin.he@arm.com>
    mm/memory_hotplug: fix unpaired mem_hotplug_begin/done

Mike Kravetz <mike.kravetz@oracle.com>
    cma: don't quit at first error when activating reserved areas

Michal Koutný <mkoutny@suse.com>
    mm/page_counter.c: fix protection usage propagation

Junxiao Bi <junxiao.bi@oracle.com>
    ocfs2: change slot number type s16 to u16

Peter Zijlstra <peterz@infradead.org>
    mm: fix kthread_use_mm() vs TLB invalidate

David Hildenbrand <david@redhat.com>
    mm/shuffle: don't move pages between zones and don't read garbage memmaps

Mike Kravetz <mike.kravetz@oracle.com>
    hugetlbfs: remove call to huge_pte_alloc without i_mmap_rwsem

Hugh Dickins <hughd@google.com>
    khugepaged: retract_page_tables() remember to test exit

Hugh Dickins <hughd@google.com>
    khugepaged: collapse_pte_mapped_thp() protect the pmd lock

Peter Xu <peterx@redhat.com>
    mm/hugetlb: fix calculation of adjust_range_if_pmd_sharing_possible

Hugh Dickins <hughd@google.com>
    khugepaged: collapse_pte_mapped_thp() flush the right range

Mikulas Patocka <mpatocka@redhat.com>
    ext2: fix missing percpu_counter_inc

Mike Rapoport <rppt@kernel.org>
    MIPS: SGI-IP27: always enable NUMA in Kconfig

Paul Cercueil <paul@crapouillou.net>
    MIPS: qi_lb60: Fix routing to audio amplifier

Huacai Chen <chenhc@lemote.com>
    MIPS: CPU#0 is not hotpluggable

Lukas Wunner <lukas@wunner.de>
    driver core: Avoid binding drivers to dead devices

Vincent Duvert <vincent.ldev@duvert.net>
    appletalk: Fix atalk_proc_init() return path

Johannes Berg <johannes.berg@intel.com>
    mac80211: fix misplaced while instead of if

Coly Li <colyli@suse.de>
    bcache: use disk_{start,end}_io_acct() to count I/O for bcache device

Coly Li <colyli@suse.de>
    bcache: fix bio_{start,end}_io_acct with proper device

Coly Li <colyli@suse.de>
    bcache: avoid nr_stripes overflow in bcache_device_init()

Coly Li <colyli@suse.de>
    bcache: fix overflow in offset_to_stripe()

Coly Li <colyli@suse.de>
    bcache: allocate meta data pages as compound pages

ChangSyun Peng <allenpeng@synology.com>
    md/raid5: Fix Force reconstruct-write io stuck in degraded raid5

Kees Cook <keescook@chromium.org>
    selftests/seccomp: Set NNP for TSYNC ESRCH flag test

Kees Cook <keescook@chromium.org>
    net/compat: Add missing sock updates for SCM_RIGHTS

Kees Cook <keescook@chromium.org>
    pidfd: Add missing sock updates for pidfd_getfd()

Zenghui Yu <yuzenghui@huawei.com>
    irqchip/gic-v4.1: Ensure accessing the correct RD when writing INVALLR

Huacai Chen <chenhc@lemote.com>
    irqchip/loongson-liointc: Fix misuse of gc->mask_cache

Jonathan McDowell <noodles@earth.li>
    net: stmmac: dwmac1000: provide multicast filter fallback

Jonathan McDowell <noodles@earth.li>
    net: ethernet: stmmac: Disable hardware multicast filter

Eugeniu Rosca <erosca@de.adit-jv.com>
    media: vsp1: dl: Fix NULL pointer dereference on unbind

Mansur Alisha Shaik <mansur@codeaurora.org>
    media: venus: fix multiple encoder crash

Paul Cercueil <paul@crapouillou.net>
    pinctrl: ingenic: Properly detect GPIO direction when configured for IRQ

Paul Cercueil <paul@crapouillou.net>
    pinctrl: ingenic: Enhance support for IRQ_TYPE_EDGE_BOTH

Michael Ellerman <mpe@ellerman.id.au>
    powerpc: Fix circular dependency between percpu.h and mmu.h

Michael Ellerman <mpe@ellerman.id.au>
    powerpc: Allow 4224 bytes of stack expansion for the signal frame

Christophe Leroy <christophe.leroy@csgroup.eu>
    powerpc/ptdump: Fix build failure in hashpagetable.c

Paul Aurich <paul@darkrain42.org>
    cifs: Fix leak when handling lease break for cached root fid

Max Filippov <jcmvbkbc@gmail.com>
    xtensa: fix xtensa_pmu_setup prototype

Max Filippov <jcmvbkbc@gmail.com>
    xtensa: add missing exclusive access state management

Lorenzo Bianconi <lorenzo@kernel.org>
    iio: imu: st_lsm6dsx: reset hw ts after resume

Alexandru Ardelean <alexandru.ardelean@analog.com>
    iio: dac: ad5592r: fix unbalanced mutex unlocks in ad5592r_read_raw()

Christian Eggers <ceggers@arri.de>
    dt-bindings: iio: io-channel-mux: Fix compatible string in example code

Shaokun Zhang <zhangshaokun@hisilicon.com>
    arm64: perf: Correct the event index in sysfs

Sibi Sankar <sibis@codeaurora.org>
    arm64: dts: qcom: sc7180: Drop the unused non-MSA SID

Boleyn Su <boleynsu@google.com>
    btrfs: check correct variable after allocation in btrfs_backref_iter_alloc

Pavel Machek <pavel@denx.de>
    btrfs: fix return value mixup in btrfs_get_extent

Josef Bacik <josef@toxicpanda.com>
    btrfs: make sure SB_I_VERSION doesn't get unset by remount

Qu Wenruo <wqu@suse.com>
    btrfs: trim: fix underflow in trim length to prevent access beyond device boundary

Filipe Manana <fdmanana@suse.com>
    btrfs: fix memory leaks after failure to lookup checksums during inode logging

Qu Wenruo <wqu@suse.com>
    btrfs: inode: fix NULL pointer dereference if inode doesn't need compression

Josef Bacik <josef@toxicpanda.com>
    btrfs: only search for left_info if there is no right_info in try_merge_free_space

David Sterba <dsterba@suse.com>
    btrfs: fix messages after changing compression level by remount

Josef Bacik <josef@toxicpanda.com>
    btrfs: don't show full path of bind mounts in subvol=

Filipe Manana <fdmanana@suse.com>
    btrfs: fix race between page release and a fast fsync

Josef Bacik <josef@toxicpanda.com>
    btrfs: don't WARN if we abort a transaction with EROFS

Josef Bacik <josef@toxicpanda.com>
    btrfs: sysfs: use NOFS for device creation

Josef Bacik <josef@toxicpanda.com>
    btrfs: return EROFS for BTRFS_FS_STATE_ERROR cases

Qu Wenruo <wqu@suse.com>
    btrfs: avoid possible signal interruption of btrfs_drop_snapshot() on relocation tree

David Sterba <dsterba@suse.com>
    btrfs: add missing check for nocow and compression inode flags

Qu Wenruo <wqu@suse.com>
    btrfs: relocation: review the call sites which can be interrupted by signal

Josef Bacik <josef@toxicpanda.com>
    btrfs: move the chunk_mutex in btrfs_read_chunk_tree

Josef Bacik <josef@toxicpanda.com>
    btrfs: open device without device_list_mutex

Johannes Thumshirn <johannes.thumshirn@wdc.com>
    btrfs: pass checksum type via BTRFS_IOC_FS_INFO ioctl

Anand Jain <anand.jain@oracle.com>
    btrfs: don't traverse into the seed devices in show_devname

Filipe Manana <fdmanana@suse.com>
    btrfs: remove no longer needed use of log_writers for the log root tree

Filipe Manana <fdmanana@suse.com>
    btrfs: only commit delayed items at fsync if we are logging a directory

Filipe Manana <fdmanana@suse.com>
    btrfs: stop incremening log_batch for the log root tree when syncing log

Filipe Manana <fdmanana@suse.com>
    btrfs: only commit the delayed inode when doing a full fsync

Tom Rix <trix@redhat.com>
    btrfs: ref-verify: fix memory leak in add_block_entry

Qu Wenruo <wqu@suse.com>
    btrfs: preallocate anon block device at first phase of snapshot creation

Qu Wenruo <wqu@suse.com>
    btrfs: don't allocate anonymous block device for user invisible roots

Qu Wenruo <wqu@suse.com>
    btrfs: free anon block device right after subvolume deletion

David Sterba <dsterba@suse.com>
    btrfs: allow use of global block reserve for balance item deletion

Ansuel Smith <ansuelsmth@gmail.com>
    PCI: qcom: Add support for tx term offset for rev 2.1.0

Ansuel Smith <ansuelsmth@gmail.com>
    PCI: qcom: Define some PARF params needed for ipq8064 SoC

Rajat Jain <rajatja@google.com>
    PCI: Add device even if driver attach failed

Kai-Heng Feng <kai.heng.feng@canonical.com>
    PCI: Mark AMD Navi10 GPU rev 0x00 ATS as broken

Ashok Raj <ashok.raj@intel.com>
    PCI/ATS: Add pci_pri_supported() to check device or associated PF

Rafael J. Wysocki <rafael.j.wysocki@intel.com>
    PCI: hotplug: ACPI: Fix context refcounting in acpiphp_grab_context()

Guenter Roeck <linux@roeck-us.net>
    genirq/PM: Always unlock IRQ descriptor in rearm_wake_irq()

Guenter Roeck <linux@roeck-us.net>
    genirq: Unlock irq descriptor after errors

Thomas Gleixner <tglx@linutronix.de>
    genirq/affinity: Make affinity setting if activated opt-in

Steve French <stfrench@microsoft.com>
    SMB3: Fix mkdir when idsfromsid configured on mount

Steve French <stfrench@microsoft.com>
    smb3: warn on confusing error scenario with sec=krb5

Takashi Iwai <tiwai@suse.de>
    ALSA: hda/realtek - Fix unused variable warning


-------------

Diffstat:

 Documentation/admin-guide/hw-vuln/multihit.rst     |   4 +
 .../bindings/iio/multiplexer/io-channel-mux.txt    |   2 +-
 Makefile                                           |   4 +-
 arch/arm64/boot/dts/qcom/sc7180-idp.dts            |   2 +-
 arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi         |   2 +-
 arch/arm64/kernel/perf_event.c                     |  13 +-
 arch/mips/Kconfig                                  |   1 +
 arch/mips/boot/dts/ingenic/qi_lb60.dts             |   2 +-
 arch/mips/kernel/topology.c                        |   2 +-
 arch/openrisc/kernel/stacktrace.c                  |  18 ++-
 arch/powerpc/include/asm/percpu.h                  |   4 +-
 arch/powerpc/mm/fault.c                            |   7 +-
 arch/powerpc/mm/ptdump/hashpagetable.c             |   2 +-
 arch/powerpc/platforms/pseries/hotplug-memory.c    |   2 +-
 arch/s390/Kconfig                                  |   1 +
 arch/s390/lib/test_unwind.c                        |   1 +
 arch/sh/boards/mach-landisk/setup.c                |   3 +
 arch/sh/mm/fault.c                                 |   1 -
 arch/x86/events/rapl.c                             |   2 +-
 arch/x86/kernel/apic/vector.c                      |   4 +
 arch/x86/kernel/cpu/bugs.c                         |   8 +-
 arch/x86/kernel/tsc_msr.c                          |   9 +-
 arch/xtensa/include/asm/thread_info.h              |   4 +
 arch/xtensa/kernel/asm-offsets.c                   |   3 +
 arch/xtensa/kernel/entry.S                         |  11 ++
 arch/xtensa/kernel/perf_event.c                    |   2 +-
 crypto/af_alg.c                                    |  11 +-
 crypto/algif_aead.c                                |  10 +-
 crypto/algif_skcipher.c                            |  11 +-
 drivers/acpi/nfit/core.c                           |  11 +-
 drivers/acpi/nfit/nfit.h                           |   1 -
 drivers/base/dd.c                                  |   4 +-
 drivers/clk/Kconfig                                |   2 +-
 drivers/clk/actions/owl-s500.c                     |   2 +-
 drivers/clk/bcm/clk-bcm2835.c                      |  25 +++-
 drivers/clk/qcom/clk-alpha-pll.c                   |   2 -
 drivers/clk/qcom/gcc-sdm660.c                      |   3 +
 drivers/clk/qcom/gcc-sm8150.c                      |   8 +-
 drivers/clk/sirf/clk-atlas6.c                      |   2 +-
 drivers/crypto/caam/caamalg.c                      |  29 -----
 drivers/crypto/caam/compat.h                       |   1 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c        |  11 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c  |  23 ++++
 .../drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c |  69 +++++++++-
 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c   |   5 +-
 drivers/gpu/drm/drm_dp_mst_topology.c              |  41 +++---
 drivers/gpu/drm/drm_panel_orientation_quirks.c     |   6 +
 drivers/gpu/drm/i915/gt/intel_gt.c                 |   5 +
 drivers/gpu/drm/imx/imx-ldb.c                      |   7 +-
 drivers/gpu/drm/ingenic/ingenic-drm.c              |   2 +-
 drivers/gpu/drm/omapdrm/dss/dispc.c                |   1 +
 drivers/gpu/drm/omapdrm/dss/dsi.c                  |   1 +
 drivers/gpu/drm/omapdrm/dss/dss.c                  |   1 +
 drivers/gpu/drm/omapdrm/dss/venc.c                 |   1 +
 drivers/gpu/drm/panfrost/panfrost_gem.c            |   2 +-
 drivers/gpu/drm/panfrost/panfrost_mmu.c            |   2 +-
 drivers/gpu/drm/radeon/ni_dpm.c                    |   2 +-
 drivers/gpu/drm/tidss/tidss_kms.c                  |   2 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c                |   8 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c                |   5 +-
 drivers/gpu/ipu-v3/ipu-image-convert.c             | 145 +++++++++++++--------
 drivers/i2c/busses/i2c-bcm-iproc.c                 |  13 +-
 drivers/i2c/busses/i2c-rcar.c                      |  15 ++-
 drivers/iio/dac/ad5592r-base.c                     |   4 +-
 drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h            |   3 +-
 drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c     |  23 ++--
 drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c       |   2 +-
 drivers/infiniband/core/counters.c                 |   4 +-
 drivers/infiniband/core/uverbs_cmd.c               |   4 +
 drivers/infiniband/hw/cxgb4/mem.c                  |   1 -
 drivers/infiniband/hw/mlx4/mr.c                    |   1 -
 drivers/infiniband/ulp/ipoib/ipoib.h               |   2 +-
 drivers/infiniband/ulp/ipoib/ipoib_ib.c            |  67 +++++-----
 drivers/infiniband/ulp/ipoib/ipoib_main.c          |   2 +
 drivers/input/mouse/sentelic.c                     |   2 +-
 drivers/iommu/intel/dmar.c                         |  21 ++-
 drivers/iommu/intel/iommu.c                        |   7 +-
 drivers/iommu/intel/svm.c                          |  22 ++--
 drivers/iommu/omap-iommu-debug.c                   |   3 +
 drivers/irqchip/irq-gic-v3-its.c                   |  15 ++-
 drivers/irqchip/irq-loongson-liointc.c             |  10 +-
 drivers/md/bcache/bcache.h                         |   2 +-
 drivers/md/bcache/bset.c                           |   2 +-
 drivers/md/bcache/btree.c                          |   2 +-
 drivers/md/bcache/journal.c                        |   4 +-
 drivers/md/bcache/request.c                        |  14 +-
 drivers/md/bcache/super.c                          |  14 +-
 drivers/md/bcache/writeback.c                      |  14 +-
 drivers/md/bcache/writeback.h                      |  19 ++-
 drivers/md/dm-ebs-target.c                         |   2 +-
 drivers/md/dm-rq.c                                 |   3 -
 drivers/md/dm.c                                    |   3 +-
 drivers/md/md-cluster.c                            |   1 +
 drivers/md/raid5.c                                 |   3 +-
 drivers/media/platform/qcom/venus/pm_helpers.c     |   4 +
 drivers/media/platform/rockchip/rga/rga-hw.c       |  29 +++--
 drivers/media/platform/rockchip/rga/rga-hw.h       |   5 +
 drivers/media/platform/vsp1/vsp1_dl.c              |   2 +
 drivers/mfd/arizona-core.c                         |  18 +++
 drivers/mfd/dln2.c                                 |   4 +
 drivers/mmc/host/renesas_sdhi_internal_dmac.c      |  18 ++-
 drivers/mtd/nand/raw/brcmnand/brcmnand.c           |  26 ++++
 drivers/mtd/nand/raw/fsl_upm.c                     |   1 -
 drivers/mtd/ubi/fastmap-wl.c                       |   5 +
 drivers/mtd/ubi/wl.c                               |   3 +-
 drivers/net/ethernet/marvell/octeontx2/af/common.h |   2 +-
 drivers/net/ethernet/qualcomm/emac/emac.c          |  17 ++-
 .../net/ethernet/stmicro/stmmac/dwmac-ipq806x.c    |   1 +
 .../net/ethernet/stmicro/stmmac/dwmac1000_core.c   |   3 +
 drivers/net/wireless/realtek/rtw88/pci.c           |   9 ++
 drivers/nvdimm/bus.c                               |  16 +++
 drivers/nvdimm/security.c                          |  13 +-
 drivers/nvme/host/core.c                           |  15 +++
 drivers/nvme/host/fabrics.c                        |   2 +-
 drivers/nvme/host/fabrics.h                        |   3 +-
 drivers/nvme/host/fc.c                             |   1 +
 drivers/nvme/host/multipath.c                      |  18 ++-
 drivers/nvme/host/nvme.h                           |   1 +
 drivers/nvme/host/rdma.c                           |  10 +-
 drivers/nvme/host/tcp.c                            |  15 ++-
 drivers/pci/ats.c                                  |  15 +++
 drivers/pci/bus.c                                  |   6 +-
 drivers/pci/controller/dwc/pcie-qcom.c             |  41 +++++-
 drivers/pci/controller/pci-hyperv.c                |  71 +++++-----
 drivers/pci/hotplug/acpiphp_glue.c                 |  14 +-
 drivers/pci/quirks.c                               |   5 +-
 drivers/pinctrl/pinctrl-ingenic.c                  |   9 +-
 drivers/platform/chrome/cros_ec_ishtp.c            |   4 +-
 drivers/pwm/pwm-bcm-iproc.c                        |   9 +-
 drivers/remoteproc/qcom_q6v5.c                     |   2 +
 drivers/remoteproc/qcom_q6v5_mss.c                 |  11 +-
 drivers/rtc/rtc-cpcap.c                            |   2 +-
 drivers/rtc/rtc-pl031.c                            |   1 +
 drivers/scsi/lpfc/lpfc_nvmet.c                     |   2 +-
 drivers/staging/media/rkisp1/rkisp1-common.h       |   3 +
 drivers/staging/media/rkisp1/rkisp1-isp.c          |  46 +++----
 drivers/staging/media/rkisp1/rkisp1-resizer.c      |   2 +-
 drivers/usb/serial/ftdi_sio.c                      |  57 ++++----
 drivers/vdpa/vdpa_sim/vdpa_sim.c                   |   3 +-
 drivers/watchdog/f71808e_wdt.c                     |  13 +-
 drivers/watchdog/rti_wdt.c                         |   2 +
 drivers/watchdog/watchdog_dev.c                    |  18 +--
 fs/btrfs/backref.c                                 |   2 +-
 fs/btrfs/ctree.h                                   |   4 +-
 fs/btrfs/disk-io.c                                 |  78 ++++++++++-
 fs/btrfs/disk-io.h                                 |   2 +
 fs/btrfs/extent-io-tree.h                          |   2 +
 fs/btrfs/extent-tree.c                             |  23 +++-
 fs/btrfs/extent_io.c                               |  18 ++-
 fs/btrfs/free-space-cache.c                        |   4 +-
 fs/btrfs/inode.c                                   |  20 ++-
 fs/btrfs/ioctl.c                                   |  67 ++++++++--
 fs/btrfs/ref-verify.c                              |   2 +
 fs/btrfs/relocation.c                              |  12 +-
 fs/btrfs/scrub.c                                   |   2 +-
 fs/btrfs/super.c                                   |  51 +++++---
 fs/btrfs/sysfs.c                                   |   3 +
 fs/btrfs/transaction.c                             |   7 +-
 fs/btrfs/transaction.h                             |   2 +
 fs/btrfs/tree-log.c                                |  43 ++----
 fs/btrfs/volumes.c                                 |  48 ++++++-
 fs/ceph/dir.c                                      |   4 +
 fs/ceph/mds_client.c                               |   6 +-
 fs/cifs/smb2inode.c                                |   1 +
 fs/cifs/smb2misc.c                                 |  73 ++++++++---
 fs/cifs/smb2pdu.c                                  |   2 +
 fs/ext2/ialloc.c                                   |   3 +-
 fs/f2fs/compress.c                                 |   2 +
 fs/f2fs/data.c                                     |   4 +
 fs/gfs2/bmap.c                                     |  69 +++++-----
 fs/gfs2/glock.c                                    |   4 +-
 fs/minix/inode.c                                   |  12 +-
 fs/minix/itree_v1.c                                |  12 +-
 fs/minix/itree_v2.c                                |  13 +-
 fs/minix/minix.h                                   |   1 -
 fs/nfs/file.c                                      |  17 ++-
 fs/nfs/flexfilelayout/flexfilelayout.c             |  50 +++++--
 fs/nfs/nfs4file.c                                  |   5 +-
 fs/nfs/nfs4proc.c                                  |   2 -
 fs/nfs/nfs4xdr.c                                   |   6 +-
 fs/nfs/pnfs.c                                      |   4 +-
 fs/nfs/pnfs.h                                      |   2 +-
 fs/ocfs2/ocfs2.h                                   |   4 +-
 fs/ocfs2/suballoc.c                                |   4 +-
 fs/ocfs2/super.c                                   |   4 +-
 fs/ubifs/journal.c                                 |  10 +-
 fs/ufs/super.c                                     |   2 +-
 include/crypto/if_alg.h                            |   4 +-
 include/linux/fs.h                                 |  10 ++
 include/linux/hugetlb.h                            |   8 +-
 include/linux/intel-iommu.h                        |   4 +-
 include/linux/irq.h                                |  13 ++
 include/linux/libnvdimm.h                          |   2 +
 include/linux/pci-ats.h                            |   4 +
 include/net/sock.h                                 |   4 +
 include/uapi/linux/btrfs.h                         |  14 +-
 include/uapi/linux/ndctl.h                         |   4 +
 init/main.c                                        |  14 +-
 kernel/irq/manage.c                                |  13 +-
 kernel/irq/pm.c                                    |   8 +-
 kernel/kprobes.c                                   |  24 +++-
 kernel/kthread.c                                   |   7 +-
 kernel/module.c                                    |  22 +++-
 kernel/pid.c                                       |   7 +-
 kernel/sched/core.c                                |  81 +++++++++++-
 kernel/sched/cpufreq_schedutil.c                   |   2 +-
 kernel/sched/sched.h                               |  47 ++++++-
 kernel/trace/ftrace.c                              |  15 ++-
 kernel/trace/trace_events.c                        |   4 +-
 kernel/trace/trace_hwlat.c                         |   5 +-
 lib/devres.c                                       |  11 +-
 lib/test_kmod.c                                    |   2 +-
 lib/test_lockup.c                                  |   4 +-
 mm/cma.c                                           |  23 ++--
 mm/hugetlb.c                                       |  39 +++---
 mm/khugepaged.c                                    |  70 +++++-----
 mm/memory_hotplug.c                                |   5 +-
 mm/page_counter.c                                  |   6 +-
 mm/rmap.c                                          |   2 +-
 mm/shuffle.c                                       |  18 +--
 net/appletalk/atalk_proc.c                         |   2 +
 net/compat.c                                       |   1 +
 net/core/sock.c                                    |  21 +++
 net/mac80211/sta_info.c                            |   2 +-
 scripts/recordmcount.c                             |   2 +
 security/integrity/ima/ima_policy.c                |  15 ++-
 sound/pci/echoaudio/echoaudio.c                    |   2 -
 sound/pci/hda/patch_realtek.c                      |   2 -
 tools/build/Makefile.feature                       |   2 +-
 tools/build/feature/Makefile                       |   2 -
 tools/perf/bench/mem-functions.c                   |  21 +--
 tools/perf/builtin-record.c                        |   4 +-
 tools/perf/tests/parse-events.c                    |  37 +++++-
 tools/perf/util/evsel.c                            |   6 +-
 .../perf/util/intel-pt-decoder/intel-pt-decoder.c  |  29 ++---
 tools/perf/util/parse-events.c                     |  28 ++++
 tools/perf/util/parse-events.h                     |   2 +
 tools/perf/util/parse-events.l                     |  19 +--
 tools/perf/util/probe-finder.c                     |   5 +-
 tools/testing/selftests/bpf/Makefile               |  49 +++----
 tools/testing/selftests/bpf/test_progs.c           |  33 ++++-
 tools/testing/selftests/bpf/test_progs.h           |   2 +
 .../testing/selftests/powerpc/ptrace/ptrace-pkey.c |  55 ++++----
 tools/testing/selftests/seccomp/seccomp_bpf.c      |   5 +
 244 files changed, 2095 insertions(+), 909 deletions(-)



^ permalink raw reply	[relevance 4%]

* [PATCH 5.8 109/232] remoteproc: qcom_q6v5_mss: Validate MBA firmware size before load
  2020-08-20  9:17  4% [PATCH 5.8 000/232] 5.8.3-rc1 review Greg Kroah-Hartman
  2020-08-20  9:18  9% ` [PATCH 5.8 042/232] arm64: dts: qcom: sc7180: Drop the unused non-MSA SID Greg Kroah-Hartman
  2020-08-20  9:19  9% ` [PATCH 5.8 108/232] remoteproc: qcom: q6v5: Update running state before requesting stop Greg Kroah-Hartman
@ 2020-08-20  9:19  9% ` Greg Kroah-Hartman
  2020-08-20  9:19  9% ` [PATCH 5.8 110/232] remoteproc: qcom_q6v5_mss: Validate modem blob " Greg Kroah-Hartman
  3 siblings, 0 replies; 200+ results
From: Greg Kroah-Hartman @ 2020-08-20  9:19 UTC (permalink / raw)
  To: linux-kernel; +Cc: Greg Kroah-Hartman, stable, Bjorn Andersson, Sibi Sankar

From: Sibi Sankar <sibis@codeaurora.org>

commit e013f455d95add874f310dc47c608e8c70692ae5 upstream.

The following mem abort is observed when the mba firmware size exceeds
the allocated mba region. MBA firmware size is restricted to a maximum
size of 1M and remaining memory region is used by modem debug policy
firmware when available. Hence verify whether the MBA firmware size lies
within the allocated memory region and is not greater than 1M before
loading.

Err Logs:
Unable to handle kernel paging request at virtual address
Mem abort info:
...
Call trace:
  __memcpy+0x110/0x180
  rproc_start+0x40/0x218
  rproc_boot+0x5b4/0x608
  state_store+0x54/0xf8
  dev_attr_store+0x44/0x60
  sysfs_kf_write+0x58/0x80
  kernfs_fop_write+0x140/0x230
  vfs_write+0xc4/0x208
  ksys_write+0x74/0xf8
  __arm64_sys_write+0x24/0x30
...

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Fixes: 051fb70fd4ea4 ("remoteproc: qcom: Driver for the self-authenticating Hexagon v5")
Cc: stable@vger.kernel.org
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200722201047.12975-2-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 drivers/remoteproc/qcom_q6v5_mss.c |    6 ++++++
 1 file changed, 6 insertions(+)

--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -407,6 +407,12 @@ static int q6v5_load(struct rproc *rproc
 {
 	struct q6v5 *qproc = rproc->priv;
 
+	/* MBA is restricted to a maximum size of 1M */
+	if (fw->size > qproc->mba_size || fw->size > SZ_1M) {
+		dev_err(qproc->dev, "MBA firmware load failed\n");
+		return -EINVAL;
+	}
+
 	memcpy(qproc->mba_region, fw->data, fw->size);
 
 	return 0;



^ permalink raw reply	[relevance 9%]

* [PATCH 5.8 108/232] remoteproc: qcom: q6v5: Update running state before requesting stop
  2020-08-20  9:17  4% [PATCH 5.8 000/232] 5.8.3-rc1 review Greg Kroah-Hartman
  2020-08-20  9:18  9% ` [PATCH 5.8 042/232] arm64: dts: qcom: sc7180: Drop the unused non-MSA SID Greg Kroah-Hartman
@ 2020-08-20  9:19  9% ` Greg Kroah-Hartman
  2020-08-20  9:19  9% ` [PATCH 5.8 109/232] remoteproc: qcom_q6v5_mss: Validate MBA firmware size before load Greg Kroah-Hartman
  2020-08-20  9:19  9% ` [PATCH 5.8 110/232] remoteproc: qcom_q6v5_mss: Validate modem blob " Greg Kroah-Hartman
  3 siblings, 0 replies; 200+ results
From: Greg Kroah-Hartman @ 2020-08-20  9:19 UTC (permalink / raw)
  To: linux-kernel
  Cc: Greg Kroah-Hartman, stable, Evan Green, Sibi Sankar, Bjorn Andersson

From: Sibi Sankar <sibis@codeaurora.org>

commit 5b7be880074c73540948f8fc597e0407b98fabfa upstream.

Sometimes the stop triggers a watchdog rather than a stop-ack. Update
the running state to false on requesting stop to skip the watchdog
instead.

Error Logs:
$ echo stop > /sys/class/remoteproc/remoteproc0/state
ipa 1e40000.ipa: received modem stopping event
remoteproc-modem: watchdog received: sys_m_smsm_mpss.c:291:APPS force stop
qcom-q6v5-mss 4080000.remoteproc-modem: port failed halt
ipa 1e40000.ipa: received modem offline event
remoteproc0: stopped remote processor 4080000.remoteproc-modem

Reviewed-by: Evan Green <evgreen@chromium.org>
Fixes: 3b415c8fb263 ("remoteproc: q6v5: Extract common resource handling")
Cc: stable@vger.kernel.org
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200602163257.26978-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 drivers/remoteproc/qcom_q6v5.c |    2 ++
 1 file changed, 2 insertions(+)

--- a/drivers/remoteproc/qcom_q6v5.c
+++ b/drivers/remoteproc/qcom_q6v5.c
@@ -153,6 +153,8 @@ int qcom_q6v5_request_stop(struct qcom_q
 {
 	int ret;
 
+	q6v5->running = false;
+
 	qcom_smem_state_update_bits(q6v5->state,
 				    BIT(q6v5->stop_bit), BIT(q6v5->stop_bit));
 



^ permalink raw reply	[relevance 9%]

* [PATCH 5.8 110/232] remoteproc: qcom_q6v5_mss: Validate modem blob firmware size before load
  2020-08-20  9:17  4% [PATCH 5.8 000/232] 5.8.3-rc1 review Greg Kroah-Hartman
                   ` (2 preceding siblings ...)
  2020-08-20  9:19  9% ` [PATCH 5.8 109/232] remoteproc: qcom_q6v5_mss: Validate MBA firmware size before load Greg Kroah-Hartman
@ 2020-08-20  9:19  9% ` Greg Kroah-Hartman
  3 siblings, 0 replies; 200+ results
From: Greg Kroah-Hartman @ 2020-08-20  9:19 UTC (permalink / raw)
  To: linux-kernel; +Cc: Greg Kroah-Hartman, stable, Bjorn Andersson, Sibi Sankar

From: Sibi Sankar <sibis@codeaurora.org>

commit 135b9e8d1cd8ba5ac9ad9bcf24b464b7b052e5b8 upstream.

The following mem abort is observed when one of the modem blob firmware
size exceeds the allocated mpss region. Fix this by restricting the copy
size to segment size using request_firmware_into_buf before load.

Err Logs:
Unable to handle kernel paging request at virtual address
Mem abort info:
...
Call trace:
  __memcpy+0x110/0x180
  rproc_start+0xd0/0x190
  rproc_boot+0x404/0x550
  state_store+0x54/0xf8
  dev_attr_store+0x44/0x60
  sysfs_kf_write+0x58/0x80
  kernfs_fop_write+0x140/0x230
  vfs_write+0xc4/0x208
  ksys_write+0x74/0xf8
...

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Fixes: 051fb70fd4ea4 ("remoteproc: qcom: Driver for the self-authenticating Hexagon v5")
Cc: stable@vger.kernel.org
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200722201047.12975-3-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 drivers/remoteproc/qcom_q6v5_mss.c |    5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -1144,15 +1144,14 @@ static int q6v5_mpss_load(struct q6v5 *q
 		} else if (phdr->p_filesz) {
 			/* Replace "xxx.xxx" with "xxx.bxx" */
 			sprintf(fw_name + fw_name_len - 3, "b%02d", i);
-			ret = request_firmware(&seg_fw, fw_name, qproc->dev);
+			ret = request_firmware_into_buf(&seg_fw, fw_name, qproc->dev,
+							ptr, phdr->p_filesz);
 			if (ret) {
 				dev_err(qproc->dev, "failed to load %s\n", fw_name);
 				iounmap(ptr);
 				goto release_firmware;
 			}
 
-			memcpy(ptr, seg_fw->data, seg_fw->size);
-
 			release_firmware(seg_fw);
 		}
 



^ permalink raw reply	[relevance 9%]

* [PATCH 5.7 095/204] remoteproc: qcom_q6v5_mss: Validate MBA firmware size before load
  2020-08-20  9:18  4% [PATCH 5.7 000/204] 5.7.17-rc1 review Greg Kroah-Hartman
  2020-08-20  9:19  9% ` [PATCH 5.7 094/204] remoteproc: qcom: q6v5: Update running state before requesting stop Greg Kroah-Hartman
@ 2020-08-20  9:19  9% ` Greg Kroah-Hartman
  2020-08-20  9:19  9% ` [PATCH 5.7 096/204] remoteproc: qcom_q6v5_mss: Validate modem blob " Greg Kroah-Hartman
  2 siblings, 0 replies; 200+ results
From: Greg Kroah-Hartman @ 2020-08-20  9:19 UTC (permalink / raw)
  To: linux-kernel; +Cc: Greg Kroah-Hartman, stable, Bjorn Andersson, Sibi Sankar

From: Sibi Sankar <sibis@codeaurora.org>

commit e013f455d95add874f310dc47c608e8c70692ae5 upstream.

The following mem abort is observed when the mba firmware size exceeds
the allocated mba region. MBA firmware size is restricted to a maximum
size of 1