From: Conor Dooley <conor.dooley@microchip.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Xingyu Wu <xingyu.wu@starfivetech.com>,
<linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Conor Dooley <conor@kernel.org>,
Emil Renner Berthing <kernel@esmil.dk>,
Rob Herring <robh+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Hal Feng <hal.feng@starfivetech.com>,
William Qiu <william.qiu@starfivetech.com>,
<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v4 5/7] dt-bindings: soc: starfive: Add StarFive syscon module
Date: Fri, 12 May 2023 07:43:35 +0100 [thread overview]
Message-ID: <20230512-brewery-spouse-86350c9664d8@wendy> (raw)
In-Reply-To: <2fb8c88a-dab5-791b-eefe-c983decad5e8@linaro.org>
[-- Attachment #1.1: Type: text/plain, Size: 521 bytes --]
On Fri, May 12, 2023 at 08:35:43AM +0200, Krzysztof Kozlowski wrote:
> On 12/05/2023 04:20, Xingyu Wu wrote:
> > From: William Qiu <william.qiu@starfivetech.com>
> > + "#power-domain-cells":
> > + const: 1
>
> Add it to the existing examples.
>
> This part confuses me... why aon appeared here? Why power-controller
> disappeared? I don't think that Rob or me proposed any of this.
Rob did actually suggest this, as the power-controller child node had no
properties other than #power-domain-cells.
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 161 bytes --]
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor.dooley@microchip.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Xingyu Wu <xingyu.wu@starfivetech.com>,
<linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Conor Dooley <conor@kernel.org>,
Emil Renner Berthing <kernel@esmil.dk>,
Rob Herring <robh+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Hal Feng <hal.feng@starfivetech.com>,
William Qiu <william.qiu@starfivetech.com>,
<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v4 5/7] dt-bindings: soc: starfive: Add StarFive syscon module
Date: Fri, 12 May 2023 07:43:35 +0100 [thread overview]
Message-ID: <20230512-brewery-spouse-86350c9664d8@wendy> (raw)
In-Reply-To: <2fb8c88a-dab5-791b-eefe-c983decad5e8@linaro.org>
[-- Attachment #1: Type: text/plain, Size: 521 bytes --]
On Fri, May 12, 2023 at 08:35:43AM +0200, Krzysztof Kozlowski wrote:
> On 12/05/2023 04:20, Xingyu Wu wrote:
> > From: William Qiu <william.qiu@starfivetech.com>
> > + "#power-domain-cells":
> > + const: 1
>
> Add it to the existing examples.
>
> This part confuses me... why aon appeared here? Why power-controller
> disappeared? I don't think that Rob or me proposed any of this.
Rob did actually suggest this, as the power-controller child node had no
properties other than #power-domain-cells.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
next prev parent reply other threads:[~2023-05-12 6:44 UTC|newest]
Thread overview: 102+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-12 2:20 [PATCH v4 0/7] Add PLL clocks driver and syscon for StarFive JH7110 SoC Xingyu Wu
2023-05-12 2:20 ` Xingyu Wu
2023-05-12 2:20 ` [PATCH v4 1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Xingyu Wu
2023-05-12 2:20 ` Xingyu Wu
2023-05-19 13:57 ` Torsten Duwe
2023-05-19 13:57 ` Torsten Duwe
2023-05-19 14:16 ` Conor Dooley
2023-05-19 14:16 ` Conor Dooley
2023-05-23 2:40 ` Xingyu Wu
2023-05-23 2:40 ` Xingyu Wu
2023-05-23 2:42 ` Xingyu Wu
2023-05-23 2:42 ` Xingyu Wu
2023-05-23 2:56 ` Xingyu Wu
2023-05-23 2:56 ` Xingyu Wu
2023-05-23 8:28 ` Conor Dooley
2023-05-23 8:28 ` Conor Dooley
2023-05-23 11:10 ` Torsten Duwe
2023-05-23 11:10 ` Torsten Duwe
2023-05-23 11:28 ` Conor Dooley
2023-05-23 11:28 ` Conor Dooley
2023-05-24 9:00 ` Xingyu Wu
2023-05-24 9:00 ` Xingyu Wu
2023-05-24 10:19 ` Conor Dooley
2023-05-24 10:19 ` Conor Dooley
2023-05-26 7:34 ` Torsten Duwe
2023-05-26 7:34 ` Torsten Duwe
2023-05-26 12:23 ` Conor Dooley
2023-05-26 12:23 ` Conor Dooley
2023-06-02 9:42 ` Xingyu Wu
2023-06-02 9:42 ` Xingyu Wu
2023-06-12 3:06 ` Xingyu Wu
2023-06-12 3:06 ` Xingyu Wu
2023-06-02 16:39 ` Torsten Duwe
2023-06-02 16:39 ` Torsten Duwe
2023-06-02 16:43 ` Conor Dooley
2023-06-02 16:43 ` Conor Dooley
2023-06-02 16:57 ` Torsten Duwe
2023-06-02 16:57 ` Torsten Duwe
2023-06-02 16:59 ` Conor Dooley
2023-06-02 16:59 ` Conor Dooley
2023-06-02 22:56 ` Torsten Duwe
2023-06-02 22:56 ` Torsten Duwe
2023-05-12 2:20 ` [PATCH v4 2/7] clk: starfive: Add StarFive JH7110 PLL clock driver Xingyu Wu
2023-05-12 2:20 ` Xingyu Wu
2023-06-01 11:02 ` Emil Renner Berthing
2023-06-01 11:02 ` Emil Renner Berthing
2023-06-02 9:39 ` Xingyu Wu
2023-06-02 9:39 ` Xingyu Wu
2023-06-02 14:53 ` Emil Renner Berthing
2023-06-02 14:53 ` Emil Renner Berthing
2023-05-12 2:20 ` [PATCH v4 3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Xingyu Wu
2023-05-12 2:20 ` Xingyu Wu
2023-05-12 6:47 ` Conor Dooley
2023-05-12 6:47 ` Conor Dooley
2023-05-12 8:07 ` Xingyu Wu
2023-05-12 8:07 ` Xingyu Wu
2023-05-12 9:35 ` Conor Dooley
2023-05-12 9:35 ` Conor Dooley
2023-05-12 9:56 ` Xingyu Wu
2023-05-12 9:56 ` Xingyu Wu
2023-05-12 13:49 ` Conor Dooley
2023-05-12 13:49 ` Conor Dooley
2023-05-19 7:59 ` Xingyu Wu
2023-05-19 7:59 ` Xingyu Wu
2023-05-19 8:12 ` Conor Dooley
2023-05-19 8:12 ` Conor Dooley
2023-05-19 8:26 ` Xingyu Wu
2023-05-19 8:26 ` Xingyu Wu
2023-05-12 2:20 ` [PATCH v4 4/7] clk: starfive: jh7110-sys: Modify PLL clocks source Xingyu Wu
2023-05-12 2:20 ` Xingyu Wu
2023-05-12 2:20 ` [PATCH v4 5/7] dt-bindings: soc: starfive: Add StarFive syscon module Xingyu Wu
2023-05-12 2:20 ` Xingyu Wu
2023-05-12 6:35 ` Krzysztof Kozlowski
2023-05-12 6:35 ` Krzysztof Kozlowski
2023-05-12 6:43 ` Conor Dooley [this message]
2023-05-12 6:43 ` Conor Dooley
2023-05-12 6:50 ` Krzysztof Kozlowski
2023-05-12 6:50 ` Krzysztof Kozlowski
2023-05-12 7:24 ` Xingyu Wu
2023-05-12 7:24 ` Xingyu Wu
2023-05-12 7:34 ` Krzysztof Kozlowski
2023-05-12 7:34 ` Krzysztof Kozlowski
2023-05-12 6:50 ` Krzysztof Kozlowski
2023-05-12 6:50 ` Krzysztof Kozlowski
2023-05-12 7:51 ` Xingyu Wu
2023-05-12 7:51 ` Xingyu Wu
2023-05-12 16:15 ` Krzysztof Kozlowski
2023-05-12 16:15 ` Krzysztof Kozlowski
2023-05-12 2:20 ` [PATCH v4 6/7] riscv: dts: starfive: jh7110: Add syscon nodes Xingyu Wu
2023-05-12 2:20 ` Xingyu Wu
2023-05-12 6:36 ` Krzysztof Kozlowski
2023-05-12 6:36 ` Krzysztof Kozlowski
2023-05-12 2:20 ` [PATCH v4 7/7] riscv: dts: starfive: jh7110: Add PLL clock node and modify syscrg node Xingyu Wu
2023-05-12 2:20 ` Xingyu Wu
2023-05-12 6:37 ` Krzysztof Kozlowski
2023-05-12 6:37 ` Krzysztof Kozlowski
2023-05-12 7:15 ` Xingyu Wu
2023-05-12 7:15 ` Xingyu Wu
2023-05-12 7:22 ` Krzysztof Kozlowski
2023-05-12 7:22 ` Krzysztof Kozlowski
2023-05-12 7:25 ` Xingyu Wu
2023-05-12 7:25 ` Xingyu Wu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230512-brewery-spouse-86350c9664d8@wendy \
--to=conor.dooley@microchip.com \
--cc=aou@eecs.berkeley.edu \
--cc=conor@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=hal.feng@starfivetech.com \
--cc=kernel@esmil.dk \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=krzysztof.kozlowski@linaro.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=mturquette@baylibre.com \
--cc=p.zabel@pengutronix.de \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=william.qiu@starfivetech.com \
--cc=xingyu.wu@starfivetech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.